Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: stm32: update pinctrl node name on STM32 MCU to prevent warnings

Update node name to avoid a DT schema validation issue seen with
"make dtbs_check W=1". It also cleans picntrl dtsi files for f429/f469 MCU.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

+71 -79
+1 -1
arch/arm/boot/dts/stm32f4-pinctrl.dtsi
··· 45 45 46 46 / { 47 47 soc { 48 - pinctrl: pin-controller { 48 + pinctrl: pin-controller@40020000 { 49 49 #address-cells = <1>; 50 50 #size-cells = <1>; 51 51 ranges = <0 0x40020000 0x3000>;
+34 -38
arch/arm/boot/dts/stm32f429-pinctrl.dtsi
··· 42 42 43 43 #include "stm32f4-pinctrl.dtsi" 44 44 45 - / { 46 - soc { 47 - pinctrl: pin-controller { 48 - compatible = "st,stm32f429-pinctrl"; 45 + &pinctrl { 46 + compatible = "st,stm32f429-pinctrl"; 49 47 50 - gpioa: gpio@40020000 { 51 - gpio-ranges = <&pinctrl 0 0 16>; 52 - }; 48 + gpioa: gpio@40020000 { 49 + gpio-ranges = <&pinctrl 0 0 16>; 50 + }; 53 51 54 - gpiob: gpio@40020400 { 55 - gpio-ranges = <&pinctrl 0 16 16>; 56 - }; 52 + gpiob: gpio@40020400 { 53 + gpio-ranges = <&pinctrl 0 16 16>; 54 + }; 57 55 58 - gpioc: gpio@40020800 { 59 - gpio-ranges = <&pinctrl 0 32 16>; 60 - }; 56 + gpioc: gpio@40020800 { 57 + gpio-ranges = <&pinctrl 0 32 16>; 58 + }; 61 59 62 - gpiod: gpio@40020c00 { 63 - gpio-ranges = <&pinctrl 0 48 16>; 64 - }; 60 + gpiod: gpio@40020c00 { 61 + gpio-ranges = <&pinctrl 0 48 16>; 62 + }; 65 63 66 - gpioe: gpio@40021000 { 67 - gpio-ranges = <&pinctrl 0 64 16>; 68 - }; 64 + gpioe: gpio@40021000 { 65 + gpio-ranges = <&pinctrl 0 64 16>; 66 + }; 69 67 70 - gpiof: gpio@40021400 { 71 - gpio-ranges = <&pinctrl 0 80 16>; 72 - }; 68 + gpiof: gpio@40021400 { 69 + gpio-ranges = <&pinctrl 0 80 16>; 70 + }; 73 71 74 - gpiog: gpio@40021800 { 75 - gpio-ranges = <&pinctrl 0 96 16>; 76 - }; 72 + gpiog: gpio@40021800 { 73 + gpio-ranges = <&pinctrl 0 96 16>; 74 + }; 77 75 78 - gpioh: gpio@40021c00 { 79 - gpio-ranges = <&pinctrl 0 112 16>; 80 - }; 76 + gpioh: gpio@40021c00 { 77 + gpio-ranges = <&pinctrl 0 112 16>; 78 + }; 81 79 82 - gpioi: gpio@40022000 { 83 - gpio-ranges = <&pinctrl 0 128 16>; 84 - }; 80 + gpioi: gpio@40022000 { 81 + gpio-ranges = <&pinctrl 0 128 16>; 82 + }; 85 83 86 - gpioj: gpio@40022400 { 87 - gpio-ranges = <&pinctrl 0 144 16>; 88 - }; 84 + gpioj: gpio@40022400 { 85 + gpio-ranges = <&pinctrl 0 144 16>; 86 + }; 89 87 90 - gpiok: gpio@40022800 { 91 - gpio-ranges = <&pinctrl 0 160 8>; 92 - }; 93 - }; 88 + gpiok: gpio@40022800 { 89 + gpio-ranges = <&pinctrl 0 160 8>; 94 90 }; 95 91 };
+35 -39
arch/arm/boot/dts/stm32f469-pinctrl.dtsi
··· 42 42 43 43 #include "stm32f4-pinctrl.dtsi" 44 44 45 - / { 46 - soc { 47 - pinctrl: pin-controller { 48 - compatible = "st,stm32f469-pinctrl"; 45 + &pinctrl { 46 + compatible = "st,stm32f469-pinctrl"; 49 47 50 - gpioa: gpio@40020000 { 51 - gpio-ranges = <&pinctrl 0 0 16>; 52 - }; 48 + gpioa: gpio@40020000 { 49 + gpio-ranges = <&pinctrl 0 0 16>; 50 + }; 53 51 54 - gpiob: gpio@40020400 { 55 - gpio-ranges = <&pinctrl 0 16 16>; 56 - }; 52 + gpiob: gpio@40020400 { 53 + gpio-ranges = <&pinctrl 0 16 16>; 54 + }; 57 55 58 - gpioc: gpio@40020800 { 59 - gpio-ranges = <&pinctrl 0 32 16>; 60 - }; 56 + gpioc: gpio@40020800 { 57 + gpio-ranges = <&pinctrl 0 32 16>; 58 + }; 61 59 62 - gpiod: gpio@40020c00 { 63 - gpio-ranges = <&pinctrl 0 48 16>; 64 - }; 60 + gpiod: gpio@40020c00 { 61 + gpio-ranges = <&pinctrl 0 48 16>; 62 + }; 65 63 66 - gpioe: gpio@40021000 { 67 - gpio-ranges = <&pinctrl 0 64 16>; 68 - }; 64 + gpioe: gpio@40021000 { 65 + gpio-ranges = <&pinctrl 0 64 16>; 66 + }; 69 67 70 - gpiof: gpio@40021400 { 71 - gpio-ranges = <&pinctrl 0 80 16>; 72 - }; 68 + gpiof: gpio@40021400 { 69 + gpio-ranges = <&pinctrl 0 80 16>; 70 + }; 73 71 74 - gpiog: gpio@40021800 { 75 - gpio-ranges = <&pinctrl 0 96 16>; 76 - }; 72 + gpiog: gpio@40021800 { 73 + gpio-ranges = <&pinctrl 0 96 16>; 74 + }; 77 75 78 - gpioh: gpio@40021c00 { 79 - gpio-ranges = <&pinctrl 0 112 16>; 80 - }; 76 + gpioh: gpio@40021c00 { 77 + gpio-ranges = <&pinctrl 0 112 16>; 78 + }; 81 79 82 - gpioi: gpio@40022000 { 83 - gpio-ranges = <&pinctrl 0 128 16>; 84 - }; 80 + gpioi: gpio@40022000 { 81 + gpio-ranges = <&pinctrl 0 128 16>; 82 + }; 85 83 86 - gpioj: gpio@40022400 { 87 - gpio-ranges = <&pinctrl 0 144 6>, 88 - <&pinctrl 12 156 4>; 89 - }; 84 + gpioj: gpio@40022400 { 85 + gpio-ranges = <&pinctrl 0 144 6>, 86 + <&pinctrl 12 156 4>; 87 + }; 90 88 91 - gpiok: gpio@40022800 { 92 - gpio-ranges = <&pinctrl 3 163 5>; 93 - }; 94 - }; 89 + gpiok: gpio@40022800 { 90 + gpio-ranges = <&pinctrl 3 163 5>; 95 91 }; 96 92 };
+1 -1
arch/arm/boot/dts/stm32f7-pinctrl.dtsi
··· 9 9 10 10 / { 11 11 soc { 12 - pinctrl: pin-controller { 12 + pinctrl: pin-controller@40020000 { 13 13 #address-cells = <1>; 14 14 #size-cells = <1>; 15 15 ranges = <0 0x40020000 0x3000>;