···208208#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12)209209/* Controller has an issue with buffer bits for small transfers */210210#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13)211211+/* Controller supports high speed but doesn't have the caps bit set */212212+#define SDHCI_QUIRK_FORCE_HIGHSPEED (1<<14)211213212214 int irq; /* Device IRQ */213215 void __iomem * ioaddr; /* Mapped address */