tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
"Nothing very controversial in here. Most of the fixes are for OMAP
this time around, with some orion/kirkwood and a tegra patch mixed in."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: Orion: Fix Virtual/Physical mixup with watchdog
ARM: Kirkwood: clk_register_gate_fn: add fn assignment
ARM: Orion5x - Restore parts of io.h, with rework
ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled
ARM: OMAP2+: mux: fix sparse warning
ARM: OMAP2+: CM: increase the module disable timeout
ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks
ARM: OMAP4: hwmod data: fix 32k sync timer idle modes
ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby
ARM: OMAP: Fix Beagleboard DVI reset gpio
arm/dts: OMAP2: Fix interrupt controller binding
ARM: OMAP2: Fix tusb6010 GPIO interrupt for n8x0
ARM: OMAP2+: Fix MUSB ifdefs for platform init code
ARM: tegra: make tegra_cpu_reset_handler_enable() __init
ARM: OMAP: PM: Lock clocks list while generating summary
ARM: iconnect: Remove include of removed linux/spi/orion_spi.h

Linus Torvalds a4a20fd9 2ecedc47

+77 -42
+1
arch/arm/Kconfig
··· 589 589 select PCI 590 590 select ARCH_REQUIRE_GPIOLIB 591 591 select GENERIC_CLOCKEVENTS 592 + select NEED_MACH_IO_H 592 593 select PLAT_ORION 593 594 help 594 595 Support for the following Marvell Orion 5x series SoCs:
+2
arch/arm/boot/dts/omap2.dtsi
··· 44 44 compatible = "ti,omap2-intc"; 45 45 interrupt-controller; 46 46 #interrupt-cells = <1>; 47 + ti,intc-size = <96>; 48 + reg = <0x480FE000 0x1000>; 47 49 }; 48 50 49 51 uart1: serial@4806a000 {
-3
arch/arm/mach-kirkwood/board-iconnect.c
··· 20 20 #include <linux/mv643xx_eth.h> 21 21 #include <linux/gpio.h> 22 22 #include <linux/leds.h> 23 - #include <linux/spi/flash.h> 24 - #include <linux/spi/spi.h> 25 - #include <linux/spi/orion_spi.h> 26 23 #include <linux/i2c.h> 27 24 #include <linux/input.h> 28 25 #include <linux/gpio_keys.h>
+1
arch/arm/mach-kirkwood/common.c
··· 159 159 gate_fn->gate.flags = clk_gate_flags; 160 160 gate_fn->gate.lock = lock; 161 161 gate_fn->gate.hw.init = &init; 162 + gate_fn->fn = fn; 162 163 163 164 /* ops is the gate ops, but with our disable function */ 164 165 if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
+1
arch/arm/mach-kirkwood/include/mach/bridge-regs.h
··· 38 38 #define IRQ_MASK_HIGH_OFF 0x0014 39 39 40 40 #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 41 + #define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300) 41 42 42 43 #define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) 43 44 #define L2_WRITETHROUGH 0x00000010
+1
arch/arm/mach-kirkwood/include/mach/kirkwood.h
··· 80 80 #define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) 81 81 82 82 #define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) 83 + #define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x20000) 83 84 84 85 #define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000) 85 86
+2 -4
arch/arm/mach-omap2/board-n8x0.c
··· 83 83 }; 84 84 85 85 static struct musb_hdrc_platform_data tusb_data = { 86 - #if defined(CONFIG_USB_MUSB_OTG) 86 + #ifdef CONFIG_USB_GADGET_MUSB_HDRC 87 87 .mode = MUSB_OTG, 88 - #elif defined(CONFIG_USB_MUSB_PERIPHERAL) 89 - .mode = MUSB_PERIPHERAL, 90 - #else /* defined(CONFIG_USB_MUSB_HOST) */ 88 + #else 91 89 .mode = MUSB_HOST, 92 90 #endif 93 91 .set_power = tusb_set_power,
+12 -16
arch/arm/mach-omap2/board-omap3beagle.c
··· 81 81 static struct { 82 82 int mmc1_gpio_wp; 83 83 int usb_pwr_level; 84 - int reset_gpio; 84 + int dvi_pd_gpio; 85 85 int usr_button_gpio; 86 86 int mmc_caps; 87 87 } beagle_config = { 88 88 .mmc1_gpio_wp = -EINVAL, 89 89 .usb_pwr_level = GPIOF_OUT_INIT_LOW, 90 - .reset_gpio = 129, 90 + .dvi_pd_gpio = -EINVAL, 91 91 .usr_button_gpio = 4, 92 92 .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 93 93 }; ··· 126 126 printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); 127 127 omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; 128 128 beagle_config.mmc1_gpio_wp = 29; 129 - beagle_config.reset_gpio = 170; 129 + beagle_config.dvi_pd_gpio = 170; 130 130 beagle_config.usr_button_gpio = 7; 131 131 break; 132 132 case 6: 133 133 printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); 134 134 omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; 135 135 beagle_config.mmc1_gpio_wp = 23; 136 - beagle_config.reset_gpio = 170; 136 + beagle_config.dvi_pd_gpio = 170; 137 137 beagle_config.usr_button_gpio = 7; 138 138 break; 139 139 case 5: 140 140 printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); 141 141 omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; 142 142 beagle_config.mmc1_gpio_wp = 23; 143 - beagle_config.reset_gpio = 170; 143 + beagle_config.dvi_pd_gpio = 170; 144 144 beagle_config.usr_button_gpio = 7; 145 145 break; 146 146 case 0: ··· 274 274 if (r) 275 275 pr_err("%s: unable to configure nDVI_PWR_EN\n", 276 276 __func__); 277 - r = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH, 278 - "DVI_LDO_EN"); 279 - if (r) 280 - pr_err("%s: unable to configure DVI_LDO_EN\n", 281 - __func__); 277 + 278 + beagle_config.dvi_pd_gpio = gpio + 2; 279 + 282 280 } else { 283 281 /* 284 282 * REVISIT: need ehci-omap hooks for external VBUS ··· 285 287 if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) 286 288 pr_err("%s: unable to configure EHCI_nOC\n", __func__); 287 289 } 288 - dvi_panel.power_down_gpio = beagle_config.reset_gpio; 290 + dvi_panel.power_down_gpio = beagle_config.dvi_pd_gpio; 289 291 290 292 gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level, 291 293 "nEN_USB_PWR"); ··· 497 499 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 498 500 omap3_beagle_init_rev(); 499 501 500 - if (beagle_config.mmc1_gpio_wp != -EINVAL) 502 + if (gpio_is_valid(beagle_config.mmc1_gpio_wp)) 501 503 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); 502 504 mmc[0].caps = beagle_config.mmc_caps; 503 505 omap_hsmmc_init(mmc); ··· 508 510 509 511 platform_add_devices(omap3_beagle_devices, 510 512 ARRAY_SIZE(omap3_beagle_devices)); 513 + if (gpio_is_valid(beagle_config.dvi_pd_gpio)) 514 + omap_mux_init_gpio(beagle_config.dvi_pd_gpio, OMAP_PIN_OUTPUT); 511 515 omap_display_init(&beagle_dss_data); 512 516 omap_serial_init(); 513 517 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 514 518 mt46h32m32lf6_sdrc_params); 515 - 516 - omap_mux_init_gpio(170, OMAP_PIN_INPUT); 517 - /* REVISIT leave DVI powered down until it's needed ... */ 518 - gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); 519 519 520 520 usb_musb_init(NULL); 521 521 usbhs_init(&usbhs_bdata);
+5
arch/arm/mach-omap2/clock44xx_data.c
··· 84 84 85 85 static struct clk sys_32k_ck = { 86 86 .name = "sys_32k_ck", 87 + .clkdm_name = "prm_clkdm", 87 88 .rate = 32768, 88 89 .ops = &clkops_null, 89 90 }; ··· 513 512 .name = "ddrphy_ck", 514 513 .parent = &dpll_core_m2_ck, 515 514 .ops = &clkops_null, 515 + .clkdm_name = "l3_emif_clkdm", 516 516 .fixed_div = 2, 517 517 .recalc = &omap_fixed_divisor_recalc, 518 518 }; ··· 771 769 static struct clk dpll_mpu_m2_ck = { 772 770 .name = "dpll_mpu_m2_ck", 773 771 .parent = &dpll_mpu_ck, 772 + .clkdm_name = "cm_clkdm", 774 773 .clksel = dpll_mpu_m2_div, 775 774 .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU, 776 775 .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, ··· 1152 1149 static struct clk l3_div_ck = { 1153 1150 .name = "l3_div_ck", 1154 1151 .parent = &div_core_ck, 1152 + .clkdm_name = "cm_clkdm", 1155 1153 .clksel = l3_div_div, 1156 1154 .clksel_reg = OMAP4430_CM_CLKSEL_CORE, 1157 1155 .clksel_mask = OMAP4430_CLKSEL_L3_MASK, ··· 2828 2824 static struct clk trace_clk_div_ck = { 2829 2825 .name = "trace_clk_div_ck", 2830 2826 .parent = &pmd_trace_clk_mux_ck, 2827 + .clkdm_name = "emu_sys_clkdm", 2831 2828 .clksel = trace_clk_div_div, 2832 2829 .clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, 2833 2830 .clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK,
+11
arch/arm/mach-omap2/cm.h
··· 22 22 */ 23 23 #define MAX_MODULE_READY_TIME 2000 24 24 25 + /* 26 + * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for 27 + * the PRCM to request that a module enter the inactive state in the 28 + * case of OMAP2 & 3. In the case of OMAP4 this is the max duration 29 + * in microseconds for the module to reach the inactive state from 30 + * a functional state. 31 + * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during 32 + * kernel init. 33 + */ 34 + #define MAX_MODULE_DISABLE_TIME 5000 35 + 25 36 #endif
+2 -2
arch/arm/mach-omap2/cminst44xx.c
··· 313 313 314 314 omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == 315 315 CLKCTRL_IDLEST_DISABLED), 316 - MAX_MODULE_READY_TIME, i); 316 + MAX_MODULE_DISABLE_TIME, i); 317 317 318 - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; 318 + return (i < MAX_MODULE_DISABLE_TIME) ? 0 : -EBUSY; 319 319 } 320 320 321 321 /**
+1
arch/arm/mach-omap2/mux.c
··· 41 41 #include "control.h" 42 42 #include "mux.h" 43 43 #include "prm.h" 44 + #include "common.h" 44 45 45 46 #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ 46 47 #define OMAP_MUX_BASE_SZ 0x5ca
+1 -1
arch/arm/mach-omap2/omap_hwmod.c
··· 530 530 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 531 531 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); 532 532 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 533 - _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 533 + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v); 534 534 535 535 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 536 536
+6 -2
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
··· 393 393 .rev_offs = 0x0000, 394 394 .sysc_offs = 0x0004, 395 395 .sysc_flags = SYSC_HAS_SIDLEMODE, 396 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 397 - SIDLE_SMART_WKUP), 396 + .idlemodes = (SIDLE_FORCE | SIDLE_NO), 398 397 .sysc_fields = &omap_hwmod_sysc_type1, 399 398 }; 400 399 ··· 853 854 .name = "dss_hdmi", 854 855 .class = &omap44xx_hdmi_hwmod_class, 855 856 .clkdm_name = "l3_dss_clkdm", 857 + /* 858 + * HDMI audio requires to use no-idle mode. Hence, 859 + * set idle mode by software. 860 + */ 861 + .flags = HWMOD_SWSUP_SIDLE, 856 862 .mpu_irqs = omap44xx_dss_hdmi_irqs, 857 863 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 858 864 .main_clk = "dss_48mhz_clk",
-6
arch/arm/mach-omap2/omap_phy_internal.c
··· 239 239 240 240 devconf2 &= ~CONF2_OTGMODE; 241 241 switch (musb_mode) { 242 - #ifdef CONFIG_USB_MUSB_HDRC_HCD 243 242 case MUSB_HOST: /* Force VBUS valid, ID = 0 */ 244 243 devconf2 |= CONF2_FORCE_HOST; 245 244 break; 246 - #endif 247 - #ifdef CONFIG_USB_GADGET_MUSB_HDRC 248 245 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ 249 246 devconf2 |= CONF2_FORCE_DEVICE; 250 247 break; 251 - #endif 252 - #ifdef CONFIG_USB_MUSB_OTG 253 248 case MUSB_OTG: /* Don't override the VBUS/ID comparators */ 254 249 devconf2 |= CONF2_NO_OVERRIDE; 255 250 break; 256 - #endif 257 251 default: 258 252 pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode); 259 253 }
+2 -4
arch/arm/mach-omap2/usb-musb.c
··· 41 41 }; 42 42 43 43 static struct musb_hdrc_platform_data musb_plat = { 44 - #ifdef CONFIG_USB_MUSB_OTG 44 + #ifdef CONFIG_USB_GADGET_MUSB_HDRC 45 45 .mode = MUSB_OTG, 46 - #elif defined(CONFIG_USB_MUSB_HDRC_HCD) 46 + #else 47 47 .mode = MUSB_HOST, 48 - #elif defined(CONFIG_USB_GADGET_MUSB_HDRC) 49 - .mode = MUSB_PERIPHERAL, 50 48 #endif 51 49 /* .clock is set dynamically */ 52 50 .config = &musb_config,
+1 -1
arch/arm/mach-omap2/usb-tusb6010.c
··· 300 300 printk(error, 3, status); 301 301 return status; 302 302 } 303 - tusb_resources[2].start = irq + IH_GPIO_BASE; 303 + tusb_resources[2].start = gpio_to_irq(irq); 304 304 305 305 /* set up memory timings ... can speed them up later */ 306 306 if (!ps_refclk) {
+1 -1
arch/arm/mach-orion5x/include/mach/bridge-regs.h
··· 35 35 #define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204) 36 36 37 37 #define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) 38 - 38 + #define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE | 0x300) 39 39 #endif
+22
arch/arm/mach-orion5x/include/mach/io.h
··· 1 + /* 2 + * arch/arm/mach-orion5x/include/mach/io.h 3 + * 4 + * This file is licensed under the terms of the GNU General Public 5 + * License version 2. This program is licensed "as is" without any 6 + * warranty of any kind, whether express or implied. 7 + */ 8 + 9 + #ifndef __ASM_ARCH_IO_H 10 + #define __ASM_ARCH_IO_H 11 + 12 + #include <mach/orion5x.h> 13 + #include <asm/sizes.h> 14 + 15 + #define IO_SPACE_LIMIT SZ_2M 16 + static inline void __iomem *__io(unsigned long addr) 17 + { 18 + return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE); 19 + } 20 + 21 + #define __io(a) __io(a) 22 + #endif
+1
arch/arm/mach-orion5x/include/mach/orion5x.h
··· 82 82 #define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) 83 83 84 84 #define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) 85 + #define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x20000) 85 86 86 87 #define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) 87 88
+1 -1
arch/arm/mach-tegra/reset.c
··· 33 33 34 34 static bool is_enabled; 35 35 36 - static void tegra_cpu_reset_handler_enable(void) 36 + static void __init tegra_cpu_reset_handler_enable(void) 37 37 { 38 38 void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE); 39 39 void __iomem *evp_cpu_reset =
+2
arch/arm/plat-omap/clock.c
··· 461 461 struct clk *c; 462 462 struct clk *pa; 463 463 464 + mutex_lock(&clocks_mutex); 464 465 seq_printf(s, "%-30s %-30s %-10s %s\n", 465 466 "clock-name", "parent-name", "rate", "use-count"); 466 467 ··· 470 469 seq_printf(s, "%-30s %-30s %-10lu %d\n", 471 470 c->name, pa ? pa->name : "none", c->rate, c->usecount); 472 471 } 472 + mutex_unlock(&clocks_mutex); 473 473 474 474 return 0; 475 475 }
+1 -1
arch/arm/plat-orion/common.c
··· 582 582 * Watchdog 583 583 ****************************************************************************/ 584 584 static struct resource orion_wdt_resource = 585 - DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28); 585 + DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28); 586 586 587 587 static struct platform_device orion_wdt_device = { 588 588 .name = "orion_wdt",