Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'wireless-drivers-next-for-davem-2015-10-29' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next

Kalle Valo says:

====================
iwlwifi

* bug fix for TDLS
* fixes and cleanups in scan
* support of several scan plans
* improvements in FTM
* fixes in FW API
* improvements in the failure paths when the bus is dead
* other various small things here and there

ath10k

* add QCA9377 support
* fw_stats support for 10.4 firmware

ath6kl

* report antenna configuration to user space
* implement ethtool stats

ssb

* add Kconfig SSB_HOST_SOC for compiling SoC related code
* move functions specific to SoC hosted bus to separated file
* pick PCMCIA host code support from b43 driver
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+1844 -890
+1
arch/mips/bcm47xx/Kconfig
··· 4 4 bool "SSB Support for Broadcom BCM47XX" 5 5 select SYS_HAS_CPU_BMIPS32_3300 6 6 select SSB 7 + select SSB_HOST_SOC 7 8 select SSB_DRIVER_MIPS 8 9 select SSB_DRIVER_EXTIF 9 10 select SSB_EMBEDDED
+36 -41
drivers/net/wireless/airo.c
··· 1231 1231 dma_addr_t shared_dma; 1232 1232 pm_message_t power; 1233 1233 SsidRid *SSID; 1234 - APListRid *APList; 1234 + APListRid APList; 1235 1235 #define PCI_SHARED_LEN 2*MPI_MAX_FIDS*PKTSIZE+RIDSIZE 1236 1236 char proc_name[IFNAMSIZ]; 1237 1237 ··· 1848 1848 return PC4500_readrid(ai, RID_STATUS, statr, sizeof(*statr), lock); 1849 1849 } 1850 1850 1851 - static int readAPListRid(struct airo_info *ai, APListRid *aplr) 1852 - { 1853 - return PC4500_readrid(ai, RID_APLIST, aplr, sizeof(*aplr), 1); 1854 - } 1855 - 1856 1851 static int writeAPListRid(struct airo_info *ai, APListRid *aplr, int lock) 1857 1852 { 1858 1853 return PC4500_writerid(ai, RID_APLIST, aplr, sizeof(*aplr), lock); ··· 2408 2413 2409 2414 kfree(ai->flash); 2410 2415 kfree(ai->rssi); 2411 - kfree(ai->APList); 2412 2416 kfree(ai->SSID); 2413 2417 if (freeres) { 2414 2418 /* PCMCIA frees this stuff, so only for PCI and ISA */ ··· 2803 2809 init_waitqueue_head (&ai->thr_wait); 2804 2810 ai->tfm = NULL; 2805 2811 add_airo_dev(ai); 2812 + ai->APList.len = cpu_to_le16(sizeof(struct APListRid)); 2806 2813 2807 2814 if (airo_networks_allocate (ai)) 2808 2815 goto err_out_free; ··· 3037 3042 } 3038 3043 3039 3044 out: 3045 + /* write APList back (we cleared it in airo_set_scan) */ 3046 + disable_MAC(ai, 2); 3047 + writeAPListRid(ai, &ai->APList, 0); 3048 + enable_MAC(ai, 0); 3049 + 3040 3050 ai->scan_timeout = 0; 3041 3051 clear_bit(JOB_SCAN_RESULTS, &ai->jobs); 3042 3052 up(&ai->sem); ··· 3613 3613 Cmd cmd; 3614 3614 Resp rsp; 3615 3615 3616 - if (lock && down_interruptible(&ai->sem)) 3616 + if (lock == 1 && down_interruptible(&ai->sem)) 3617 3617 return; 3618 3618 3619 3619 if (test_bit(FLAG_ENABLED, &ai->flags)) { 3620 - netif_carrier_off(ai->dev); 3620 + if (lock != 2) /* lock == 2 means don't disable carrier */ 3621 + netif_carrier_off(ai->dev); 3621 3622 memset(&cmd, 0, sizeof(cmd)); 3622 3623 cmd.cmd = MAC_DISABLE; // disable in case already enabled 3623 3624 issuecommand(ai, &cmd, &rsp); 3624 3625 clear_bit(FLAG_ENABLED, &ai->flags); 3625 3626 } 3626 - if (lock) 3627 + if (lock == 1) 3627 3628 up(&ai->sem); 3628 3629 } 3629 3630 ··· 3853 3852 tdsRssiRid rssi_rid; 3854 3853 CapabilityRid cap_rid; 3855 3854 3856 - kfree(ai->APList); 3857 - ai->APList = NULL; 3858 3855 kfree(ai->SSID); 3859 3856 ai->SSID = NULL; 3860 3857 // general configuration (read/modify/write) ··· 5129 5130 struct proc_data *data = file->private_data; 5130 5131 struct net_device *dev = PDE_DATA(inode); 5131 5132 struct airo_info *ai = dev->ml_priv; 5132 - APListRid APList_rid; 5133 + APListRid *APList_rid = &ai->APList; 5133 5134 int i; 5134 5135 5135 5136 if ( !data->writelen ) return; 5136 5137 5137 - memset( &APList_rid, 0, sizeof(APList_rid) ); 5138 - APList_rid.len = cpu_to_le16(sizeof(APList_rid)); 5138 + memset(APList_rid, 0, sizeof(*APList_rid)); 5139 + APList_rid->len = cpu_to_le16(sizeof(*APList_rid)); 5139 5140 5140 5141 for( i = 0; i < 4 && data->writelen >= (i+1)*6*3; i++ ) { 5141 5142 int j; 5142 5143 for( j = 0; j < 6*3 && data->wbuffer[j+i*6*3]; j++ ) { 5143 5144 switch(j%3) { 5144 5145 case 0: 5145 - APList_rid.ap[i][j/3]= 5146 + APList_rid->ap[i][j/3]= 5146 5147 hex_to_bin(data->wbuffer[j+i*6*3])<<4; 5147 5148 break; 5148 5149 case 1: 5149 - APList_rid.ap[i][j/3]|= 5150 + APList_rid->ap[i][j/3]|= 5150 5151 hex_to_bin(data->wbuffer[j+i*6*3]); 5151 5152 break; 5152 5153 } 5153 5154 } 5154 5155 } 5155 5156 disable_MAC(ai, 1); 5156 - writeAPListRid(ai, &APList_rid, 1); 5157 + writeAPListRid(ai, APList_rid, 1); 5157 5158 enable_MAC(ai, 1); 5158 5159 } 5159 5160 ··· 5407 5408 struct airo_info *ai = dev->ml_priv; 5408 5409 int i; 5409 5410 char *ptr; 5410 - APListRid APList_rid; 5411 + APListRid *APList_rid = &ai->APList; 5411 5412 5412 5413 if ((file->private_data = kzalloc(sizeof(struct proc_data ), GFP_KERNEL)) == NULL) 5413 5414 return -ENOMEM; ··· 5425 5426 } 5426 5427 data->on_close = proc_APList_on_close; 5427 5428 5428 - readAPListRid(ai, &APList_rid); 5429 5429 ptr = data->rbuffer; 5430 5430 for( i = 0; i < 4; i++ ) { 5431 5431 // We end when we find a zero MAC 5432 - if ( !*(int*)APList_rid.ap[i] && 5433 - !*(int*)&APList_rid.ap[i][2]) break; 5434 - ptr += sprintf(ptr, "%pM\n", APList_rid.ap[i]); 5432 + if ( !*(int*)APList_rid->ap[i] && 5433 + !*(int*)&APList_rid->ap[i][2]) break; 5434 + ptr += sprintf(ptr, "%pM\n", APList_rid->ap[i]); 5435 5435 } 5436 5436 if (i==0) ptr += sprintf(ptr, "Not using specific APs\n"); 5437 5437 ··· 5594 5596 Cmd cmd; 5595 5597 Resp rsp; 5596 5598 5597 - if (!ai->APList) 5598 - ai->APList = kmalloc(sizeof(APListRid), GFP_KERNEL); 5599 - if (!ai->APList) 5600 - return -ENOMEM; 5601 5599 if (!ai->SSID) 5602 5600 ai->SSID = kmalloc(sizeof(SsidRid), GFP_KERNEL); 5603 5601 if (!ai->SSID) 5604 5602 return -ENOMEM; 5605 - readAPListRid(ai, ai->APList); 5606 5603 readSsidRid(ai, ai->SSID); 5607 5604 memset(&cmd, 0, sizeof(cmd)); 5608 5605 /* the lock will be released at the end of the resume callback */ ··· 5645 5652 kfree(ai->SSID); 5646 5653 ai->SSID = NULL; 5647 5654 } 5648 - if (ai->APList) { 5649 - writeAPListRid(ai, ai->APList, 0); 5650 - kfree(ai->APList); 5651 - ai->APList = NULL; 5652 - } 5655 + writeAPListRid(ai, &ai->APList, 0); 5653 5656 writeConfigRid(ai, 0); 5654 5657 enable_MAC(ai, 0); 5655 5658 ai->power = PMSG_ON; ··· 5943 5954 struct airo_info *local = dev->ml_priv; 5944 5955 Cmd cmd; 5945 5956 Resp rsp; 5946 - APListRid APList_rid; 5957 + APListRid *APList_rid = &local->APList; 5947 5958 5948 5959 if (awrq->sa_family != ARPHRD_ETHER) 5949 5960 return -EINVAL; ··· 5956 5967 issuecommand(local, &cmd, &rsp); 5957 5968 up(&local->sem); 5958 5969 } else { 5959 - memset(&APList_rid, 0, sizeof(APList_rid)); 5960 - APList_rid.len = cpu_to_le16(sizeof(APList_rid)); 5961 - memcpy(APList_rid.ap[0], awrq->sa_data, ETH_ALEN); 5970 + memset(APList_rid, 0, sizeof(*APList_rid)); 5971 + APList_rid->len = cpu_to_le16(sizeof(*APList_rid)); 5972 + memcpy(APList_rid->ap[0], awrq->sa_data, ETH_ALEN); 5962 5973 disable_MAC(local, 1); 5963 - writeAPListRid(local, &APList_rid, 1); 5974 + writeAPListRid(local, APList_rid, 1); 5964 5975 enable_MAC(local, 1); 5965 5976 } 5966 5977 return 0; ··· 7222 7233 Cmd cmd; 7223 7234 Resp rsp; 7224 7235 int wake = 0; 7236 + APListRid APList_rid_empty; 7225 7237 7226 7238 /* Note : you may have realised that, as this is a SET operation, 7227 7239 * this is privileged and therefore a normal user can't ··· 7239 7249 * trigger another one. */ 7240 7250 if (ai->scan_timeout > 0) 7241 7251 goto out; 7252 + 7253 + /* Clear APList as it affects scan results */ 7254 + memset(&APList_rid_empty, 0, sizeof(APList_rid_empty)); 7255 + APList_rid_empty.len = cpu_to_le16(sizeof(APList_rid_empty)); 7256 + disable_MAC(ai, 2); 7257 + writeAPListRid(ai, &APList_rid_empty, 0); 7258 + enable_MAC(ai, 0); 7242 7259 7243 7260 /* Initiate a scan command */ 7244 7261 ai->scan_timeout = RUN_AT(3*HZ); ··· 7502 7505 * parameters. It's now time to commit them in the card */ 7503 7506 disable_MAC(local, 1); 7504 7507 if (test_bit (FLAG_RESET, &local->flags)) { 7505 - APListRid APList_rid; 7506 7508 SsidRid SSID_rid; 7507 7509 7508 - readAPListRid(local, &APList_rid); 7509 7510 readSsidRid(local, &SSID_rid); 7510 7511 if (test_bit(FLAG_MPI,&local->flags)) 7511 7512 setup_card(local, dev->dev_addr, 1 ); ··· 7511 7516 reset_airo_card(dev); 7512 7517 disable_MAC(local, 1); 7513 7518 writeSsidRid(local, &SSID_rid, 1); 7514 - writeAPListRid(local, &APList_rid, 1); 7519 + writeAPListRid(local, &local->APList, 1); 7515 7520 } 7516 7521 if (down_interruptible(&local->sem)) 7517 7522 return -ERESTARTSYS;
+8 -49
drivers/net/wireless/ath/ath10k/ce.c
··· 274 274 { 275 275 struct ath10k *ar = ce_state->ar; 276 276 struct ath10k_ce_ring *src_ring = ce_state->src_ring; 277 - struct ce_desc *desc, *sdesc; 277 + struct ce_desc *desc, sdesc; 278 278 unsigned int nentries_mask = src_ring->nentries_mask; 279 279 unsigned int sw_index = src_ring->sw_index; 280 280 unsigned int write_index = src_ring->write_index; ··· 294 294 295 295 desc = CE_SRC_RING_TO_DESC(src_ring->base_addr_owner_space, 296 296 write_index); 297 - sdesc = CE_SRC_RING_TO_DESC(src_ring->shadow_base, write_index); 298 297 299 298 desc_flags |= SM(transfer_id, CE_DESC_FLAGS_META_DATA); 300 299 ··· 302 303 if (flags & CE_SEND_FLAG_BYTE_SWAP) 303 304 desc_flags |= CE_DESC_FLAGS_BYTE_SWAP; 304 305 305 - sdesc->addr = __cpu_to_le32(buffer); 306 - sdesc->nbytes = __cpu_to_le16(nbytes); 307 - sdesc->flags = __cpu_to_le16(desc_flags); 306 + sdesc.addr = __cpu_to_le32(buffer); 307 + sdesc.nbytes = __cpu_to_le16(nbytes); 308 + sdesc.flags = __cpu_to_le16(desc_flags); 308 309 309 - *desc = *sdesc; 310 + *desc = sdesc; 310 311 311 312 src_ring->per_transfer_context[write_index] = per_transfer_context; 312 313 ··· 578 579 * The caller takes responsibility for any necessary locking. 579 580 */ 580 581 int ath10k_ce_completed_send_next_nolock(struct ath10k_ce_pipe *ce_state, 581 - void **per_transfer_contextp, 582 - u32 *bufferp, 583 - unsigned int *nbytesp, 584 - unsigned int *transfer_idp) 582 + void **per_transfer_contextp) 585 583 { 586 584 struct ath10k_ce_ring *src_ring = ce_state->src_ring; 587 585 u32 ctrl_addr = ce_state->ctrl_addr; 588 586 struct ath10k *ar = ce_state->ar; 589 587 unsigned int nentries_mask = src_ring->nentries_mask; 590 588 unsigned int sw_index = src_ring->sw_index; 591 - struct ce_desc *sdesc, *sbase; 592 589 unsigned int read_index; 593 590 594 591 if (src_ring->hw_index == sw_index) { ··· 608 613 609 614 if (read_index == sw_index) 610 615 return -EIO; 611 - 612 - sbase = src_ring->shadow_base; 613 - sdesc = CE_SRC_RING_TO_DESC(sbase, sw_index); 614 - 615 - /* Return data from completed source descriptor */ 616 - *bufferp = __le32_to_cpu(sdesc->addr); 617 - *nbytesp = __le16_to_cpu(sdesc->nbytes); 618 - *transfer_idp = MS(__le16_to_cpu(sdesc->flags), 619 - CE_DESC_FLAGS_META_DATA); 620 616 621 617 if (per_transfer_contextp) 622 618 *per_transfer_contextp = ··· 683 697 } 684 698 685 699 int ath10k_ce_completed_send_next(struct ath10k_ce_pipe *ce_state, 686 - void **per_transfer_contextp, 687 - u32 *bufferp, 688 - unsigned int *nbytesp, 689 - unsigned int *transfer_idp) 700 + void **per_transfer_contextp) 690 701 { 691 702 struct ath10k *ar = ce_state->ar; 692 703 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); ··· 691 708 692 709 spin_lock_bh(&ar_pci->ce_lock); 693 710 ret = ath10k_ce_completed_send_next_nolock(ce_state, 694 - per_transfer_contextp, 695 - bufferp, nbytesp, 696 - transfer_idp); 711 + per_transfer_contextp); 697 712 spin_unlock_bh(&ar_pci->ce_lock); 698 713 699 714 return ret; ··· 921 940 src_ring->base_addr_ce_space_unaligned, 922 941 CE_DESC_RING_ALIGN); 923 942 924 - /* 925 - * Also allocate a shadow src ring in regular 926 - * mem to use for faster access. 927 - */ 928 - src_ring->shadow_base_unaligned = 929 - kmalloc((nentries * sizeof(struct ce_desc) + 930 - CE_DESC_RING_ALIGN), GFP_KERNEL); 931 - if (!src_ring->shadow_base_unaligned) { 932 - dma_free_coherent(ar->dev, 933 - (nentries * sizeof(struct ce_desc) + 934 - CE_DESC_RING_ALIGN), 935 - src_ring->base_addr_owner_space, 936 - src_ring->base_addr_ce_space); 937 - kfree(src_ring); 938 - return ERR_PTR(-ENOMEM); 939 - } 940 - 941 - src_ring->shadow_base = PTR_ALIGN( 942 - src_ring->shadow_base_unaligned, 943 - CE_DESC_RING_ALIGN); 944 - 945 943 return src_ring; 946 944 } 947 945 ··· 1099 1139 struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id]; 1100 1140 1101 1141 if (ce_state->src_ring) { 1102 - kfree(ce_state->src_ring->shadow_base_unaligned); 1103 1142 dma_free_coherent(ar->dev, 1104 1143 (ce_state->src_ring->nentries * 1105 1144 sizeof(struct ce_desc) +
+2 -14
drivers/net/wireless/ath/ath10k/ce.h
··· 100 100 101 101 /* CE address space */ 102 102 u32 base_addr_ce_space; 103 - /* 104 - * Start of shadow copy of descriptors, within regular memory. 105 - * Aligned to descriptor-size boundary. 106 - */ 107 - void *shadow_base_unaligned; 108 - struct ce_desc *shadow_base; 109 103 110 104 /* keep last */ 111 105 void *per_transfer_context[0]; ··· 186 192 * Pops 1 completed send buffer from Source ring. 187 193 */ 188 194 int ath10k_ce_completed_send_next(struct ath10k_ce_pipe *ce_state, 189 - void **per_transfer_contextp, 190 - u32 *bufferp, 191 - unsigned int *nbytesp, 192 - unsigned int *transfer_idp); 195 + void **per_transfer_contextp); 193 196 194 197 int ath10k_ce_completed_send_next_nolock(struct ath10k_ce_pipe *ce_state, 195 - void **per_transfer_contextp, 196 - u32 *bufferp, 197 - unsigned int *nbytesp, 198 - unsigned int *transfer_idp); 198 + void **per_transfer_contextp); 199 199 200 200 /*==================CE Engine Initialization=======================*/ 201 201
+19 -2
drivers/net/wireless/ath/ath10k/core.c
··· 137 137 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 138 138 }, 139 139 }, 140 + { 141 + .id = QCA9377_HW_1_0_DEV_VERSION, 142 + .name = "qca9377 hw1.0", 143 + .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 144 + .uart_pin = 7, 145 + .otp_exe_param = 0, 146 + .fw = { 147 + .dir = QCA9377_HW_1_0_FW_DIR, 148 + .fw = QCA9377_HW_1_0_FW_FILE, 149 + .otp = QCA9377_HW_1_0_OTP_FILE, 150 + .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 151 + .board_size = QCA9377_BOARD_DATA_SZ, 152 + .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 153 + }, 154 + }, 140 155 }; 141 156 142 157 static const char *const ath10k_core_fw_feature_str[] = { ··· 166 151 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 167 152 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 168 153 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 154 + [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 169 155 }; 170 156 171 157 static unsigned int ath10k_core_get_fw_feature_str(char *buf, ··· 584 568 } 585 569 break; 586 570 case ATH10K_FIRMWARE_MODE_UTF: 587 - data = ar->testmode.utf->data; 588 - data_len = ar->testmode.utf->size; 571 + data = ar->testmode.utf_firmware_data; 572 + data_len = ar->testmode.utf_firmware_len; 589 573 mode_name = "utf"; 590 574 break; 591 575 default: ··· 1916 1900 ar->hw_values = &qca988x_values; 1917 1901 break; 1918 1902 case ATH10K_HW_QCA6174: 1903 + case ATH10K_HW_QCA9377: 1919 1904 ar->regs = &qca6174_regs; 1920 1905 ar->hw_values = &qca6174_values; 1921 1906 break;
+19 -3
drivers/net/wireless/ath/ath10k/core.h
··· 214 214 s32 hw_queued; 215 215 s32 hw_reaped; 216 216 s32 underrun; 217 + u32 hw_paused; 217 218 s32 tx_abort; 218 219 s32 mpdus_requed; 219 220 u32 tx_ko; ··· 227 226 u32 pdev_resets; 228 227 u32 phy_underrun; 229 228 u32 txop_ovf; 229 + u32 seq_posted; 230 + u32 seq_failed_queueing; 231 + u32 seq_completed; 232 + u32 seq_restarted; 233 + u32 mu_seq_posted; 234 + u32 mpdus_sw_flush; 235 + u32 mpdus_hw_filter; 236 + u32 mpdus_truncated; 237 + u32 mpdus_ack_failed; 238 + u32 mpdus_expired; 230 239 231 240 /* PDEV RX stats */ 232 241 s32 mid_ppdu_route_change; ··· 253 242 s32 phy_errs; 254 243 s32 phy_err_drop; 255 244 s32 mpdu_errs; 245 + s32 rx_ovfl_errs; 256 246 }; 257 247 258 248 struct ath10k_fw_stats { ··· 509 497 */ 510 498 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 511 499 500 + /* Firmware Supports Adaptive CCA*/ 501 + ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 502 + 512 503 /* keep last */ 513 504 ATH10K_FW_FEATURE_COUNT, 514 505 }; ··· 745 730 int num_started_vdevs; 746 731 747 732 /* Protected by conf-mutex */ 748 - u8 supp_tx_chainmask; 749 - u8 supp_rx_chainmask; 750 733 u8 cfg_tx_chainmask; 751 734 u8 cfg_rx_chainmask; 752 735 ··· 827 814 struct { 828 815 /* protected by conf_mutex */ 829 816 const struct firmware *utf; 817 + char utf_version[32]; 818 + const void *utf_firmware_data; 819 + size_t utf_firmware_len; 830 820 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT); 831 821 enum ath10k_fw_wmi_op_version orig_wmi_op_version; 832 - 822 + enum ath10k_fw_wmi_op_version op_version; 833 823 /* protected by data_lock */ 834 824 bool utf_monitor; 835 825 } testmode;
+12
drivers/net/wireless/ath/ath10k/hw.h
··· 84 84 #define QCA99X0_HW_2_0_BOARD_DATA_FILE "board.bin" 85 85 #define QCA99X0_HW_2_0_PATCH_LOAD_ADDR 0x1234 86 86 87 + /* QCA9377 1.0 definitions */ 88 + #define QCA9377_HW_1_0_DEV_VERSION 0x05020001 89 + #define QCA9377_HW_1_0_CHIP_ID_REV 0x1 90 + #define QCA9377_HW_1_0_FW_DIR ATH10K_FW_DIR "/QCA9377/hw1.0" 91 + #define QCA9377_HW_1_0_FW_FILE "firmware.bin" 92 + #define QCA9377_HW_1_0_OTP_FILE "otp.bin" 93 + #define QCA9377_HW_1_0_BOARD_DATA_FILE "board.bin" 94 + #define QCA9377_HW_1_0_PATCH_LOAD_ADDR 0x1234 95 + 87 96 #define ATH10K_FW_API2_FILE "firmware-2.bin" 88 97 #define ATH10K_FW_API3_FILE "firmware-3.bin" 89 98 ··· 103 94 #define ATH10K_FW_API5_FILE "firmware-5.bin" 104 95 105 96 #define ATH10K_FW_UTF_FILE "utf.bin" 97 + #define ATH10K_FW_UTF_API2_FILE "utf-2.bin" 106 98 107 99 /* includes also the null byte */ 108 100 #define ATH10K_FIRMWARE_MAGIC "QCA-ATH10K" ··· 186 176 ATH10K_HW_QCA988X, 187 177 ATH10K_HW_QCA6174, 188 178 ATH10K_HW_QCA99X0, 179 + ATH10K_HW_QCA9377, 189 180 }; 190 181 191 182 struct ath10k_hw_regs { ··· 239 228 #define QCA_REV_988X(ar) ((ar)->hw_rev == ATH10K_HW_QCA988X) 240 229 #define QCA_REV_6174(ar) ((ar)->hw_rev == ATH10K_HW_QCA6174) 241 230 #define QCA_REV_99X0(ar) ((ar)->hw_rev == ATH10K_HW_QCA99X0) 231 + #define QCA_REV_9377(ar) ((ar)->hw_rev == ATH10K_HW_QCA9377) 242 232 243 233 /* Known pecularities: 244 234 * - raw appears in nwifi decap, raw and nwifi appear in ethernet decap
+185 -161
drivers/net/wireless/ath/ath10k/mac.c
··· 3736 3736 3737 3737 mutex_lock(&ar->conf_mutex); 3738 3738 3739 - if (ar->cfg_tx_chainmask) { 3740 - *tx_ant = ar->cfg_tx_chainmask; 3741 - *rx_ant = ar->cfg_rx_chainmask; 3742 - } else { 3743 - *tx_ant = ar->supp_tx_chainmask; 3744 - *rx_ant = ar->supp_rx_chainmask; 3745 - } 3739 + *tx_ant = ar->cfg_tx_chainmask; 3740 + *rx_ant = ar->cfg_rx_chainmask; 3746 3741 3747 3742 mutex_unlock(&ar->conf_mutex); 3748 3743 ··· 3755 3760 3756 3761 ath10k_warn(ar, "mac %s antenna chainmask may be invalid: 0x%x. Suggested values: 15, 7, 3, 1 or 0.\n", 3757 3762 dbg, cm); 3763 + } 3764 + 3765 + static int ath10k_mac_get_vht_cap_bf_sts(struct ath10k *ar) 3766 + { 3767 + int nsts = ar->vht_cap_info; 3768 + 3769 + nsts &= IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK; 3770 + nsts >>= IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT; 3771 + 3772 + /* If firmware does not deliver to host number of space-time 3773 + * streams supported, assume it support up to 4 BF STS and return 3774 + * the value for VHT CAP: nsts-1) 3775 + */ 3776 + if (nsts == 0) 3777 + return 3; 3778 + 3779 + return nsts; 3780 + } 3781 + 3782 + static int ath10k_mac_get_vht_cap_bf_sound_dim(struct ath10k *ar) 3783 + { 3784 + int sound_dim = ar->vht_cap_info; 3785 + 3786 + sound_dim &= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK; 3787 + sound_dim >>= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_SHIFT; 3788 + 3789 + /* If the sounding dimension is not advertised by the firmware, 3790 + * let's use a default value of 1 3791 + */ 3792 + if (sound_dim == 0) 3793 + return 1; 3794 + 3795 + return sound_dim; 3796 + } 3797 + 3798 + static struct ieee80211_sta_vht_cap ath10k_create_vht_cap(struct ath10k *ar) 3799 + { 3800 + struct ieee80211_sta_vht_cap vht_cap = {0}; 3801 + u16 mcs_map; 3802 + u32 val; 3803 + int i; 3804 + 3805 + vht_cap.vht_supported = 1; 3806 + vht_cap.cap = ar->vht_cap_info; 3807 + 3808 + if (ar->vht_cap_info & (IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 3809 + IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE)) { 3810 + val = ath10k_mac_get_vht_cap_bf_sts(ar); 3811 + val <<= IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT; 3812 + val &= IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK; 3813 + 3814 + vht_cap.cap |= val; 3815 + } 3816 + 3817 + if (ar->vht_cap_info & (IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 3818 + IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE)) { 3819 + val = ath10k_mac_get_vht_cap_bf_sound_dim(ar); 3820 + val <<= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_SHIFT; 3821 + val &= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK; 3822 + 3823 + vht_cap.cap |= val; 3824 + } 3825 + 3826 + mcs_map = 0; 3827 + for (i = 0; i < 8; i++) { 3828 + if ((i < ar->num_rf_chains) && (ar->cfg_tx_chainmask & BIT(i))) 3829 + mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2); 3830 + else 3831 + mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2); 3832 + } 3833 + 3834 + vht_cap.vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); 3835 + vht_cap.vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); 3836 + 3837 + return vht_cap; 3838 + } 3839 + 3840 + static struct ieee80211_sta_ht_cap ath10k_get_ht_cap(struct ath10k *ar) 3841 + { 3842 + int i; 3843 + struct ieee80211_sta_ht_cap ht_cap = {0}; 3844 + 3845 + if (!(ar->ht_cap_info & WMI_HT_CAP_ENABLED)) 3846 + return ht_cap; 3847 + 3848 + ht_cap.ht_supported = 1; 3849 + ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 3850 + ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; 3851 + ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; 3852 + ht_cap.cap |= IEEE80211_HT_CAP_DSSSCCK40; 3853 + ht_cap.cap |= WLAN_HT_CAP_SM_PS_STATIC << IEEE80211_HT_CAP_SM_PS_SHIFT; 3854 + 3855 + if (ar->ht_cap_info & WMI_HT_CAP_HT20_SGI) 3856 + ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; 3857 + 3858 + if (ar->ht_cap_info & WMI_HT_CAP_HT40_SGI) 3859 + ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; 3860 + 3861 + if (ar->ht_cap_info & WMI_HT_CAP_DYNAMIC_SMPS) { 3862 + u32 smps; 3863 + 3864 + smps = WLAN_HT_CAP_SM_PS_DYNAMIC; 3865 + smps <<= IEEE80211_HT_CAP_SM_PS_SHIFT; 3866 + 3867 + ht_cap.cap |= smps; 3868 + } 3869 + 3870 + if (ar->ht_cap_info & WMI_HT_CAP_TX_STBC) 3871 + ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; 3872 + 3873 + if (ar->ht_cap_info & WMI_HT_CAP_RX_STBC) { 3874 + u32 stbc; 3875 + 3876 + stbc = ar->ht_cap_info; 3877 + stbc &= WMI_HT_CAP_RX_STBC; 3878 + stbc >>= WMI_HT_CAP_RX_STBC_MASK_SHIFT; 3879 + stbc <<= IEEE80211_HT_CAP_RX_STBC_SHIFT; 3880 + stbc &= IEEE80211_HT_CAP_RX_STBC; 3881 + 3882 + ht_cap.cap |= stbc; 3883 + } 3884 + 3885 + if (ar->ht_cap_info & WMI_HT_CAP_LDPC) 3886 + ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 3887 + 3888 + if (ar->ht_cap_info & WMI_HT_CAP_L_SIG_TXOP_PROT) 3889 + ht_cap.cap |= IEEE80211_HT_CAP_LSIG_TXOP_PROT; 3890 + 3891 + /* max AMSDU is implicitly taken from vht_cap_info */ 3892 + if (ar->vht_cap_info & WMI_VHT_CAP_MAX_MPDU_LEN_MASK) 3893 + ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; 3894 + 3895 + for (i = 0; i < ar->num_rf_chains; i++) { 3896 + if (ar->cfg_rx_chainmask & BIT(i)) 3897 + ht_cap.mcs.rx_mask[i] = 0xFF; 3898 + } 3899 + 3900 + ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; 3901 + 3902 + return ht_cap; 3903 + } 3904 + 3905 + static void ath10k_mac_setup_ht_vht_cap(struct ath10k *ar) 3906 + { 3907 + struct ieee80211_supported_band *band; 3908 + struct ieee80211_sta_vht_cap vht_cap; 3909 + struct ieee80211_sta_ht_cap ht_cap; 3910 + 3911 + ht_cap = ath10k_get_ht_cap(ar); 3912 + vht_cap = ath10k_create_vht_cap(ar); 3913 + 3914 + if (ar->phy_capability & WHAL_WLAN_11G_CAPABILITY) { 3915 + band = &ar->mac.sbands[IEEE80211_BAND_2GHZ]; 3916 + band->ht_cap = ht_cap; 3917 + 3918 + /* Enable the VHT support at 2.4 GHz */ 3919 + band->vht_cap = vht_cap; 3920 + } 3921 + if (ar->phy_capability & WHAL_WLAN_11A_CAPABILITY) { 3922 + band = &ar->mac.sbands[IEEE80211_BAND_5GHZ]; 3923 + band->ht_cap = ht_cap; 3924 + band->vht_cap = vht_cap; 3925 + } 3758 3926 } 3759 3927 3760 3928 static int __ath10k_set_antenna(struct ath10k *ar, u32 tx_ant, u32 rx_ant) ··· 3951 3793 ret, rx_ant); 3952 3794 return ret; 3953 3795 } 3796 + 3797 + /* Reload HT/VHT capability */ 3798 + ath10k_mac_setup_ht_vht_cap(ar); 3954 3799 3955 3800 return 0; 3956 3801 } ··· 4045 3884 } 4046 3885 } 4047 3886 4048 - if (ar->cfg_tx_chainmask) 4049 - __ath10k_set_antenna(ar, ar->cfg_tx_chainmask, 4050 - ar->cfg_rx_chainmask); 3887 + __ath10k_set_antenna(ar, ar->cfg_tx_chainmask, ar->cfg_rx_chainmask); 4051 3888 4052 3889 /* 4053 3890 * By default FW set ARP frames ac to voice (6). In that case ARP ··· 4062 3903 ath10k_warn(ar, "failed to set arp ac override parameter: %d\n", 4063 3904 ret); 4064 3905 goto err_core_stop; 3906 + } 3907 + 3908 + if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA, 3909 + ar->fw_features)) { 3910 + ret = ath10k_wmi_pdev_enable_adaptive_cca(ar, 1, 3911 + WMI_CCA_DETECT_LEVEL_AUTO, 3912 + WMI_CCA_DETECT_MARGIN_AUTO); 3913 + if (ret) { 3914 + ath10k_warn(ar, "failed to enable adaptive cca: %d\n", 3915 + ret); 3916 + goto err_core_stop; 3917 + } 4065 3918 } 4066 3919 4067 3920 ret = ath10k_wmi_pdev_set_param(ar, ··· 4232 4061 else if ((chain_mask & 0x3) == 0x3) 4233 4062 return 2; 4234 4063 return 1; 4235 - } 4236 - 4237 - static int ath10k_mac_get_vht_cap_bf_sts(struct ath10k *ar) 4238 - { 4239 - int nsts = ar->vht_cap_info; 4240 - 4241 - nsts &= IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK; 4242 - nsts >>= IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT; 4243 - 4244 - /* If firmware does not deliver to host number of space-time 4245 - * streams supported, assume it support up to 4 BF STS and return 4246 - * the value for VHT CAP: nsts-1) 4247 - * */ 4248 - if (nsts == 0) 4249 - return 3; 4250 - 4251 - return nsts; 4252 - } 4253 - 4254 - static int ath10k_mac_get_vht_cap_bf_sound_dim(struct ath10k *ar) 4255 - { 4256 - int sound_dim = ar->vht_cap_info; 4257 - 4258 - sound_dim &= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK; 4259 - sound_dim >>= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_SHIFT; 4260 - 4261 - /* If the sounding dimension is not advertised by the firmware, 4262 - * let's use a default value of 1 4263 - */ 4264 - if (sound_dim == 0) 4265 - return 1; 4266 - 4267 - return sound_dim; 4268 4064 } 4269 4065 4270 4066 static int ath10k_mac_set_txbf_conf(struct ath10k_vif *arvif) ··· 7087 6949 }, 7088 6950 }; 7089 6951 7090 - static struct ieee80211_sta_vht_cap ath10k_create_vht_cap(struct ath10k *ar) 7091 - { 7092 - struct ieee80211_sta_vht_cap vht_cap = {0}; 7093 - u16 mcs_map; 7094 - u32 val; 7095 - int i; 7096 - 7097 - vht_cap.vht_supported = 1; 7098 - vht_cap.cap = ar->vht_cap_info; 7099 - 7100 - if (ar->vht_cap_info & (IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 7101 - IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE)) { 7102 - val = ath10k_mac_get_vht_cap_bf_sts(ar); 7103 - val <<= IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT; 7104 - val &= IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK; 7105 - 7106 - vht_cap.cap |= val; 7107 - } 7108 - 7109 - if (ar->vht_cap_info & (IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 7110 - IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE)) { 7111 - val = ath10k_mac_get_vht_cap_bf_sound_dim(ar); 7112 - val <<= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_SHIFT; 7113 - val &= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK; 7114 - 7115 - vht_cap.cap |= val; 7116 - } 7117 - 7118 - mcs_map = 0; 7119 - for (i = 0; i < 8; i++) { 7120 - if (i < ar->num_rf_chains) 7121 - mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i*2); 7122 - else 7123 - mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i*2); 7124 - } 7125 - 7126 - vht_cap.vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); 7127 - vht_cap.vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); 7128 - 7129 - return vht_cap; 7130 - } 7131 - 7132 - static struct ieee80211_sta_ht_cap ath10k_get_ht_cap(struct ath10k *ar) 7133 - { 7134 - int i; 7135 - struct ieee80211_sta_ht_cap ht_cap = {0}; 7136 - 7137 - if (!(ar->ht_cap_info & WMI_HT_CAP_ENABLED)) 7138 - return ht_cap; 7139 - 7140 - ht_cap.ht_supported = 1; 7141 - ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 7142 - ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; 7143 - ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; 7144 - ht_cap.cap |= IEEE80211_HT_CAP_DSSSCCK40; 7145 - ht_cap.cap |= WLAN_HT_CAP_SM_PS_STATIC << IEEE80211_HT_CAP_SM_PS_SHIFT; 7146 - 7147 - if (ar->ht_cap_info & WMI_HT_CAP_HT20_SGI) 7148 - ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; 7149 - 7150 - if (ar->ht_cap_info & WMI_HT_CAP_HT40_SGI) 7151 - ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; 7152 - 7153 - if (ar->ht_cap_info & WMI_HT_CAP_DYNAMIC_SMPS) { 7154 - u32 smps; 7155 - 7156 - smps = WLAN_HT_CAP_SM_PS_DYNAMIC; 7157 - smps <<= IEEE80211_HT_CAP_SM_PS_SHIFT; 7158 - 7159 - ht_cap.cap |= smps; 7160 - } 7161 - 7162 - if (ar->ht_cap_info & WMI_HT_CAP_TX_STBC) 7163 - ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; 7164 - 7165 - if (ar->ht_cap_info & WMI_HT_CAP_RX_STBC) { 7166 - u32 stbc; 7167 - 7168 - stbc = ar->ht_cap_info; 7169 - stbc &= WMI_HT_CAP_RX_STBC; 7170 - stbc >>= WMI_HT_CAP_RX_STBC_MASK_SHIFT; 7171 - stbc <<= IEEE80211_HT_CAP_RX_STBC_SHIFT; 7172 - stbc &= IEEE80211_HT_CAP_RX_STBC; 7173 - 7174 - ht_cap.cap |= stbc; 7175 - } 7176 - 7177 - if (ar->ht_cap_info & WMI_HT_CAP_LDPC) 7178 - ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 7179 - 7180 - if (ar->ht_cap_info & WMI_HT_CAP_L_SIG_TXOP_PROT) 7181 - ht_cap.cap |= IEEE80211_HT_CAP_LSIG_TXOP_PROT; 7182 - 7183 - /* max AMSDU is implicitly taken from vht_cap_info */ 7184 - if (ar->vht_cap_info & WMI_VHT_CAP_MAX_MPDU_LEN_MASK) 7185 - ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; 7186 - 7187 - for (i = 0; i < ar->num_rf_chains; i++) 7188 - ht_cap.mcs.rx_mask[i] = 0xFF; 7189 - 7190 - ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; 7191 - 7192 - return ht_cap; 7193 - } 7194 - 7195 6952 static void ath10k_get_arvif_iter(void *data, u8 *mac, 7196 6953 struct ieee80211_vif *vif) 7197 6954 { ··· 7128 7095 WLAN_CIPHER_SUITE_AES_CMAC, 7129 7096 }; 7130 7097 struct ieee80211_supported_band *band; 7131 - struct ieee80211_sta_vht_cap vht_cap; 7132 - struct ieee80211_sta_ht_cap ht_cap; 7133 7098 void *channels; 7134 7099 int ret; 7135 7100 7136 7101 SET_IEEE80211_PERM_ADDR(ar->hw, ar->mac_addr); 7137 7102 7138 7103 SET_IEEE80211_DEV(ar->hw, ar->dev); 7139 - 7140 - ht_cap = ath10k_get_ht_cap(ar); 7141 - vht_cap = ath10k_create_vht_cap(ar); 7142 7104 7143 7105 BUILD_BUG_ON((ARRAY_SIZE(ath10k_2ghz_channels) + 7144 7106 ARRAY_SIZE(ath10k_5ghz_channels)) != ··· 7153 7125 band->channels = channels; 7154 7126 band->n_bitrates = ath10k_g_rates_size; 7155 7127 band->bitrates = ath10k_g_rates; 7156 - band->ht_cap = ht_cap; 7157 - 7158 - /* Enable the VHT support at 2.4 GHz */ 7159 - band->vht_cap = vht_cap; 7160 7128 7161 7129 ar->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = band; 7162 7130 } ··· 7171 7147 band->channels = channels; 7172 7148 band->n_bitrates = ath10k_a_rates_size; 7173 7149 band->bitrates = ath10k_a_rates; 7174 - band->ht_cap = ht_cap; 7175 - band->vht_cap = vht_cap; 7176 7150 ar->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = band; 7177 7151 } 7152 + 7153 + ath10k_mac_setup_ht_vht_cap(ar); 7178 7154 7179 7155 ar->hw->wiphy->interface_modes = 7180 7156 BIT(NL80211_IFTYPE_STATION) | 7181 7157 BIT(NL80211_IFTYPE_AP) | 7182 7158 BIT(NL80211_IFTYPE_MESH_POINT); 7183 7159 7184 - ar->hw->wiphy->available_antennas_rx = ar->supp_rx_chainmask; 7185 - ar->hw->wiphy->available_antennas_tx = ar->supp_tx_chainmask; 7160 + ar->hw->wiphy->available_antennas_rx = ar->cfg_rx_chainmask; 7161 + ar->hw->wiphy->available_antennas_tx = ar->cfg_tx_chainmask; 7186 7162 7187 7163 if (!test_bit(ATH10K_FW_FEATURE_NO_P2P, ar->fw_features)) 7188 7164 ar->hw->wiphy->interface_modes |=
+25 -46
drivers/net/wireless/ath/ath10k/pci.c
··· 61 61 #define QCA6164_2_1_DEVICE_ID (0x0041) 62 62 #define QCA6174_2_1_DEVICE_ID (0x003e) 63 63 #define QCA99X0_2_0_DEVICE_ID (0x0040) 64 + #define QCA9377_1_0_DEVICE_ID (0x0042) 64 65 65 66 static const struct pci_device_id ath10k_pci_id_table[] = { 66 67 { PCI_VDEVICE(ATHEROS, QCA988X_2_0_DEVICE_ID) }, /* PCI-E QCA988X V2 */ 67 68 { PCI_VDEVICE(ATHEROS, QCA6164_2_1_DEVICE_ID) }, /* PCI-E QCA6164 V2.1 */ 68 69 { PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */ 69 70 { PCI_VDEVICE(ATHEROS, QCA99X0_2_0_DEVICE_ID) }, /* PCI-E QCA99X0 V2 */ 71 + { PCI_VDEVICE(ATHEROS, QCA9377_1_0_DEVICE_ID) }, /* PCI-E QCA9377 V1 */ 70 72 {0} 71 73 }; 72 74 ··· 92 90 { QCA6174_2_1_DEVICE_ID, QCA6174_HW_3_2_CHIP_ID_REV }, 93 91 94 92 { QCA99X0_2_0_DEVICE_ID, QCA99X0_HW_2_0_CHIP_ID_REV }, 93 + { QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_0_CHIP_ID_REV }, 95 94 }; 96 95 97 96 static void ath10k_pci_buffer_cleanup(struct ath10k *ar); ··· 830 827 switch (ar->hw_rev) { 831 828 case ATH10K_HW_QCA988X: 832 829 case ATH10K_HW_QCA6174: 830 + case ATH10K_HW_QCA9377: 833 831 val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + 834 832 CORE_CTRL_ADDRESS) & 835 833 0x7ff) << 21; ··· 914 910 goto done; 915 911 916 912 i = 0; 917 - while (ath10k_ce_completed_send_next_nolock(ce_diag, NULL, &buf, 918 - &completed_nbytes, 919 - &id) != 0) { 913 + while (ath10k_ce_completed_send_next_nolock(ce_diag, 914 + NULL) != 0) { 920 915 mdelay(1); 921 916 if (i++ > DIAG_ACCESS_CE_TIMEOUT_MS) { 922 917 ret = -EBUSY; 923 918 goto done; 924 919 } 925 - } 926 - 927 - if (nbytes != completed_nbytes) { 928 - ret = -EIO; 929 - goto done; 930 - } 931 - 932 - if (buf != (u32)address) { 933 - ret = -EIO; 934 - goto done; 935 920 } 936 921 937 922 i = 0; ··· 1076 1083 goto done; 1077 1084 1078 1085 i = 0; 1079 - while (ath10k_ce_completed_send_next_nolock(ce_diag, NULL, &buf, 1080 - &completed_nbytes, 1081 - &id) != 0) { 1086 + while (ath10k_ce_completed_send_next_nolock(ce_diag, 1087 + NULL) != 0) { 1082 1088 mdelay(1); 1083 1089 1084 1090 if (i++ > DIAG_ACCESS_CE_TIMEOUT_MS) { 1085 1091 ret = -EBUSY; 1086 1092 goto done; 1087 1093 } 1088 - } 1089 - 1090 - if (nbytes != completed_nbytes) { 1091 - ret = -EIO; 1092 - goto done; 1093 - } 1094 - 1095 - if (buf != ce_data) { 1096 - ret = -EIO; 1097 - goto done; 1098 1094 } 1099 1095 1100 1096 i = 0; ··· 1141 1159 struct ath10k *ar = ce_state->ar; 1142 1160 struct sk_buff_head list; 1143 1161 struct sk_buff *skb; 1144 - u32 ce_data; 1145 - unsigned int nbytes; 1146 - unsigned int transfer_id; 1147 1162 1148 1163 __skb_queue_head_init(&list); 1149 - while (ath10k_ce_completed_send_next(ce_state, (void **)&skb, &ce_data, 1150 - &nbytes, &transfer_id) == 0) { 1164 + while (ath10k_ce_completed_send_next(ce_state, (void **)&skb) == 0) { 1151 1165 /* no need to call tx completion for NULL pointers */ 1152 1166 if (skb == NULL) 1153 1167 continue; ··· 1213 1235 { 1214 1236 struct ath10k *ar = ce_state->ar; 1215 1237 struct sk_buff *skb; 1216 - u32 ce_data; 1217 - unsigned int nbytes; 1218 - unsigned int transfer_id; 1219 1238 1220 - while (ath10k_ce_completed_send_next(ce_state, (void **)&skb, &ce_data, 1221 - &nbytes, &transfer_id) == 0) { 1239 + while (ath10k_ce_completed_send_next(ce_state, (void **)&skb) == 0) { 1222 1240 /* no need to call tx completion for NULL pointers */ 1223 1241 if (!skb) 1224 1242 continue; ··· 1487 1513 switch (ar->hw_rev) { 1488 1514 case ATH10K_HW_QCA988X: 1489 1515 case ATH10K_HW_QCA6174: 1516 + case ATH10K_HW_QCA9377: 1490 1517 val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + 1491 1518 CORE_CTRL_ADDRESS); 1492 1519 val &= ~CORE_CTRL_PCIE_REG_31_MASK; ··· 1509 1534 switch (ar->hw_rev) { 1510 1535 case ATH10K_HW_QCA988X: 1511 1536 case ATH10K_HW_QCA6174: 1537 + case ATH10K_HW_QCA9377: 1512 1538 val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + 1513 1539 CORE_CTRL_ADDRESS); 1514 1540 val |= CORE_CTRL_PCIE_REG_31_MASK; ··· 1600 1624 struct ath10k_pci *ar_pci; 1601 1625 struct ath10k_ce_pipe *ce_pipe; 1602 1626 struct ath10k_ce_ring *ce_ring; 1603 - struct ce_desc *ce_desc; 1604 1627 struct sk_buff *skb; 1605 1628 int i; 1606 1629 ··· 1612 1637 return; 1613 1638 1614 1639 if (!pci_pipe->buf_sz) 1615 - return; 1616 - 1617 - ce_desc = ce_ring->shadow_base; 1618 - if (WARN_ON(!ce_desc)) 1619 1640 return; 1620 1641 1621 1642 for (i = 0; i < ce_ring->nentries; i++) { ··· 1787 1816 static void ath10k_pci_bmi_send_done(struct ath10k_ce_pipe *ce_state) 1788 1817 { 1789 1818 struct bmi_xfer *xfer; 1790 - u32 ce_data; 1791 - unsigned int nbytes; 1792 - unsigned int transfer_id; 1793 1819 1794 - if (ath10k_ce_completed_send_next(ce_state, (void **)&xfer, &ce_data, 1795 - &nbytes, &transfer_id)) 1820 + if (ath10k_ce_completed_send_next(ce_state, (void **)&xfer)) 1796 1821 return; 1797 1822 1798 1823 xfer->tx_done = true; ··· 1878 1911 return 9; 1879 1912 } 1880 1913 break; 1914 + case QCA9377_1_0_DEVICE_ID: 1915 + return 2; 1881 1916 } 1882 1917 1883 1918 ath10k_warn(ar, "unknown number of banks, assuming 1\n"); ··· 2339 2370 if (QCA_REV_988X(ar)) 2340 2371 return ath10k_pci_qca988x_chip_reset(ar); 2341 2372 else if (QCA_REV_6174(ar)) 2373 + return ath10k_pci_qca6174_chip_reset(ar); 2374 + else if (QCA_REV_9377(ar)) 2342 2375 return ath10k_pci_qca6174_chip_reset(ar); 2343 2376 else if (QCA_REV_99X0(ar)) 2344 2377 return ath10k_pci_qca99x0_chip_reset(ar); ··· 2974 3003 hw_rev = ATH10K_HW_QCA99X0; 2975 3004 pci_ps = false; 2976 3005 break; 3006 + case QCA9377_1_0_DEVICE_ID: 3007 + hw_rev = ATH10K_HW_QCA9377; 3008 + pci_ps = true; 3009 + break; 2977 3010 default: 2978 3011 WARN_ON(1); 2979 3012 return -ENOTSUPP; ··· 3179 3204 MODULE_FIRMWARE(QCA6174_HW_3_0_FW_DIR "/" ATH10K_FW_API5_FILE); 3180 3205 MODULE_FIRMWARE(QCA6174_HW_3_0_FW_DIR "/" QCA6174_HW_3_0_BOARD_DATA_FILE); 3181 3206 MODULE_FIRMWARE(QCA6174_HW_3_0_FW_DIR "/" ATH10K_BOARD_API2_FILE); 3207 + 3208 + /* QCA9377 1.0 firmware files */ 3209 + MODULE_FIRMWARE(QCA9377_HW_1_0_FW_DIR "/" ATH10K_FW_API5_FILE); 3210 + MODULE_FIRMWARE(QCA9377_HW_1_0_FW_DIR "/" QCA9377_HW_1_0_BOARD_DATA_FILE);
+3
drivers/net/wireless/ath/ath10k/targaddrs.h
··· 450 450 #define QCA6174_BOARD_DATA_SZ 8192 451 451 #define QCA6174_BOARD_EXT_DATA_SZ 0 452 452 453 + #define QCA9377_BOARD_DATA_SZ QCA6174_BOARD_DATA_SZ 454 + #define QCA9377_BOARD_EXT_DATA_SZ 0 455 + 453 456 #define QCA99X0_BOARD_DATA_SZ 12288 454 457 #define QCA99X0_BOARD_EXT_DATA_SZ 0 455 458
+184 -18
drivers/net/wireless/ath/ath10k/testmode.c
··· 139 139 return cfg80211_testmode_reply(skb); 140 140 } 141 141 142 - static int ath10k_tm_cmd_utf_start(struct ath10k *ar, struct nlattr *tb[]) 142 + static int ath10k_tm_fetch_utf_firmware_api_2(struct ath10k *ar) 143 + { 144 + size_t len, magic_len, ie_len; 145 + struct ath10k_fw_ie *hdr; 146 + char filename[100]; 147 + __le32 *version; 148 + const u8 *data; 149 + int ie_id, ret; 150 + 151 + snprintf(filename, sizeof(filename), "%s/%s", 152 + ar->hw_params.fw.dir, ATH10K_FW_UTF_API2_FILE); 153 + 154 + /* load utf firmware image */ 155 + ret = request_firmware(&ar->testmode.utf, filename, ar->dev); 156 + if (ret) { 157 + ath10k_warn(ar, "failed to retrieve utf firmware '%s': %d\n", 158 + filename, ret); 159 + return ret; 160 + } 161 + 162 + data = ar->testmode.utf->data; 163 + len = ar->testmode.utf->size; 164 + 165 + /* FIXME: call release_firmware() in error cases */ 166 + 167 + /* magic also includes the null byte, check that as well */ 168 + magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 169 + 170 + if (len < magic_len) { 171 + ath10k_err(ar, "utf firmware file is too small to contain magic\n"); 172 + ret = -EINVAL; 173 + goto err; 174 + } 175 + 176 + if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 177 + ath10k_err(ar, "invalid firmware magic\n"); 178 + ret = -EINVAL; 179 + goto err; 180 + } 181 + 182 + /* jump over the padding */ 183 + magic_len = ALIGN(magic_len, 4); 184 + 185 + len -= magic_len; 186 + data += magic_len; 187 + 188 + /* loop elements */ 189 + while (len > sizeof(struct ath10k_fw_ie)) { 190 + hdr = (struct ath10k_fw_ie *)data; 191 + 192 + ie_id = le32_to_cpu(hdr->id); 193 + ie_len = le32_to_cpu(hdr->len); 194 + 195 + len -= sizeof(*hdr); 196 + data += sizeof(*hdr); 197 + 198 + if (len < ie_len) { 199 + ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 200 + ie_id, len, ie_len); 201 + ret = -EINVAL; 202 + goto err; 203 + } 204 + 205 + switch (ie_id) { 206 + case ATH10K_FW_IE_FW_VERSION: 207 + if (ie_len > sizeof(ar->testmode.utf_version) - 1) 208 + break; 209 + 210 + memcpy(ar->testmode.utf_version, data, ie_len); 211 + ar->testmode.utf_version[ie_len] = '\0'; 212 + 213 + ath10k_dbg(ar, ATH10K_DBG_TESTMODE, 214 + "testmode found fw utf version %s\n", 215 + ar->testmode.utf_version); 216 + break; 217 + case ATH10K_FW_IE_TIMESTAMP: 218 + /* ignore timestamp, but don't warn about it either */ 219 + break; 220 + case ATH10K_FW_IE_FW_IMAGE: 221 + ath10k_dbg(ar, ATH10K_DBG_TESTMODE, 222 + "testmode found fw image ie (%zd B)\n", 223 + ie_len); 224 + 225 + ar->testmode.utf_firmware_data = data; 226 + ar->testmode.utf_firmware_len = ie_len; 227 + break; 228 + case ATH10K_FW_IE_WMI_OP_VERSION: 229 + if (ie_len != sizeof(u32)) 230 + break; 231 + version = (__le32 *)data; 232 + ar->testmode.op_version = le32_to_cpup(version); 233 + ath10k_dbg(ar, ATH10K_DBG_TESTMODE, "testmode found fw ie wmi op version %d\n", 234 + ar->testmode.op_version); 235 + break; 236 + default: 237 + ath10k_warn(ar, "Unknown testmode FW IE: %u\n", 238 + le32_to_cpu(hdr->id)); 239 + break; 240 + } 241 + /* jump over the padding */ 242 + ie_len = ALIGN(ie_len, 4); 243 + 244 + len -= ie_len; 245 + data += ie_len; 246 + } 247 + 248 + if (!ar->testmode.utf_firmware_data || !ar->testmode.utf_firmware_len) { 249 + ath10k_err(ar, "No ATH10K_FW_IE_FW_IMAGE found\n"); 250 + ret = -EINVAL; 251 + goto err; 252 + } 253 + 254 + return 0; 255 + 256 + err: 257 + release_firmware(ar->testmode.utf); 258 + 259 + return ret; 260 + } 261 + 262 + static int ath10k_tm_fetch_utf_firmware_api_1(struct ath10k *ar) 143 263 { 144 264 char filename[100]; 265 + int ret; 266 + 267 + snprintf(filename, sizeof(filename), "%s/%s", 268 + ar->hw_params.fw.dir, ATH10K_FW_UTF_FILE); 269 + 270 + /* load utf firmware image */ 271 + ret = request_firmware(&ar->testmode.utf, filename, ar->dev); 272 + if (ret) { 273 + ath10k_warn(ar, "failed to retrieve utf firmware '%s': %d\n", 274 + filename, ret); 275 + return ret; 276 + } 277 + 278 + /* We didn't find FW UTF API 1 ("utf.bin") does not advertise 279 + * firmware features. Do an ugly hack where we force the firmware 280 + * features to match with 10.1 branch so that wmi.c will use the 281 + * correct WMI interface. 282 + */ 283 + 284 + ar->testmode.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 285 + ar->testmode.utf_firmware_data = ar->testmode.utf->data; 286 + ar->testmode.utf_firmware_len = ar->testmode.utf->size; 287 + 288 + return 0; 289 + } 290 + 291 + static int ath10k_tm_fetch_firmware(struct ath10k *ar) 292 + { 293 + int ret; 294 + 295 + ret = ath10k_tm_fetch_utf_firmware_api_2(ar); 296 + if (ret == 0) { 297 + ath10k_dbg(ar, ATH10K_DBG_TESTMODE, "testmode using fw utf api 2"); 298 + return 0; 299 + } 300 + 301 + ret = ath10k_tm_fetch_utf_firmware_api_1(ar); 302 + if (ret) { 303 + ath10k_err(ar, "failed to fetch utf firmware binary: %d", ret); 304 + return ret; 305 + } 306 + 307 + ath10k_dbg(ar, ATH10K_DBG_TESTMODE, "testmode using utf api 1"); 308 + 309 + return 0; 310 + } 311 + 312 + static int ath10k_tm_cmd_utf_start(struct ath10k *ar, struct nlattr *tb[]) 313 + { 314 + const char *ver; 145 315 int ret; 146 316 147 317 ath10k_dbg(ar, ATH10K_DBG_TESTMODE, "testmode cmd utf start\n"); ··· 335 165 goto err; 336 166 } 337 167 338 - snprintf(filename, sizeof(filename), "%s/%s", 339 - ar->hw_params.fw.dir, ATH10K_FW_UTF_FILE); 340 - 341 - /* load utf firmware image */ 342 - ret = request_firmware(&ar->testmode.utf, filename, ar->dev); 168 + ret = ath10k_tm_fetch_firmware(ar); 343 169 if (ret) { 344 - ath10k_warn(ar, "failed to retrieve utf firmware '%s': %d\n", 345 - filename, ret); 170 + ath10k_err(ar, "failed to fetch UTF firmware: %d", ret); 346 171 goto err; 347 172 } 348 173 349 174 spin_lock_bh(&ar->data_lock); 350 - 351 175 ar->testmode.utf_monitor = true; 352 - 353 176 spin_unlock_bh(&ar->data_lock); 354 - 355 177 BUILD_BUG_ON(sizeof(ar->fw_features) != 356 178 sizeof(ar->testmode.orig_fw_features)); 357 179 358 180 memcpy(ar->testmode.orig_fw_features, ar->fw_features, 359 181 sizeof(ar->fw_features)); 360 182 ar->testmode.orig_wmi_op_version = ar->wmi.op_version; 361 - 362 - /* utf.bin firmware image does not advertise firmware features. Do 363 - * an ugly hack where we force the firmware features so that wmi.c 364 - * will use the correct WMI interface. 365 - */ 366 183 memset(ar->fw_features, 0, sizeof(ar->fw_features)); 367 - ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 184 + 185 + ar->wmi.op_version = ar->testmode.op_version; 186 + 187 + ath10k_dbg(ar, ATH10K_DBG_TESTMODE, "testmode wmi version %d\n", 188 + ar->wmi.op_version); 368 189 369 190 ret = ath10k_hif_power_up(ar); 370 191 if (ret) { ··· 373 212 374 213 ar->state = ATH10K_STATE_UTF; 375 214 376 - ath10k_info(ar, "UTF firmware started\n"); 215 + if (strlen(ar->testmode.utf_version) > 0) 216 + ver = ar->testmode.utf_version; 217 + else 218 + ver = "API 1"; 219 + 220 + ath10k_info(ar, "UTF firmware %s started\n", ver); 377 221 378 222 mutex_unlock(&ar->conf_mutex); 379 223
+25
drivers/net/wireless/ath/ath10k/wmi-ops.h
··· 182 182 void (*fw_stats_fill)(struct ath10k *ar, 183 183 struct ath10k_fw_stats *fw_stats, 184 184 char *buf); 185 + struct sk_buff *(*gen_pdev_enable_adaptive_cca)(struct ath10k *ar, 186 + u8 enable, 187 + u32 detect_level, 188 + u32 detect_margin); 185 189 }; 186 190 187 191 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id); ··· 1306 1302 ar->wmi.ops->fw_stats_fill(ar, fw_stats, buf); 1307 1303 return 0; 1308 1304 } 1305 + 1306 + static inline int 1307 + ath10k_wmi_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable, 1308 + u32 detect_level, u32 detect_margin) 1309 + { 1310 + struct sk_buff *skb; 1311 + 1312 + if (!ar->wmi.ops->gen_pdev_enable_adaptive_cca) 1313 + return -EOPNOTSUPP; 1314 + 1315 + skb = ar->wmi.ops->gen_pdev_enable_adaptive_cca(ar, enable, 1316 + detect_level, 1317 + detect_margin); 1318 + 1319 + if (IS_ERR(skb)) 1320 + return PTR_ERR(skb); 1321 + 1322 + return ath10k_wmi_cmd_send(ar, skb, 1323 + ar->wmi.cmd->pdev_enable_adaptive_cca_cmdid); 1324 + } 1325 + 1309 1326 #endif
+14
drivers/net/wireless/ath/ath10k/wmi-tlv.c
··· 23 23 #include "wmi-ops.h" 24 24 #include "wmi-tlv.h" 25 25 #include "p2p.h" 26 + #include "testmode.h" 26 27 27 28 /***************/ 28 29 /* TLV helpers */ ··· 420 419 { 421 420 struct wmi_cmd_hdr *cmd_hdr; 422 421 enum wmi_tlv_event_id id; 422 + bool consumed; 423 423 424 424 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 425 425 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); ··· 429 427 goto out; 430 428 431 429 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 430 + 431 + consumed = ath10k_tm_event_wmi(ar, id, skb); 432 + 433 + /* Ready event must be handled normally also in UTF mode so that we 434 + * know the UTF firmware has booted, others we are just bypass WMI 435 + * events to testmode. 436 + */ 437 + if (consumed && id != WMI_TLV_READY_EVENTID) { 438 + ath10k_dbg(ar, ATH10K_DBG_WMI, 439 + "wmi tlv testmode consumed 0x%x\n", id); 440 + goto out; 441 + } 432 442 433 443 switch (id) { 434 444 case WMI_TLV_MGMT_RX_EVENTID:
+246 -2
drivers/net/wireless/ath/ath10k/wmi.c
··· 148 148 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, 149 149 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, 150 150 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 151 + .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, 151 152 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, 152 153 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, 153 154 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, ··· 314 313 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, 315 314 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, 316 315 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 316 + .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, 317 317 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, 318 318 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, 319 319 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, ··· 479 477 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, 480 478 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, 481 479 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, 480 + .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS, 482 481 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, 483 482 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, 484 483 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, ··· 1410 1407 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, 1411 1408 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, 1412 1409 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 1410 + .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, 1413 1411 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, 1414 1412 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, 1415 1413 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, ··· 2479 2475 dst->txop_ovf = __le32_to_cpu(src->txop_ovf); 2480 2476 } 2481 2477 2478 + static void 2479 + ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src, 2480 + struct ath10k_fw_stats_pdev *dst) 2481 + { 2482 + dst->comp_queued = __le32_to_cpu(src->comp_queued); 2483 + dst->comp_delivered = __le32_to_cpu(src->comp_delivered); 2484 + dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); 2485 + dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); 2486 + dst->wmm_drop = __le32_to_cpu(src->wmm_drop); 2487 + dst->local_enqued = __le32_to_cpu(src->local_enqued); 2488 + dst->local_freed = __le32_to_cpu(src->local_freed); 2489 + dst->hw_queued = __le32_to_cpu(src->hw_queued); 2490 + dst->hw_reaped = __le32_to_cpu(src->hw_reaped); 2491 + dst->underrun = __le32_to_cpu(src->underrun); 2492 + dst->tx_abort = __le32_to_cpu(src->tx_abort); 2493 + dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); 2494 + dst->tx_ko = __le32_to_cpu(src->tx_ko); 2495 + dst->data_rc = __le32_to_cpu(src->data_rc); 2496 + dst->self_triggers = __le32_to_cpu(src->self_triggers); 2497 + dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); 2498 + dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); 2499 + dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); 2500 + dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); 2501 + dst->pdev_resets = __le32_to_cpu(src->pdev_resets); 2502 + dst->phy_underrun = __le32_to_cpu(src->phy_underrun); 2503 + dst->txop_ovf = __le32_to_cpu(src->txop_ovf); 2504 + dst->hw_paused = __le32_to_cpu(src->hw_paused); 2505 + dst->seq_posted = __le32_to_cpu(src->seq_posted); 2506 + dst->seq_failed_queueing = 2507 + __le32_to_cpu(src->seq_failed_queueing); 2508 + dst->seq_completed = __le32_to_cpu(src->seq_completed); 2509 + dst->seq_restarted = __le32_to_cpu(src->seq_restarted); 2510 + dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted); 2511 + dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush); 2512 + dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); 2513 + dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated); 2514 + dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed); 2515 + dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); 2516 + dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired); 2517 + } 2518 + 2482 2519 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, 2483 2520 struct ath10k_fw_stats_pdev *dst) 2484 2521 { ··· 2823 2778 2824 2779 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate); 2825 2780 /* FIXME: expose 10.2 specific values */ 2781 + 2782 + list_add_tail(&dst->list, &stats->peers); 2783 + } 2784 + 2785 + return 0; 2786 + } 2787 + 2788 + static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar, 2789 + struct sk_buff *skb, 2790 + struct ath10k_fw_stats *stats) 2791 + { 2792 + const struct wmi_10_2_stats_event *ev = (void *)skb->data; 2793 + u32 num_pdev_stats; 2794 + u32 num_pdev_ext_stats; 2795 + u32 num_vdev_stats; 2796 + u32 num_peer_stats; 2797 + int i; 2798 + 2799 + if (!skb_pull(skb, sizeof(*ev))) 2800 + return -EPROTO; 2801 + 2802 + num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 2803 + num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); 2804 + num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); 2805 + num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 2806 + 2807 + for (i = 0; i < num_pdev_stats; i++) { 2808 + const struct wmi_10_4_pdev_stats *src; 2809 + struct ath10k_fw_stats_pdev *dst; 2810 + 2811 + src = (void *)skb->data; 2812 + if (!skb_pull(skb, sizeof(*src))) 2813 + return -EPROTO; 2814 + 2815 + dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 2816 + if (!dst) 2817 + continue; 2818 + 2819 + ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 2820 + ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst); 2821 + ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 2822 + dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs); 2823 + ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); 2824 + 2825 + list_add_tail(&dst->list, &stats->pdevs); 2826 + } 2827 + 2828 + for (i = 0; i < num_pdev_ext_stats; i++) { 2829 + const struct wmi_10_2_pdev_ext_stats *src; 2830 + 2831 + src = (void *)skb->data; 2832 + if (!skb_pull(skb, sizeof(*src))) 2833 + return -EPROTO; 2834 + 2835 + /* FIXME: expose values to userspace 2836 + * 2837 + * Note: Even though this loop seems to do nothing it is 2838 + * required to parse following sub-structures properly. 2839 + */ 2840 + } 2841 + 2842 + /* fw doesn't implement vdev stats */ 2843 + 2844 + for (i = 0; i < num_peer_stats; i++) { 2845 + const struct wmi_10_4_peer_stats *src; 2846 + struct ath10k_fw_stats_peer *dst; 2847 + 2848 + src = (void *)skb->data; 2849 + if (!skb_pull(skb, sizeof(*src))) 2850 + return -EPROTO; 2851 + 2852 + dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 2853 + if (!dst) 2854 + continue; 2855 + 2856 + ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); 2857 + dst->peer_rssi = __le32_to_cpu(src->peer_rssi); 2858 + dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); 2859 + dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); 2860 + /* FIXME: expose 10.4 specific values */ 2826 2861 2827 2862 list_add_tail(&dst->list, &stats->peers); 2828 2863 } ··· 4460 4335 ar->num_rf_chains = ar->max_spatial_stream; 4461 4336 } 4462 4337 4463 - ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1; 4464 - ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1; 4338 + if (!ar->cfg_tx_chainmask) { 4339 + ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1; 4340 + ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1; 4341 + } 4465 4342 4466 4343 if (strlen(ar->hw->wiphy->fw_version) == 0) { 4467 4344 snprintf(ar->hw->wiphy->fw_version, ··· 5057 4930 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID: 5058 4931 ath10k_dbg(ar, ATH10K_DBG_WMI, 5059 4932 "received event id %d not implemented\n", id); 4933 + break; 4934 + case WMI_10_4_UPDATE_STATS_EVENTID: 4935 + ath10k_wmi_event_update_stats(ar, skb); 5060 4936 break; 5061 4937 default: 5062 4938 ath10k_warn(ar, "Unknown eventid: %d\n", id); ··· 7126 6996 buf[len] = 0; 7127 6997 } 7128 6998 6999 + static struct sk_buff * 7000 + ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable, 7001 + u32 detect_level, u32 detect_margin) 7002 + { 7003 + struct wmi_pdev_set_adaptive_cca_params *cmd; 7004 + struct sk_buff *skb; 7005 + 7006 + skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 7007 + if (!skb) 7008 + return ERR_PTR(-ENOMEM); 7009 + 7010 + cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data; 7011 + cmd->enable = __cpu_to_le32(enable); 7012 + cmd->cca_detect_level = __cpu_to_le32(detect_level); 7013 + cmd->cca_detect_margin = __cpu_to_le32(detect_margin); 7014 + 7015 + ath10k_dbg(ar, ATH10K_DBG_WMI, 7016 + "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n", 7017 + enable, detect_level, detect_margin); 7018 + return skb; 7019 + } 7020 + 7021 + void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar, 7022 + struct ath10k_fw_stats *fw_stats, 7023 + char *buf) 7024 + { 7025 + u32 len = 0; 7026 + u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; 7027 + const struct ath10k_fw_stats_pdev *pdev; 7028 + const struct ath10k_fw_stats_vdev *vdev; 7029 + const struct ath10k_fw_stats_peer *peer; 7030 + size_t num_peers; 7031 + size_t num_vdevs; 7032 + 7033 + spin_lock_bh(&ar->data_lock); 7034 + 7035 + pdev = list_first_entry_or_null(&fw_stats->pdevs, 7036 + struct ath10k_fw_stats_pdev, list); 7037 + if (!pdev) { 7038 + ath10k_warn(ar, "failed to get pdev stats\n"); 7039 + goto unlock; 7040 + } 7041 + 7042 + num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); 7043 + num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); 7044 + 7045 + ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); 7046 + ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); 7047 + ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); 7048 + 7049 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7050 + "HW paused", pdev->hw_paused); 7051 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7052 + "Seqs posted", pdev->seq_posted); 7053 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7054 + "Seqs failed queueing", pdev->seq_failed_queueing); 7055 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7056 + "Seqs completed", pdev->seq_completed); 7057 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7058 + "Seqs restarted", pdev->seq_restarted); 7059 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7060 + "MU Seqs posted", pdev->mu_seq_posted); 7061 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7062 + "MPDUs SW flushed", pdev->mpdus_sw_flush); 7063 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7064 + "MPDUs HW filtered", pdev->mpdus_hw_filter); 7065 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7066 + "MPDUs truncated", pdev->mpdus_truncated); 7067 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7068 + "MPDUs receive no ACK", pdev->mpdus_ack_failed); 7069 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7070 + "MPDUs expired", pdev->mpdus_expired); 7071 + 7072 + ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); 7073 + len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7074 + "Num Rx Overflow errors", pdev->rx_ovfl_errs); 7075 + 7076 + len += scnprintf(buf + len, buf_len - len, "\n"); 7077 + len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 7078 + "ath10k VDEV stats", num_vdevs); 7079 + len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7080 + "================="); 7081 + 7082 + list_for_each_entry(vdev, &fw_stats->vdevs, list) { 7083 + ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); 7084 + } 7085 + 7086 + len += scnprintf(buf + len, buf_len - len, "\n"); 7087 + len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 7088 + "ath10k PEER stats", num_peers); 7089 + len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7090 + "================="); 7091 + 7092 + list_for_each_entry(peer, &fw_stats->peers, list) { 7093 + ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); 7094 + } 7095 + 7096 + unlock: 7097 + spin_unlock_bh(&ar->data_lock); 7098 + 7099 + if (len >= buf_len) 7100 + buf[len - 1] = 0; 7101 + else 7102 + buf[len] = 0; 7103 + } 7104 + 7129 7105 static const struct wmi_ops wmi_ops = { 7130 7106 .rx = ath10k_wmi_op_rx, 7131 7107 .map_svc = wmi_main_svc_map, ··· 7295 7059 /* .gen_prb_tmpl not implemented */ 7296 7060 /* .gen_p2p_go_bcn_ie not implemented */ 7297 7061 /* .gen_adaptive_qcs not implemented */ 7062 + /* .gen_pdev_enable_adaptive_cca not implemented */ 7298 7063 }; 7299 7064 7300 7065 static const struct wmi_ops wmi_10_1_ops = { ··· 7362 7125 /* .gen_prb_tmpl not implemented */ 7363 7126 /* .gen_p2p_go_bcn_ie not implemented */ 7364 7127 /* .gen_adaptive_qcs not implemented */ 7128 + /* .gen_pdev_enable_adaptive_cca not implemented */ 7365 7129 }; 7366 7130 7367 7131 static const struct wmi_ops wmi_10_2_ops = { ··· 7426 7188 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 7427 7189 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 7428 7190 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, 7191 + /* .gen_pdev_enable_adaptive_cca not implemented */ 7429 7192 }; 7430 7193 7431 7194 static const struct wmi_ops wmi_10_2_4_ops = { ··· 7490 7251 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 7491 7252 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config, 7492 7253 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, 7254 + .gen_pdev_enable_adaptive_cca = 7255 + ath10k_wmi_op_gen_pdev_enable_adaptive_cca, 7493 7256 /* .gen_bcn_tmpl not implemented */ 7494 7257 /* .gen_prb_tmpl not implemented */ 7495 7258 /* .gen_p2p_go_bcn_ie not implemented */ ··· 7502 7261 .rx = ath10k_wmi_10_4_op_rx, 7503 7262 .map_svc = wmi_10_4_svc_map, 7504 7263 7264 + .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats, 7505 7265 .pull_scan = ath10k_wmi_op_pull_scan_ev, 7506 7266 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev, 7507 7267 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev, ··· 7552 7310 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 7553 7311 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 7554 7312 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 7313 + .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill, 7555 7314 7556 7315 /* shared with 10.2 */ 7557 7316 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, 7317 + .gen_request_stats = ath10k_wmi_op_gen_request_stats, 7558 7318 }; 7559 7319 7560 7320 int ath10k_wmi_attach(struct ath10k *ar)
+148
drivers/net/wireless/ath/ath10k/wmi.h
··· 772 772 u32 mu_cal_start_cmdid; 773 773 u32 set_cca_params_cmdid; 774 774 u32 pdev_bss_chan_info_request_cmdid; 775 + u32 pdev_enable_adaptive_cca_cmdid; 775 776 }; 776 777 777 778 /* ··· 1382 1381 WMI_10_2_VDEV_ATF_REQUEST_CMDID, 1383 1382 WMI_10_2_PEER_ATF_REQUEST_CMDID, 1384 1383 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, 1384 + WMI_10_2_MU_CAL_START_CMDID, 1385 + WMI_10_2_SET_LTEU_CONFIG_CMDID, 1386 + WMI_10_2_SET_CCA_PARAMS, 1385 1387 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1, 1386 1388 }; 1387 1389 ··· 3866 3862 __le32 txop_ovf; 3867 3863 } __packed; 3868 3864 3865 + struct wmi_10_4_pdev_stats_tx { 3866 + /* Num HTT cookies queued to dispatch list */ 3867 + __le32 comp_queued; 3868 + 3869 + /* Num HTT cookies dispatched */ 3870 + __le32 comp_delivered; 3871 + 3872 + /* Num MSDU queued to WAL */ 3873 + __le32 msdu_enqued; 3874 + 3875 + /* Num MPDU queue to WAL */ 3876 + __le32 mpdu_enqued; 3877 + 3878 + /* Num MSDUs dropped by WMM limit */ 3879 + __le32 wmm_drop; 3880 + 3881 + /* Num Local frames queued */ 3882 + __le32 local_enqued; 3883 + 3884 + /* Num Local frames done */ 3885 + __le32 local_freed; 3886 + 3887 + /* Num queued to HW */ 3888 + __le32 hw_queued; 3889 + 3890 + /* Num PPDU reaped from HW */ 3891 + __le32 hw_reaped; 3892 + 3893 + /* Num underruns */ 3894 + __le32 underrun; 3895 + 3896 + /* HW Paused. */ 3897 + __le32 hw_paused; 3898 + 3899 + /* Num PPDUs cleaned up in TX abort */ 3900 + __le32 tx_abort; 3901 + 3902 + /* Num MPDUs requed by SW */ 3903 + __le32 mpdus_requed; 3904 + 3905 + /* excessive retries */ 3906 + __le32 tx_ko; 3907 + 3908 + /* data hw rate code */ 3909 + __le32 data_rc; 3910 + 3911 + /* Scheduler self triggers */ 3912 + __le32 self_triggers; 3913 + 3914 + /* frames dropped due to excessive sw retries */ 3915 + __le32 sw_retry_failure; 3916 + 3917 + /* illegal rate phy errors */ 3918 + __le32 illgl_rate_phy_err; 3919 + 3920 + /* wal pdev continuous xretry */ 3921 + __le32 pdev_cont_xretry; 3922 + 3923 + /* wal pdev tx timeouts */ 3924 + __le32 pdev_tx_timeout; 3925 + 3926 + /* wal pdev resets */ 3927 + __le32 pdev_resets; 3928 + 3929 + /* frames dropped due to non-availability of stateless TIDs */ 3930 + __le32 stateless_tid_alloc_failure; 3931 + 3932 + __le32 phy_underrun; 3933 + 3934 + /* MPDU is more than txop limit */ 3935 + __le32 txop_ovf; 3936 + 3937 + /* Number of Sequences posted */ 3938 + __le32 seq_posted; 3939 + 3940 + /* Number of Sequences failed queueing */ 3941 + __le32 seq_failed_queueing; 3942 + 3943 + /* Number of Sequences completed */ 3944 + __le32 seq_completed; 3945 + 3946 + /* Number of Sequences restarted */ 3947 + __le32 seq_restarted; 3948 + 3949 + /* Number of MU Sequences posted */ 3950 + __le32 mu_seq_posted; 3951 + 3952 + /* Num MPDUs flushed by SW, HWPAUSED,SW TXABORT(Reset,channel change) */ 3953 + __le32 mpdus_sw_flush; 3954 + 3955 + /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 3956 + __le32 mpdus_hw_filter; 3957 + 3958 + /* Num MPDUs truncated by PDG 3959 + * (TXOP, TBTT, PPDU_duration based on rate, dyn_bw) 3960 + */ 3961 + __le32 mpdus_truncated; 3962 + 3963 + /* Num MPDUs that was tried but didn't receive ACK or BA */ 3964 + __le32 mpdus_ack_failed; 3965 + 3966 + /* Num MPDUs that was dropped due to expiry. */ 3967 + __le32 mpdus_expired; 3968 + } __packed; 3969 + 3869 3970 struct wmi_pdev_stats_rx { 3870 3971 /* Cnts any change in ring routing mid-ppdu */ 3871 3972 __le32 mid_ppdu_route_change; ··· 4144 4035 struct wmi_pdev_stats_extra extra; 4145 4036 } __packed; 4146 4037 4038 + struct wmi_10_4_pdev_stats { 4039 + struct wmi_pdev_stats_base base; 4040 + struct wmi_10_4_pdev_stats_tx tx; 4041 + struct wmi_pdev_stats_rx rx; 4042 + __le32 rx_ovfl_errs; 4043 + struct wmi_pdev_stats_mem mem; 4044 + __le32 sram_free_size; 4045 + struct wmi_pdev_stats_extra extra; 4046 + } __packed; 4047 + 4147 4048 /* 4148 4049 * VDEV statistics 4149 4050 * TODO: add all VDEV stats here ··· 4193 4074 struct wmi_10_2_4_peer_stats { 4194 4075 struct wmi_10_2_peer_stats common; 4195 4076 __le32 unknown_value; /* FIXME: what is this word? */ 4077 + } __packed; 4078 + 4079 + struct wmi_10_4_peer_stats { 4080 + struct wmi_mac_addr peer_macaddr; 4081 + __le32 peer_rssi; 4082 + __le32 peer_rssi_seq_num; 4083 + __le32 peer_tx_rate; 4084 + __le32 peer_rx_rate; 4085 + __le32 current_per; 4086 + __le32 retries; 4087 + __le32 tx_rate_count; 4088 + __le32 max_4ms_frame_len; 4089 + __le32 total_sub_frames; 4090 + __le32 tx_bytes; 4091 + __le32 num_pkt_loss_overflow[4]; 4092 + __le32 num_pkt_loss_excess_retry[4]; 4093 + __le32 peer_rssi_changed; 4196 4094 } __packed; 4197 4095 4198 4096 struct wmi_10_2_pdev_ext_stats { ··· 6230 6094 WMI_TXBF_CONF_AFTER_ASSOC, 6231 6095 }; 6232 6096 6097 + #define WMI_CCA_DETECT_LEVEL_AUTO 0 6098 + #define WMI_CCA_DETECT_MARGIN_AUTO 0 6099 + 6100 + struct wmi_pdev_set_adaptive_cca_params { 6101 + __le32 enable; 6102 + __le32 cca_detect_level; 6103 + __le32 cca_detect_margin; 6104 + } __packed; 6105 + 6233 6106 struct ath10k; 6234 6107 struct ath10k_vif; 6235 6108 struct ath10k_fw_stats_pdev; ··· 6333 6188 char *buf); 6334 6189 size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head); 6335 6190 size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head); 6191 + void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar, 6192 + struct ath10k_fw_stats *fw_stats, 6193 + char *buf); 6336 6194 6337 6195 #endif /* _WMI_H_ */
+143
drivers/net/wireless/ath/ath6kl/cfg80211.c
··· 3231 3231 wait, buf, len, no_cck); 3232 3232 } 3233 3233 3234 + static int ath6kl_get_antenna(struct wiphy *wiphy, 3235 + u32 *tx_ant, u32 *rx_ant) 3236 + { 3237 + struct ath6kl *ar = wiphy_priv(wiphy); 3238 + *tx_ant = ar->hw.tx_ant; 3239 + *rx_ant = ar->hw.rx_ant; 3240 + return 0; 3241 + } 3242 + 3234 3243 static void ath6kl_mgmt_frame_register(struct wiphy *wiphy, 3235 3244 struct wireless_dev *wdev, 3236 3245 u16 frame_type, bool reg) ··· 3456 3447 .cancel_remain_on_channel = ath6kl_cancel_remain_on_channel, 3457 3448 .mgmt_tx = ath6kl_mgmt_tx, 3458 3449 .mgmt_frame_register = ath6kl_mgmt_frame_register, 3450 + .get_antenna = ath6kl_get_antenna, 3459 3451 .sched_scan_start = ath6kl_cfg80211_sscan_start, 3460 3452 .sched_scan_stop = ath6kl_cfg80211_sscan_stop, 3461 3453 .set_bitrate_mask = ath6kl_cfg80211_set_bitrate, ··· 3644 3634 ar->num_vif--; 3645 3635 } 3646 3636 3637 + static const char ath6kl_gstrings_sta_stats[][ETH_GSTRING_LEN] = { 3638 + /* Common stats names used by many drivers. */ 3639 + "tx_pkts_nic", "tx_bytes_nic", "rx_pkts_nic", "rx_bytes_nic", 3640 + 3641 + /* TX stats. */ 3642 + "d_tx_ucast_pkts", "d_tx_bcast_pkts", 3643 + "d_tx_ucast_bytes", "d_tx_bcast_bytes", 3644 + "d_tx_rts_ok", "d_tx_error", "d_tx_fail", 3645 + "d_tx_retry", "d_tx_multi_retry", "d_tx_rts_fail", 3646 + "d_tx_tkip_counter_measures", 3647 + 3648 + /* RX Stats. */ 3649 + "d_rx_ucast_pkts", "d_rx_ucast_rate", "d_rx_bcast_pkts", 3650 + "d_rx_ucast_bytes", "d_rx_bcast_bytes", "d_rx_frag_pkt", 3651 + "d_rx_error", "d_rx_crc_err", "d_rx_keycache_miss", 3652 + "d_rx_decrypt_crc_err", "d_rx_duplicate_frames", 3653 + "d_rx_mic_err", "d_rx_tkip_format_err", "d_rx_ccmp_format_err", 3654 + "d_rx_ccmp_replay_err", 3655 + 3656 + /* Misc stats. */ 3657 + "d_beacon_miss", "d_num_connects", "d_num_disconnects", 3658 + "d_beacon_avg_rssi", "d_arp_received", "d_arp_matched", 3659 + "d_arp_replied" 3660 + }; 3661 + 3662 + #define ATH6KL_STATS_LEN ARRAY_SIZE(ath6kl_gstrings_sta_stats) 3663 + 3664 + static int ath6kl_get_sset_count(struct net_device *dev, int sset) 3665 + { 3666 + int rv = 0; 3667 + 3668 + if (sset == ETH_SS_STATS) 3669 + rv += ATH6KL_STATS_LEN; 3670 + 3671 + if (rv == 0) 3672 + return -EOPNOTSUPP; 3673 + return rv; 3674 + } 3675 + 3676 + static void ath6kl_get_stats(struct net_device *dev, 3677 + struct ethtool_stats *stats, 3678 + u64 *data) 3679 + { 3680 + struct ath6kl_vif *vif = netdev_priv(dev); 3681 + struct ath6kl *ar = vif->ar; 3682 + int i = 0; 3683 + struct target_stats *tgt_stats; 3684 + 3685 + memset(data, 0, sizeof(u64) * ATH6KL_STATS_LEN); 3686 + 3687 + ath6kl_read_tgt_stats(ar, vif); 3688 + 3689 + tgt_stats = &vif->target_stats; 3690 + 3691 + data[i++] = tgt_stats->tx_ucast_pkt + tgt_stats->tx_bcast_pkt; 3692 + data[i++] = tgt_stats->tx_ucast_byte + tgt_stats->tx_bcast_byte; 3693 + data[i++] = tgt_stats->rx_ucast_pkt + tgt_stats->rx_bcast_pkt; 3694 + data[i++] = tgt_stats->rx_ucast_byte + tgt_stats->rx_bcast_byte; 3695 + 3696 + data[i++] = tgt_stats->tx_ucast_pkt; 3697 + data[i++] = tgt_stats->tx_bcast_pkt; 3698 + data[i++] = tgt_stats->tx_ucast_byte; 3699 + data[i++] = tgt_stats->tx_bcast_byte; 3700 + data[i++] = tgt_stats->tx_rts_success_cnt; 3701 + data[i++] = tgt_stats->tx_err; 3702 + data[i++] = tgt_stats->tx_fail_cnt; 3703 + data[i++] = tgt_stats->tx_retry_cnt; 3704 + data[i++] = tgt_stats->tx_mult_retry_cnt; 3705 + data[i++] = tgt_stats->tx_rts_fail_cnt; 3706 + data[i++] = tgt_stats->tkip_cnter_measures_invoked; 3707 + 3708 + data[i++] = tgt_stats->rx_ucast_pkt; 3709 + data[i++] = tgt_stats->rx_ucast_rate; 3710 + data[i++] = tgt_stats->rx_bcast_pkt; 3711 + data[i++] = tgt_stats->rx_ucast_byte; 3712 + data[i++] = tgt_stats->rx_bcast_byte; 3713 + data[i++] = tgt_stats->rx_frgment_pkt; 3714 + data[i++] = tgt_stats->rx_err; 3715 + data[i++] = tgt_stats->rx_crc_err; 3716 + data[i++] = tgt_stats->rx_key_cache_miss; 3717 + data[i++] = tgt_stats->rx_decrypt_err; 3718 + data[i++] = tgt_stats->rx_dupl_frame; 3719 + data[i++] = tgt_stats->tkip_local_mic_fail; 3720 + data[i++] = tgt_stats->tkip_fmt_err; 3721 + data[i++] = tgt_stats->ccmp_fmt_err; 3722 + data[i++] = tgt_stats->ccmp_replays; 3723 + 3724 + data[i++] = tgt_stats->cs_bmiss_cnt; 3725 + data[i++] = tgt_stats->cs_connect_cnt; 3726 + data[i++] = tgt_stats->cs_discon_cnt; 3727 + data[i++] = tgt_stats->cs_ave_beacon_rssi; 3728 + data[i++] = tgt_stats->arp_received; 3729 + data[i++] = tgt_stats->arp_matched; 3730 + data[i++] = tgt_stats->arp_replied; 3731 + 3732 + if (i != ATH6KL_STATS_LEN) { 3733 + WARN_ON_ONCE(1); 3734 + ath6kl_err("ethtool stats error, i: %d STATS_LEN: %d\n", 3735 + i, (int)ATH6KL_STATS_LEN); 3736 + } 3737 + } 3738 + 3739 + /* These stats are per NIC, not really per vdev, so we just ignore dev. */ 3740 + static void ath6kl_get_strings(struct net_device *dev, u32 sset, u8 *data) 3741 + { 3742 + int sz_sta_stats = 0; 3743 + 3744 + if (sset == ETH_SS_STATS) { 3745 + sz_sta_stats = sizeof(ath6kl_gstrings_sta_stats); 3746 + memcpy(data, ath6kl_gstrings_sta_stats, sz_sta_stats); 3747 + } 3748 + } 3749 + 3750 + static const struct ethtool_ops ath6kl_ethtool_ops = { 3751 + .get_drvinfo = cfg80211_get_drvinfo, 3752 + .get_link = ethtool_op_get_link, 3753 + .get_strings = ath6kl_get_strings, 3754 + .get_ethtool_stats = ath6kl_get_stats, 3755 + .get_sset_count = ath6kl_get_sset_count, 3756 + }; 3757 + 3647 3758 struct wireless_dev *ath6kl_interface_add(struct ath6kl *ar, const char *name, 3648 3759 unsigned char name_assign_type, 3649 3760 enum nl80211_iftype type, ··· 3809 3678 3810 3679 if (ath6kl_cfg80211_vif_init(vif)) 3811 3680 goto err; 3681 + 3682 + netdev_set_default_ethtool_ops(ndev, &ath6kl_ethtool_ops); 3812 3683 3813 3684 if (register_netdevice(ndev)) 3814 3685 goto err; ··· 3919 3786 ath6kl_band_2ghz.ht_cap.ht_supported = false; 3920 3787 ath6kl_band_5ghz.ht_cap.cap = 0; 3921 3788 ath6kl_band_5ghz.ht_cap.ht_supported = false; 3789 + 3790 + if (ht) 3791 + ath6kl_err("Firmware lacks RSN-CAP-OVERRIDE, so HT (802.11n) is disabled."); 3922 3792 } 3923 3793 3924 3794 if (test_bit(ATH6KL_FW_CAPABILITY_64BIT_RATES, ··· 3930 3794 ath6kl_band_5ghz.ht_cap.mcs.rx_mask[0] = 0xff; 3931 3795 ath6kl_band_2ghz.ht_cap.mcs.rx_mask[1] = 0xff; 3932 3796 ath6kl_band_5ghz.ht_cap.mcs.rx_mask[1] = 0xff; 3797 + ar->hw.tx_ant = 2; 3798 + ar->hw.rx_ant = 2; 3933 3799 } else { 3934 3800 ath6kl_band_2ghz.ht_cap.mcs.rx_mask[0] = 0xff; 3935 3801 ath6kl_band_5ghz.ht_cap.mcs.rx_mask[0] = 0xff; 3802 + ar->hw.tx_ant = 1; 3803 + ar->hw.rx_ant = 1; 3936 3804 } 3805 + 3806 + wiphy->available_antennas_tx = ar->hw.tx_ant; 3807 + wiphy->available_antennas_rx = ar->hw.rx_ant; 3937 3808 3938 3809 if (band_2gig) 3939 3810 wiphy->bands[IEEE80211_BAND_2GHZ] = &ath6kl_band_2ghz;
+2
drivers/net/wireless/ath/ath6kl/core.h
··· 782 782 u32 refclk_hz; 783 783 u32 uarttx_pin; 784 784 u32 testscript_addr; 785 + u8 tx_ant; 786 + u8 rx_ant; 785 787 enum wmi_phy_cap cap; 786 788 787 789 u32 flags;
+32 -23
drivers/net/wireless/ath/ath6kl/debug.c
··· 98 98 } 99 99 EXPORT_SYMBOL(ath6kl_warn); 100 100 101 + int ath6kl_read_tgt_stats(struct ath6kl *ar, struct ath6kl_vif *vif) 102 + { 103 + long left; 104 + 105 + if (down_interruptible(&ar->sem)) 106 + return -EBUSY; 107 + 108 + set_bit(STATS_UPDATE_PEND, &vif->flags); 109 + 110 + if (ath6kl_wmi_get_stats_cmd(ar->wmi, 0)) { 111 + up(&ar->sem); 112 + return -EIO; 113 + } 114 + 115 + left = wait_event_interruptible_timeout(ar->event_wq, 116 + !test_bit(STATS_UPDATE_PEND, 117 + &vif->flags), WMI_TIMEOUT); 118 + 119 + up(&ar->sem); 120 + 121 + if (left <= 0) 122 + return -ETIMEDOUT; 123 + 124 + return 0; 125 + } 126 + EXPORT_SYMBOL(ath6kl_read_tgt_stats); 127 + 101 128 #ifdef CONFIG_ATH6KL_DEBUG 102 129 103 130 void ath6kl_dbg(enum ATH6K_DEBUG_MASK mask, const char *fmt, ...) ··· 571 544 char *buf; 572 545 unsigned int len = 0, buf_len = 1500; 573 546 int i; 574 - long left; 575 547 ssize_t ret_cnt; 548 + int rv; 576 549 577 550 vif = ath6kl_vif_first(ar); 578 551 if (!vif) 579 552 return -EIO; 580 553 581 - tgt_stats = &vif->target_stats; 582 - 583 554 buf = kzalloc(buf_len, GFP_KERNEL); 584 555 if (!buf) 585 556 return -ENOMEM; 586 557 587 - if (down_interruptible(&ar->sem)) { 558 + rv = ath6kl_read_tgt_stats(ar, vif); 559 + if (rv < 0) { 588 560 kfree(buf); 589 - return -EBUSY; 561 + return rv; 590 562 } 591 563 592 - set_bit(STATS_UPDATE_PEND, &vif->flags); 593 - 594 - if (ath6kl_wmi_get_stats_cmd(ar->wmi, 0)) { 595 - up(&ar->sem); 596 - kfree(buf); 597 - return -EIO; 598 - } 599 - 600 - left = wait_event_interruptible_timeout(ar->event_wq, 601 - !test_bit(STATS_UPDATE_PEND, 602 - &vif->flags), WMI_TIMEOUT); 603 - 604 - up(&ar->sem); 605 - 606 - if (left <= 0) { 607 - kfree(buf); 608 - return -ETIMEDOUT; 609 - } 564 + tgt_stats = &vif->target_stats; 610 565 611 566 len += scnprintf(buf + len, buf_len - len, "\n"); 612 567 len += scnprintf(buf + len, buf_len - len, "%25s\n",
+2
drivers/net/wireless/ath/ath6kl/debug.h
··· 59 59 ATH6KL_WAR_INVALID_RATE, 60 60 }; 61 61 62 + int ath6kl_read_tgt_stats(struct ath6kl *ar, struct ath6kl_vif *vif); 63 + 62 64 #ifdef CONFIG_ATH6KL_DEBUG 63 65 64 66 void ath6kl_dbg(enum ATH6K_DEBUG_MASK mask, const char *fmt, ...);
+1 -1
drivers/net/wireless/ath/ath6kl/init.c
··· 994 994 switch (ie_id) { 995 995 case ATH6KL_FW_IE_FW_VERSION: 996 996 strlcpy(ar->wiphy->fw_version, data, 997 - sizeof(ar->wiphy->fw_version)); 997 + min(sizeof(ar->wiphy->fw_version), ie_len+1)); 998 998 999 999 ath6kl_dbg(ATH6KL_DBG_BOOT, 1000 1000 "found fw version %s\n",
+11 -3
drivers/net/wireless/ath/ath9k/common-debug.c
··· 207 207 PHY_ERR("RADAR ERR", ATH9K_PHYERR_RADAR); 208 208 PHY_ERR("SERVICE ERR", ATH9K_PHYERR_SERVICE); 209 209 PHY_ERR("TOR ERR", ATH9K_PHYERR_TOR); 210 + 210 211 PHY_ERR("OFDM-TIMING ERR", ATH9K_PHYERR_OFDM_TIMING); 211 212 PHY_ERR("OFDM-SIGNAL-PARITY ERR", ATH9K_PHYERR_OFDM_SIGNAL_PARITY); 212 213 PHY_ERR("OFDM-RATE ERR", ATH9K_PHYERR_OFDM_RATE_ILLEGAL); ··· 215 214 PHY_ERR("OFDM-POWER-DROP ERR", ATH9K_PHYERR_OFDM_POWER_DROP); 216 215 PHY_ERR("OFDM-SERVICE ERR", ATH9K_PHYERR_OFDM_SERVICE); 217 216 PHY_ERR("OFDM-RESTART ERR", ATH9K_PHYERR_OFDM_RESTART); 218 - PHY_ERR("FALSE-RADAR-EXT ERR", ATH9K_PHYERR_FALSE_RADAR_EXT); 217 + 218 + PHY_ERR("CCK-BLOCKER ERR", ATH9K_PHYERR_CCK_BLOCKER); 219 219 PHY_ERR("CCK-TIMING ERR", ATH9K_PHYERR_CCK_TIMING); 220 220 PHY_ERR("CCK-HEADER-CRC ERR", ATH9K_PHYERR_CCK_HEADER_CRC); 221 221 PHY_ERR("CCK-RATE ERR", ATH9K_PHYERR_CCK_RATE_ILLEGAL); 222 - PHY_ERR("CCK-SERVICE ERR", ATH9K_PHYERR_CCK_SERVICE); 223 - PHY_ERR("CCK-RESTART ERR", ATH9K_PHYERR_CCK_RESTART); 224 222 PHY_ERR("CCK-LENGTH ERR", ATH9K_PHYERR_CCK_LENGTH_ILLEGAL); 225 223 PHY_ERR("CCK-POWER-DROP ERR", ATH9K_PHYERR_CCK_POWER_DROP); 224 + PHY_ERR("CCK-SERVICE ERR", ATH9K_PHYERR_CCK_SERVICE); 225 + PHY_ERR("CCK-RESTART ERR", ATH9K_PHYERR_CCK_RESTART); 226 + 226 227 PHY_ERR("HT-CRC ERR", ATH9K_PHYERR_HT_CRC_ERROR); 227 228 PHY_ERR("HT-LENGTH ERR", ATH9K_PHYERR_HT_LENGTH_ILLEGAL); 228 229 PHY_ERR("HT-RATE ERR", ATH9K_PHYERR_HT_RATE_ILLEGAL); 230 + PHY_ERR("HT-ZLF ERR", ATH9K_PHYERR_HT_ZLF); 231 + 232 + PHY_ERR("FALSE-RADAR-EXT ERR", ATH9K_PHYERR_FALSE_RADAR_EXT); 233 + PHY_ERR("GREEN-FIELD ERR", ATH9K_PHYERR_GREEN_FIELD); 234 + PHY_ERR("SPECTRAL ERR", ATH9K_PHYERR_SPECTRAL); 229 235 230 236 if (len > size) 231 237 len = size;
+11 -7
drivers/net/wireless/ath/ath9k/mac.h
··· 209 209 ATH9K_PHYERR_OFDM_POWER_DROP = 21, 210 210 ATH9K_PHYERR_OFDM_SERVICE = 22, 211 211 ATH9K_PHYERR_OFDM_RESTART = 23, 212 - ATH9K_PHYERR_FALSE_RADAR_EXT = 24, 213 212 213 + ATH9K_PHYERR_CCK_BLOCKER = 24, 214 214 ATH9K_PHYERR_CCK_TIMING = 25, 215 215 ATH9K_PHYERR_CCK_HEADER_CRC = 26, 216 216 ATH9K_PHYERR_CCK_RATE_ILLEGAL = 27, 217 + ATH9K_PHYERR_CCK_LENGTH_ILLEGAL = 28, 218 + ATH9K_PHYERR_CCK_POWER_DROP = 29, 217 219 ATH9K_PHYERR_CCK_SERVICE = 30, 218 220 ATH9K_PHYERR_CCK_RESTART = 31, 219 - ATH9K_PHYERR_CCK_LENGTH_ILLEGAL = 32, 220 - ATH9K_PHYERR_CCK_POWER_DROP = 33, 221 221 222 - ATH9K_PHYERR_HT_CRC_ERROR = 34, 223 - ATH9K_PHYERR_HT_LENGTH_ILLEGAL = 35, 224 - ATH9K_PHYERR_HT_RATE_ILLEGAL = 36, 222 + ATH9K_PHYERR_HT_CRC_ERROR = 32, 223 + ATH9K_PHYERR_HT_LENGTH_ILLEGAL = 33, 224 + ATH9K_PHYERR_HT_RATE_ILLEGAL = 34, 225 + ATH9K_PHYERR_HT_ZLF = 35, 225 226 226 - ATH9K_PHYERR_SPECTRAL = 38, 227 + ATH9K_PHYERR_FALSE_RADAR_EXT = 36, 228 + ATH9K_PHYERR_GREEN_FIELD = 37, 229 + ATH9K_PHYERR_SPECTRAL = 38, 230 + 227 231 ATH9K_PHYERR_MAX = 39, 228 232 }; 229 233
+36 -25
drivers/net/wireless/ath/wcn36xx/dxe.c
··· 79 79 struct wcn36xx_dxe_ctl *cur_ctl = NULL; 80 80 int i; 81 81 82 + spin_lock_init(&ch->lock); 82 83 for (i = 0; i < ch->desc_num; i++) { 83 84 cur_ctl = kzalloc(sizeof(*cur_ctl), GFP_KERNEL); 84 85 if (!cur_ctl) ··· 170 169 wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_h_ch); 171 170 } 172 171 173 - static int wcn36xx_dxe_init_descs(struct wcn36xx_dxe_ch *wcn_ch) 172 + static int wcn36xx_dxe_init_descs(struct device *dev, struct wcn36xx_dxe_ch *wcn_ch) 174 173 { 175 174 struct wcn36xx_dxe_desc *cur_dxe = NULL; 176 175 struct wcn36xx_dxe_desc *prev_dxe = NULL; ··· 179 178 int i; 180 179 181 180 size = wcn_ch->desc_num * sizeof(struct wcn36xx_dxe_desc); 182 - wcn_ch->cpu_addr = dma_alloc_coherent(NULL, size, &wcn_ch->dma_addr, 181 + wcn_ch->cpu_addr = dma_alloc_coherent(dev, size, &wcn_ch->dma_addr, 183 182 GFP_KERNEL); 184 183 if (!wcn_ch->cpu_addr) 185 184 return -ENOMEM; ··· 271 270 return 0; 272 271 } 273 272 274 - static int wcn36xx_dxe_fill_skb(struct wcn36xx_dxe_ctl *ctl) 273 + static int wcn36xx_dxe_fill_skb(struct device *dev, struct wcn36xx_dxe_ctl *ctl) 275 274 { 276 275 struct wcn36xx_dxe_desc *dxe = ctl->desc; 277 276 struct sk_buff *skb; ··· 280 279 if (skb == NULL) 281 280 return -ENOMEM; 282 281 283 - dxe->dst_addr_l = dma_map_single(NULL, 282 + dxe->dst_addr_l = dma_map_single(dev, 284 283 skb_tail_pointer(skb), 285 284 WCN36XX_PKT_SIZE, 286 285 DMA_FROM_DEVICE); ··· 298 297 cur_ctl = wcn_ch->head_blk_ctl; 299 298 300 299 for (i = 0; i < wcn_ch->desc_num; i++) { 301 - wcn36xx_dxe_fill_skb(cur_ctl); 300 + wcn36xx_dxe_fill_skb(wcn->dev, cur_ctl); 302 301 cur_ctl = cur_ctl->next; 303 302 } 304 303 ··· 346 345 347 346 static void reap_tx_dxes(struct wcn36xx *wcn, struct wcn36xx_dxe_ch *ch) 348 347 { 349 - struct wcn36xx_dxe_ctl *ctl = ch->tail_blk_ctl; 348 + struct wcn36xx_dxe_ctl *ctl; 350 349 struct ieee80211_tx_info *info; 351 350 unsigned long flags; 352 351 ··· 355 354 * completely full head and tail are pointing to the same element 356 355 * and while-do will not make any cycles. 357 356 */ 357 + spin_lock_irqsave(&ch->lock, flags); 358 + ctl = ch->tail_blk_ctl; 358 359 do { 359 360 if (ctl->desc->ctrl & WCN36XX_DXE_CTRL_VALID_MASK) 360 361 break; 361 362 if (ctl->skb) { 362 - dma_unmap_single(NULL, ctl->desc->src_addr_l, 363 + dma_unmap_single(wcn->dev, ctl->desc->src_addr_l, 363 364 ctl->skb->len, DMA_TO_DEVICE); 364 365 info = IEEE80211_SKB_CB(ctl->skb); 365 366 if (!(info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS)) { 366 367 /* Keep frame until TX status comes */ 367 368 ieee80211_free_txskb(wcn->hw, ctl->skb); 368 369 } 369 - spin_lock_irqsave(&ctl->skb_lock, flags); 370 + spin_lock(&ctl->skb_lock); 370 371 if (wcn->queues_stopped) { 371 372 wcn->queues_stopped = false; 372 373 ieee80211_wake_queues(wcn->hw); 373 374 } 374 - spin_unlock_irqrestore(&ctl->skb_lock, flags); 375 + spin_unlock(&ctl->skb_lock); 375 376 376 377 ctl->skb = NULL; 377 378 } ··· 382 379 !(ctl->desc->ctrl & WCN36XX_DXE_CTRL_VALID_MASK)); 383 380 384 381 ch->tail_blk_ctl = ctl; 382 + spin_unlock_irqrestore(&ch->lock, flags); 385 383 } 386 384 387 385 static irqreturn_t wcn36xx_irq_tx_complete(int irq, void *dev) ··· 478 474 while (!(dxe->ctrl & WCN36XX_DXE_CTRL_VALID_MASK)) { 479 475 skb = ctl->skb; 480 476 dma_addr = dxe->dst_addr_l; 481 - wcn36xx_dxe_fill_skb(ctl); 477 + wcn36xx_dxe_fill_skb(wcn->dev, ctl); 482 478 483 479 switch (ch->ch_type) { 484 480 case WCN36XX_DXE_CH_RX_L: ··· 495 491 wcn36xx_warn("Unknown channel\n"); 496 492 } 497 493 498 - dma_unmap_single(NULL, dma_addr, WCN36XX_PKT_SIZE, 494 + dma_unmap_single(wcn->dev, dma_addr, WCN36XX_PKT_SIZE, 499 495 DMA_FROM_DEVICE); 500 496 wcn36xx_rx_skb(wcn, skb); 501 497 ctl = ctl->next; ··· 544 540 16 - (WCN36XX_BD_CHUNK_SIZE % 8); 545 541 546 542 s = wcn->mgmt_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_H; 547 - cpu_addr = dma_alloc_coherent(NULL, s, &wcn->mgmt_mem_pool.phy_addr, 543 + cpu_addr = dma_alloc_coherent(wcn->dev, s, &wcn->mgmt_mem_pool.phy_addr, 548 544 GFP_KERNEL); 549 545 if (!cpu_addr) 550 546 goto out_err; ··· 559 555 16 - (WCN36XX_BD_CHUNK_SIZE % 8); 560 556 561 557 s = wcn->data_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_L; 562 - cpu_addr = dma_alloc_coherent(NULL, s, &wcn->data_mem_pool.phy_addr, 558 + cpu_addr = dma_alloc_coherent(wcn->dev, s, &wcn->data_mem_pool.phy_addr, 563 559 GFP_KERNEL); 564 560 if (!cpu_addr) 565 561 goto out_err; ··· 578 574 void wcn36xx_dxe_free_mem_pools(struct wcn36xx *wcn) 579 575 { 580 576 if (wcn->mgmt_mem_pool.virt_addr) 581 - dma_free_coherent(NULL, wcn->mgmt_mem_pool.chunk_size * 577 + dma_free_coherent(wcn->dev, wcn->mgmt_mem_pool.chunk_size * 582 578 WCN36XX_DXE_CH_DESC_NUMB_TX_H, 583 579 wcn->mgmt_mem_pool.virt_addr, 584 580 wcn->mgmt_mem_pool.phy_addr); 585 581 586 582 if (wcn->data_mem_pool.virt_addr) { 587 - dma_free_coherent(NULL, wcn->data_mem_pool.chunk_size * 583 + dma_free_coherent(wcn->dev, wcn->data_mem_pool.chunk_size * 588 584 WCN36XX_DXE_CH_DESC_NUMB_TX_L, 589 585 wcn->data_mem_pool.virt_addr, 590 586 wcn->data_mem_pool.phy_addr); ··· 600 596 struct wcn36xx_dxe_desc *desc = NULL; 601 597 struct wcn36xx_dxe_ch *ch = NULL; 602 598 unsigned long flags; 599 + int ret; 603 600 604 601 ch = is_low ? &wcn->dxe_tx_l_ch : &wcn->dxe_tx_h_ch; 605 602 603 + spin_lock_irqsave(&ch->lock, flags); 606 604 ctl = ch->head_blk_ctl; 607 605 608 - spin_lock_irqsave(&ctl->next->skb_lock, flags); 606 + spin_lock(&ctl->next->skb_lock); 609 607 610 608 /* 611 609 * If skb is not null that means that we reached the tail of the ring ··· 617 611 if (NULL != ctl->next->skb) { 618 612 ieee80211_stop_queues(wcn->hw); 619 613 wcn->queues_stopped = true; 620 - spin_unlock_irqrestore(&ctl->next->skb_lock, flags); 614 + spin_unlock(&ctl->next->skb_lock); 615 + spin_unlock_irqrestore(&ch->lock, flags); 621 616 return -EBUSY; 622 617 } 623 - spin_unlock_irqrestore(&ctl->next->skb_lock, flags); 618 + spin_unlock(&ctl->next->skb_lock); 624 619 625 620 ctl->skb = NULL; 626 621 desc = ctl->desc; ··· 647 640 desc = ctl->desc; 648 641 if (ctl->bd_cpu_addr) { 649 642 wcn36xx_err("bd_cpu_addr cannot be NULL for skb DXE\n"); 650 - return -EINVAL; 643 + ret = -EINVAL; 644 + goto unlock; 651 645 } 652 646 653 - desc->src_addr_l = dma_map_single(NULL, 647 + desc->src_addr_l = dma_map_single(wcn->dev, 654 648 ctl->skb->data, 655 649 ctl->skb->len, 656 650 DMA_TO_DEVICE); ··· 687 679 ch->reg_ctrl, ch->def_ctrl); 688 680 } 689 681 690 - return 0; 682 + ret = 0; 683 + unlock: 684 + spin_unlock_irqrestore(&ch->lock, flags); 685 + return ret; 691 686 } 692 687 693 688 int wcn36xx_dxe_init(struct wcn36xx *wcn) ··· 707 696 /***************************************/ 708 697 /* Init descriptors for TX LOW channel */ 709 698 /***************************************/ 710 - wcn36xx_dxe_init_descs(&wcn->dxe_tx_l_ch); 699 + wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_tx_l_ch); 711 700 wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_l_ch, &wcn->data_mem_pool); 712 701 713 702 /* Write channel head to a NEXT register */ ··· 725 714 /***************************************/ 726 715 /* Init descriptors for TX HIGH channel */ 727 716 /***************************************/ 728 - wcn36xx_dxe_init_descs(&wcn->dxe_tx_h_ch); 717 + wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_tx_h_ch); 729 718 wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_h_ch, &wcn->mgmt_mem_pool); 730 719 731 720 /* Write channel head to a NEXT register */ ··· 745 734 /***************************************/ 746 735 /* Init descriptors for RX LOW channel */ 747 736 /***************************************/ 748 - wcn36xx_dxe_init_descs(&wcn->dxe_rx_l_ch); 737 + wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_rx_l_ch); 749 738 750 739 /* For RX we need to preallocated buffers */ 751 740 wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_l_ch); ··· 775 764 /***************************************/ 776 765 /* Init descriptors for RX HIGH channel */ 777 766 /***************************************/ 778 - wcn36xx_dxe_init_descs(&wcn->dxe_rx_h_ch); 767 + wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_rx_h_ch); 779 768 780 769 /* For RX we need to prealocat buffers */ 781 770 wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_h_ch);
+1
drivers/net/wireless/ath/wcn36xx/dxe.h
··· 243 243 }; 244 244 245 245 struct wcn36xx_dxe_ch { 246 + spinlock_t lock; /* protects head/tail ptrs */ 246 247 enum wcn36xx_dxe_ch_type ch_type; 247 248 void *cpu_addr; 248 249 dma_addr_t dma_addr;
+3 -3
drivers/net/wireless/ath/wil6210/interrupt.c
··· 236 236 237 237 isr &= ~(BIT_DMA_EP_RX_ICR_RX_DONE | 238 238 BIT_DMA_EP_RX_ICR_RX_HTRSH); 239 - if (likely(test_bit(wil_status_reset_done, wil->status))) { 239 + if (likely(test_bit(wil_status_fwready, wil->status))) { 240 240 if (likely(test_bit(wil_status_napi_en, wil->status))) { 241 241 wil_dbg_txrx(wil, "NAPI(Rx) schedule\n"); 242 242 need_unmask = false; ··· 286 286 isr &= ~BIT_DMA_EP_TX_ICR_TX_DONE; 287 287 /* clear also all VRING interrupts */ 288 288 isr &= ~(BIT(25) - 1UL); 289 - if (likely(test_bit(wil_status_reset_done, wil->status))) { 289 + if (likely(test_bit(wil_status_fwready, wil->status))) { 290 290 wil_dbg_txrx(wil, "NAPI(Tx) schedule\n"); 291 291 need_unmask = false; 292 292 napi_schedule(&wil->napi_tx); ··· 364 364 if (isr & ISR_MISC_FW_READY) { 365 365 wil_dbg_irq(wil, "IRQ: FW ready\n"); 366 366 wil_cache_mbox_regs(wil); 367 - set_bit(wil_status_reset_done, wil->status); 367 + set_bit(wil_status_mbox_ready, wil->status); 368 368 /** 369 369 * Actual FW ready indicated by the 370 370 * WMI_FW_READY_EVENTID
+1 -1
drivers/net/wireless/ath/wil6210/main.c
··· 422 422 wil->sta[cid].status = wil_sta_connected; 423 423 netif_tx_wake_all_queues(ndev); 424 424 } else { 425 - wil->sta[cid].status = wil_sta_unused; 425 + wil_disconnect_cid(wil, cid, WLAN_REASON_UNSPECIFIED, true); 426 426 } 427 427 } 428 428
+15 -15
drivers/net/wireless/ath/wil6210/txrx.c
··· 1242 1242 int tcp_hdr_len; 1243 1243 int skb_net_hdr_len; 1244 1244 int gso_type; 1245 + int rc = -EINVAL; 1245 1246 1246 1247 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1247 1248 __func__, skb->len, vring_index); ··· 1334 1333 len, rem_data, descs_used); 1335 1334 1336 1335 if (descs_used == avail) { 1337 - wil_err(wil, "TSO: ring overflow\n"); 1338 - goto dma_error; 1336 + wil_err_ratelimited(wil, "TSO: ring overflow\n"); 1337 + rc = -ENOMEM; 1338 + goto mem_error; 1339 1339 } 1340 1340 1341 1341 lenmss = min_t(int, rem_data, len); ··· 1358 1356 headlen -= lenmss; 1359 1357 } 1360 1358 1361 - if (unlikely(dma_mapping_error(dev, pa))) 1362 - goto dma_error; 1359 + if (unlikely(dma_mapping_error(dev, pa))) { 1360 + wil_err(wil, "TSO: DMA map page error\n"); 1361 + goto mem_error; 1362 + } 1363 1363 1364 1364 _desc = &vring->va[i].tx; 1365 1365 ··· 1460 1456 } 1461 1457 1462 1458 /* advance swhead */ 1463 - wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead); 1464 1459 wil_vring_advance_head(vring, descs_used); 1460 + wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead); 1465 1461 1466 1462 /* make sure all writes to descriptors (shared memory) are done before 1467 1463 * committing them to HW ··· 1471 1467 wil_w(wil, vring->hwtail, vring->swhead); 1472 1468 return 0; 1473 1469 1474 - dma_error: 1475 - wil_err(wil, "TSO: DMA map page error\n"); 1470 + mem_error: 1476 1471 while (descs_used > 0) { 1477 1472 struct wil_ctx *ctx; 1478 1473 ··· 1482 1479 _desc->dma.status = TX_DMA_STATUS_DU; 1483 1480 ctx = &vring->ctx[i]; 1484 1481 wil_txdesc_unmap(dev, d, ctx); 1485 - if (ctx->skb) 1486 - dev_kfree_skb_any(ctx->skb); 1487 1482 memset(ctx, 0, sizeof(*ctx)); 1488 1483 descs_used--; 1489 1484 } 1490 - 1491 1485 err_exit: 1492 - return -EINVAL; 1486 + return rc; 1493 1487 } 1494 1488 1495 1489 static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, ··· 1562 1562 _d = &vring->va[i].tx; 1563 1563 pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag), 1564 1564 DMA_TO_DEVICE); 1565 - if (unlikely(dma_mapping_error(dev, pa))) 1565 + if (unlikely(dma_mapping_error(dev, pa))) { 1566 + wil_err(wil, "Tx[%2d] failed to map fragment\n", 1567 + vring_index); 1566 1568 goto dma_error; 1569 + } 1567 1570 vring->ctx[i].mapped_as = wil_mapped_as_page; 1568 1571 wil_tx_desc_map(d, pa, len, vring_index); 1569 1572 /* no need to check return code - ··· 1625 1622 *d = *_d; 1626 1623 _d->dma.status = TX_DMA_STATUS_DU; 1627 1624 wil_txdesc_unmap(dev, d, ctx); 1628 - 1629 - if (ctx->skb) 1630 - dev_kfree_skb_any(ctx->skb); 1631 1625 1632 1626 memset(ctx, 0, sizeof(*ctx)); 1633 1627 }
+2 -2
drivers/net/wireless/ath/wil6210/wil6210.h
··· 402 402 }; 403 403 404 404 enum { /* for wil6210_priv.status */ 405 - wil_status_fwready = 0, 405 + wil_status_fwready = 0, /* FW operational */ 406 406 wil_status_fwconnecting, 407 407 wil_status_fwconnected, 408 408 wil_status_dontscan, 409 - wil_status_reset_done, 409 + wil_status_mbox_ready, /* MBOX structures ready */ 410 410 wil_status_irqen, /* FIXME: interrupts enabled - for debug */ 411 411 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */ 412 412 wil_status_resetting, /* reset in progress */
+12 -8
drivers/net/wireless/ath/wil6210/wmi.c
··· 293 293 /* ignore MAC address, we already have it from the boot loader */ 294 294 snprintf(wdev->wiphy->fw_version, sizeof(wdev->wiphy->fw_version), 295 295 "%d", wil->fw_version); 296 - } 297 - 298 - static void wmi_evt_fw_ready(struct wil6210_priv *wil, int id, void *d, 299 - int len) 300 - { 301 - wil_dbg_wmi(wil, "WMI: got FW ready event\n"); 302 296 303 297 wil_set_recovery_state(wil, fw_recovery_idle); 304 298 set_bit(wil_status_fwready, wil->status); ··· 678 684 spin_unlock_bh(&sta->tid_rx_lock); 679 685 } 680 686 687 + /** 688 + * Some events are ignored for purpose; and need not be interpreted as 689 + * "unhandled events" 690 + */ 691 + static void wmi_evt_ignore(struct wil6210_priv *wil, int id, void *d, int len) 692 + { 693 + wil_dbg_wmi(wil, "Ignore event 0x%04x len %d\n", id, len); 694 + } 695 + 681 696 static const struct { 682 697 int eventid; 683 698 void (*handler)(struct wil6210_priv *wil, int eventid, 684 699 void *data, int data_len); 685 700 } wmi_evt_handlers[] = { 686 701 {WMI_READY_EVENTID, wmi_evt_ready}, 687 - {WMI_FW_READY_EVENTID, wmi_evt_fw_ready}, 702 + {WMI_FW_READY_EVENTID, wmi_evt_ignore}, 688 703 {WMI_RX_MGMT_PACKET_EVENTID, wmi_evt_rx_mgmt}, 689 704 {WMI_TX_MGMT_PACKET_EVENTID, wmi_evt_tx_mgmt}, 690 705 {WMI_SCAN_COMPLETE_EVENTID, wmi_evt_scan_complete}, ··· 704 701 {WMI_RCP_ADDBA_REQ_EVENTID, wmi_evt_addba_rx_req}, 705 702 {WMI_DELBA_EVENTID, wmi_evt_delba}, 706 703 {WMI_VRING_EN_EVENTID, wmi_evt_vring_en}, 704 + {WMI_DATA_PORT_OPEN_EVENTID, wmi_evt_ignore}, 707 705 }; 708 706 709 707 /* ··· 724 720 ulong flags; 725 721 unsigned n; 726 722 727 - if (!test_bit(wil_status_reset_done, wil->status)) { 723 + if (!test_bit(wil_status_mbox_ready, wil->status)) { 728 724 wil_err(wil, "Reset in progress. Cannot handle WMI event\n"); 729 725 return; 730 726 }
-20
drivers/net/wireless/b43/Kconfig
··· 71 71 select SSB_DRIVER_PCICORE 72 72 default y 73 73 74 - config B43_PCMCIA 75 - bool "Broadcom 43xx PCMCIA device support" 76 - depends on B43 && B43_SSB && SSB_PCMCIAHOST_POSSIBLE 77 - select SSB_PCMCIAHOST 78 - ---help--- 79 - Broadcom 43xx PCMCIA device support. 80 - 81 - Support for 16bit PCMCIA devices. 82 - Please note that most PC-CARD devices are _NOT_ 16bit PCMCIA 83 - devices, but 32bit CardBUS devices. CardBUS devices are supported 84 - out of the box by b43. 85 - 86 - With this config option you can drive b43 cards in 87 - CompactFlash formfactor in a PCMCIA adaptor. 88 - CF b43 cards can sometimes be found in handheld PCs. 89 - 90 - It's safe to select Y here, even if you don't have a B43 PCMCIA device. 91 - 92 - If unsure, say N. 93 - 94 74 config B43_SDIO 95 75 bool "Broadcom 43xx SDIO device support" 96 76 depends on B43 && B43_SSB && SSB_SDIOHOST_POSSIBLE
-1
drivers/net/wireless/b43/Makefile
··· 21 21 b43-y += rfkill.o 22 22 b43-y += ppr.o 23 23 b43-$(CONFIG_B43_LEDS) += leds.o 24 - b43-$(CONFIG_B43_PCMCIA) += pcmcia.o 25 24 b43-$(CONFIG_B43_SDIO) += sdio.o 26 25 b43-$(CONFIG_B43_DEBUG) += debugfs.o 27 26
+1 -8
drivers/net/wireless/b43/main.c
··· 56 56 #include "sysfs.h" 57 57 #include "xmit.h" 58 58 #include "lo.h" 59 - #include "pcmcia.h" 60 59 #include "sdio.h" 61 60 #include <linux/mmc/sdio_func.h> 62 61 ··· 5849 5850 int err; 5850 5851 5851 5852 b43_debugfs_init(); 5852 - err = b43_pcmcia_init(); 5853 - if (err) 5854 - goto err_dfs_exit; 5855 5853 err = b43_sdio_init(); 5856 5854 if (err) 5857 - goto err_pcmcia_exit; 5855 + goto err_dfs_exit; 5858 5856 #ifdef CONFIG_B43_BCMA 5859 5857 err = bcma_driver_register(&b43_bcma_driver); 5860 5858 if (err) ··· 5874 5878 err_sdio_exit: 5875 5879 #endif 5876 5880 b43_sdio_exit(); 5877 - err_pcmcia_exit: 5878 - b43_pcmcia_exit(); 5879 5881 err_dfs_exit: 5880 5882 b43_debugfs_exit(); 5881 5883 return err; ··· 5888 5894 bcma_driver_unregister(&b43_bcma_driver); 5889 5895 #endif 5890 5896 b43_sdio_exit(); 5891 - b43_pcmcia_exit(); 5892 5897 b43_debugfs_exit(); 5893 5898 } 5894 5899
-145
drivers/net/wireless/b43/pcmcia.c
··· 1 - /* 2 - 3 - Broadcom B43 wireless driver 4 - 5 - Copyright (c) 2007 Michael Buesch <m@bues.ch> 6 - 7 - This program is free software; you can redistribute it and/or modify 8 - it under the terms of the GNU General Public License as published by 9 - the Free Software Foundation; either version 2 of the License, or 10 - (at your option) any later version. 11 - 12 - This program is distributed in the hope that it will be useful, 13 - but WITHOUT ANY WARRANTY; without even the implied warranty of 14 - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 - GNU General Public License for more details. 16 - 17 - You should have received a copy of the GNU General Public License 18 - along with this program; see the file COPYING. If not, write to 19 - the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, 20 - Boston, MA 02110-1301, USA. 21 - 22 - */ 23 - 24 - #include "pcmcia.h" 25 - 26 - #include <linux/ssb/ssb.h> 27 - #include <linux/slab.h> 28 - #include <linux/module.h> 29 - 30 - #include <pcmcia/cistpl.h> 31 - #include <pcmcia/ciscode.h> 32 - #include <pcmcia/ds.h> 33 - #include <pcmcia/cisreg.h> 34 - 35 - 36 - static const struct pcmcia_device_id b43_pcmcia_tbl[] = { 37 - PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x448), 38 - PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x476), 39 - PCMCIA_DEVICE_NULL, 40 - }; 41 - 42 - MODULE_DEVICE_TABLE(pcmcia, b43_pcmcia_tbl); 43 - 44 - #ifdef CONFIG_PM 45 - static int b43_pcmcia_suspend(struct pcmcia_device *dev) 46 - { 47 - struct ssb_bus *ssb = dev->priv; 48 - 49 - return ssb_bus_suspend(ssb); 50 - } 51 - 52 - static int b43_pcmcia_resume(struct pcmcia_device *dev) 53 - { 54 - struct ssb_bus *ssb = dev->priv; 55 - 56 - return ssb_bus_resume(ssb); 57 - } 58 - #else /* CONFIG_PM */ 59 - # define b43_pcmcia_suspend NULL 60 - # define b43_pcmcia_resume NULL 61 - #endif /* CONFIG_PM */ 62 - 63 - static int b43_pcmcia_probe(struct pcmcia_device *dev) 64 - { 65 - struct ssb_bus *ssb; 66 - int err = -ENOMEM; 67 - int res = 0; 68 - 69 - ssb = kzalloc(sizeof(*ssb), GFP_KERNEL); 70 - if (!ssb) 71 - goto out_error; 72 - 73 - err = -ENODEV; 74 - 75 - dev->config_flags |= CONF_ENABLE_IRQ; 76 - 77 - dev->resource[2]->flags |= WIN_ENABLE | WIN_DATA_WIDTH_16 | 78 - WIN_USE_WAIT; 79 - dev->resource[2]->start = 0; 80 - dev->resource[2]->end = SSB_CORE_SIZE; 81 - res = pcmcia_request_window(dev, dev->resource[2], 250); 82 - if (res != 0) 83 - goto err_kfree_ssb; 84 - 85 - res = pcmcia_map_mem_page(dev, dev->resource[2], 0); 86 - if (res != 0) 87 - goto err_disable; 88 - 89 - if (!dev->irq) 90 - goto err_disable; 91 - 92 - res = pcmcia_enable_device(dev); 93 - if (res != 0) 94 - goto err_disable; 95 - 96 - err = ssb_bus_pcmciabus_register(ssb, dev, dev->resource[2]->start); 97 - if (err) 98 - goto err_disable; 99 - dev->priv = ssb; 100 - 101 - return 0; 102 - 103 - err_disable: 104 - pcmcia_disable_device(dev); 105 - err_kfree_ssb: 106 - kfree(ssb); 107 - out_error: 108 - printk(KERN_ERR "b43-pcmcia: Initialization failed (%d, %d)\n", 109 - res, err); 110 - return err; 111 - } 112 - 113 - static void b43_pcmcia_remove(struct pcmcia_device *dev) 114 - { 115 - struct ssb_bus *ssb = dev->priv; 116 - 117 - ssb_bus_unregister(ssb); 118 - pcmcia_disable_device(dev); 119 - kfree(ssb); 120 - dev->priv = NULL; 121 - } 122 - 123 - static struct pcmcia_driver b43_pcmcia_driver = { 124 - .owner = THIS_MODULE, 125 - .name = "b43-pcmcia", 126 - .id_table = b43_pcmcia_tbl, 127 - .probe = b43_pcmcia_probe, 128 - .remove = b43_pcmcia_remove, 129 - .suspend = b43_pcmcia_suspend, 130 - .resume = b43_pcmcia_resume, 131 - }; 132 - 133 - /* 134 - * These are not module init/exit functions! 135 - * The module_pcmcia_driver() helper cannot be used here. 136 - */ 137 - int b43_pcmcia_init(void) 138 - { 139 - return pcmcia_register_driver(&b43_pcmcia_driver); 140 - } 141 - 142 - void b43_pcmcia_exit(void) 143 - { 144 - pcmcia_unregister_driver(&b43_pcmcia_driver); 145 - }
-20
drivers/net/wireless/b43/pcmcia.h
··· 1 - #ifndef B43_PCMCIA_H_ 2 - #define B43_PCMCIA_H_ 3 - 4 - #ifdef CONFIG_B43_PCMCIA 5 - 6 - int b43_pcmcia_init(void); 7 - void b43_pcmcia_exit(void); 8 - 9 - #else /* CONFIG_B43_PCMCIA */ 10 - 11 - static inline int b43_pcmcia_init(void) 12 - { 13 - return 0; 14 - } 15 - static inline void b43_pcmcia_exit(void) 16 - { 17 - } 18 - 19 - #endif /* CONFIG_B43_PCMCIA */ 20 - #endif /* B43_PCMCIA_H_ */
+16
drivers/net/wireless/iwlwifi/iwl-fw-error-dump.h
··· 86 86 * Structured as &struct iwl_fw_error_dump_trigger_desc. 87 87 * @IWL_FW_ERROR_DUMP_RB: the content of an RB structured as 88 88 * &struct iwl_fw_error_dump_rb 89 + * @IWL_FW_ERROR_PAGING: UMAC's image memory segments which were 90 + * paged to the DRAM. 89 91 */ 90 92 enum iwl_fw_error_dump_type { 91 93 /* 0 is deprecated */ ··· 102 100 IWL_FW_ERROR_DUMP_MEM = 9, 103 101 IWL_FW_ERROR_DUMP_ERROR_INFO = 10, 104 102 IWL_FW_ERROR_DUMP_RB = 11, 103 + IWL_FW_ERROR_DUMP_PAGING = 12, 105 104 106 105 IWL_FW_ERROR_DUMP_MAX, 107 106 }; ··· 238 235 struct iwl_fw_error_dump_rb { 239 236 __le32 index; 240 237 __le32 rxq; 238 + __le32 reserved; 239 + u8 data[]; 240 + }; 241 + 242 + /** 243 + * struct iwl_fw_error_dump_paging - content of the UMAC's image page 244 + * block on DRAM 245 + * @index: the index of the page block 246 + * @reserved: 247 + * @data: the content of the page block 248 + */ 249 + struct iwl_fw_error_dump_paging { 250 + __le32 index; 241 251 __le32 reserved; 242 252 u8 data[]; 243 253 };
+4
drivers/net/wireless/iwlwifi/iwl-fw-file.h
··· 306 306 * is supported. 307 307 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC 308 308 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan 309 + * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement 310 + * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts 309 311 * 310 312 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used 311 313 */ ··· 332 330 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29, 333 331 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30, 334 332 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31, 333 + IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64, 334 + IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65, 335 335 336 336 NUM_IWL_UCODE_TLV_CAPA 337 337 #ifdef __CHECKER__
+2
drivers/net/wireless/iwlwifi/iwl-trans.h
··· 409 409 * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands 410 410 * are sent 411 411 * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent 412 + * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation 412 413 */ 413 414 enum iwl_trans_status { 414 415 STATUS_SYNC_HCMD_ACTIVE, ··· 420 419 STATUS_FW_ERROR, 421 420 STATUS_TRANS_GOING_IDLE, 422 421 STATUS_TRANS_IDLE, 422 + STATUS_TRANS_DEAD, 423 423 }; 424 424 425 425 /**
+3 -1
drivers/net/wireless/iwlwifi/mvm/constants.h
··· 71 71 #define IWL_MVM_DEFAULT_PS_RX_DATA_TIMEOUT (100 * USEC_PER_MSEC) 72 72 #define IWL_MVM_WOWLAN_PS_TX_DATA_TIMEOUT (10 * USEC_PER_MSEC) 73 73 #define IWL_MVM_WOWLAN_PS_RX_DATA_TIMEOUT (10 * USEC_PER_MSEC) 74 + #define IWL_MVM_SHORT_PS_TX_DATA_TIMEOUT (2 * 1024) /* defined in TU */ 75 + #define IWL_MVM_SHORT_PS_RX_DATA_TIMEOUT (40 * 1024) /* defined in TU */ 76 + #define IWL_MVM_P2P_LOWLATENCY_PS_ENABLE 0 74 77 #define IWL_MVM_UAPSD_RX_DATA_TIMEOUT (50 * USEC_PER_MSEC) 75 78 #define IWL_MVM_UAPSD_TX_DATA_TIMEOUT (50 * USEC_PER_MSEC) 76 79 #define IWL_MVM_UAPSD_QUEUES (IEEE80211_WMM_IE_STA_QOSINFO_AC_VO |\ ··· 104 101 #define IWL_MVM_FW_BCAST_FILTER_PASS_ALL 0 105 102 #define IWL_MVM_QUOTA_THRESHOLD 4 106 103 #define IWL_MVM_RS_RSSI_BASED_INIT_RATE 0 107 - #define IWL_MVM_RS_DISABLE_P2P_MIMO 0 108 104 #define IWL_MVM_RS_80_20_FAR_RANGE_TWEAK 1 109 105 #define IWL_MVM_TOF_IS_RESPONDER 0 110 106 #define IWL_MVM_RS_NUM_TRY_BEFORE_ANT_TOGGLE 1
+22 -3
drivers/net/wireless/iwlwifi/mvm/debugfs-vif.c
··· 715 715 goto out; 716 716 } 717 717 718 - data = iwl_dbgfs_is_match("ctrl_ch_position=", buf); 718 + data = iwl_dbgfs_is_match("center_freq=", buf); 719 719 if (data) { 720 + struct iwl_tof_responder_config_cmd *cmd = 721 + &mvm->tof_data.responder_cfg; 722 + 720 723 ret = kstrtou32(data, 10, &value); 721 - if (ret == 0) 722 - mvm->tof_data.responder_cfg.ctrl_ch_position = value; 724 + if (ret == 0 && value) { 725 + enum ieee80211_band band = (cmd->channel_num <= 14) ? 726 + IEEE80211_BAND_2GHZ : 727 + IEEE80211_BAND_5GHZ; 728 + struct ieee80211_channel chn = { 729 + .band = band, 730 + .center_freq = ieee80211_channel_to_frequency( 731 + cmd->channel_num, band), 732 + }; 733 + struct cfg80211_chan_def chandef = { 734 + .chan = &chn, 735 + .center_freq1 = 736 + ieee80211_channel_to_frequency(value, 737 + band), 738 + }; 739 + 740 + cmd->ctrl_ch_position = iwl_mvm_get_ctrl_pos(&chandef); 741 + } 723 742 goto out; 724 743 } 725 744
+1 -1
drivers/net/wireless/iwlwifi/mvm/debugfs.c
··· 85 85 IWL_ERR(mvm, "FLUSHING queues: scd_q_msk = 0x%x\n", scd_q_msk); 86 86 87 87 mutex_lock(&mvm->mutex); 88 - ret = iwl_mvm_flush_tx_path(mvm, scd_q_msk, true) ? : count; 88 + ret = iwl_mvm_flush_tx_path(mvm, scd_q_msk, 0) ? : count; 89 89 mutex_unlock(&mvm->mutex); 90 90 91 91 return ret;
+3 -2
drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h
··· 101 101 102 102 #define IWL_FULL_SCAN_MULTIPLIER 5 103 103 #define IWL_FAST_SCHED_SCAN_ITERATIONS 3 104 + #define IWL_MAX_SCHED_SCAN_PLANS 2 104 105 105 106 enum scan_framework_client { 106 107 SCAN_CLIENT_SCHED_SCAN = BIT(0), ··· 360 359 /* SCAN_REQ_PERIODIC_PARAMS_API_S */ 361 360 __le32 iter_num; 362 361 __le32 delay; 363 - struct iwl_scan_schedule_lmac schedule[2]; 362 + struct iwl_scan_schedule_lmac schedule[IWL_MAX_SCHED_SCAN_PLANS]; 364 363 struct iwl_scan_channel_opt channel_opt[2]; 365 364 u8 data[]; 366 365 } __packed; ··· 583 582 */ 584 583 struct iwl_scan_req_umac_tail { 585 584 /* SCAN_PERIODIC_PARAMS_API_S_VER_1 */ 586 - struct iwl_scan_umac_schedule schedule[2]; 585 + struct iwl_scan_umac_schedule schedule[IWL_MAX_SCHED_SCAN_PLANS]; 587 586 __le16 delay; 588 587 __le16 reserved; 589 588 /* SCAN_PROBE_PARAMS_API_S_VER_1 */
+63
drivers/net/wireless/iwlwifi/mvm/fw-api.h
··· 1524 1524 } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */ 1525 1525 1526 1526 /** 1527 + * enum iwl_dts_control_measurement_mode - DTS measurement type 1528 + * @DTS_AUTOMATIC: Automatic mode (full SW control). Provide temperature read 1529 + * back (latest value. Not waiting for new value). Use automatic 1530 + * SW DTS configuration. 1531 + * @DTS_REQUEST_READ: Request DTS read. Configure DTS with manual settings, 1532 + * trigger DTS reading and provide read back temperature read 1533 + * when available. 1534 + * @DTS_OVER_WRITE: over-write the DTS temperatures in the SW until next read 1535 + * @DTS_DIRECT_WITHOUT_MEASURE: DTS returns its latest temperature result, 1536 + * without measurement trigger. 1537 + */ 1538 + enum iwl_dts_control_measurement_mode { 1539 + DTS_AUTOMATIC = 0, 1540 + DTS_REQUEST_READ = 1, 1541 + DTS_OVER_WRITE = 2, 1542 + DTS_DIRECT_WITHOUT_MEASURE = 3, 1543 + }; 1544 + 1545 + /** 1546 + * enum iwl_dts_used - DTS to use or used for measurement in the DTS request 1547 + * @DTS_USE_TOP: Top 1548 + * @DTS_USE_CHAIN_A: chain A 1549 + * @DTS_USE_CHAIN_B: chain B 1550 + * @DTS_USE_CHAIN_C: chain C 1551 + * @XTAL_TEMPERATURE - read temperature from xtal 1552 + */ 1553 + enum iwl_dts_used { 1554 + DTS_USE_TOP = 0, 1555 + DTS_USE_CHAIN_A = 1, 1556 + DTS_USE_CHAIN_B = 2, 1557 + DTS_USE_CHAIN_C = 3, 1558 + XTAL_TEMPERATURE = 4, 1559 + }; 1560 + 1561 + /** 1562 + * enum iwl_dts_bit_mode - bit-mode to use in DTS request read mode 1563 + * @DTS_BIT6_MODE: bit 6 mode 1564 + * @DTS_BIT8_MODE: bit 8 mode 1565 + */ 1566 + enum iwl_dts_bit_mode { 1567 + DTS_BIT6_MODE = 0, 1568 + DTS_BIT8_MODE = 1, 1569 + }; 1570 + 1571 + /** 1572 + * iwl_ext_dts_measurement_cmd - request extended DTS temperature measurements 1573 + * @control_mode: see &enum iwl_dts_control_measurement_mode 1574 + * @temperature: used when over write DTS mode is selected 1575 + * @sensor: set temperature sensor to use. See &enum iwl_dts_used 1576 + * @avg_factor: average factor to DTS in request DTS read mode 1577 + * @bit_mode: value defines the DTS bit mode to use. See &enum iwl_dts_bit_mode 1578 + * @step_duration: step duration for the DTS 1579 + */ 1580 + struct iwl_ext_dts_measurement_cmd { 1581 + __le32 control_mode; 1582 + __le32 temperature; 1583 + __le32 sensor; 1584 + __le32 avg_factor; 1585 + __le32 bit_mode; 1586 + __le32 step_duration; 1587 + } __packed; /* XVT_FW_DTS_CONTROL_MEASUREMENT_REQUEST_API_S */ 1588 + 1589 + /** 1527 1590 * iwl_dts_measurement_notif - notification received with the measurements 1528 1591 * 1529 1592 * @temp: the measured temperature
+3
drivers/net/wireless/iwlwifi/mvm/mac-ctxt.c
··· 843 843 ctxt_sta->listen_interval = cpu_to_le32(mvm->hw->conf.listen_interval); 844 844 ctxt_sta->assoc_id = cpu_to_le32(vif->bss_conf.aid); 845 845 846 + if (vif->probe_req_reg && vif->bss_conf.assoc && vif->p2p) 847 + cmd.filter_flags |= cpu_to_le32(MAC_FILTER_IN_PROBE_REQUEST); 848 + 846 849 return iwl_mvm_mac_ctxt_send_cmd(mvm, &cmd); 847 850 } 848 851
+65 -2
drivers/net/wireless/iwlwifi/mvm/mac80211.c
··· 572 572 /* we create the 802.11 header and zero length SSID IE. */ 573 573 hw->wiphy->max_sched_scan_ie_len = 574 574 SCAN_OFFLOAD_PROBE_REQ_SIZE - 24 - 2; 575 + hw->wiphy->max_sched_scan_plans = IWL_MAX_SCHED_SCAN_PLANS; 576 + hw->wiphy->max_sched_scan_plan_interval = U16_MAX; 577 + 578 + /* 579 + * the firmware uses u8 for num of iterations, but 0xff is saved for 580 + * infinite loop, so the maximum number of iterations is actually 254. 581 + */ 582 + hw->wiphy->max_sched_scan_plan_iterations = 254; 575 583 576 584 hw->wiphy->features |= NL80211_FEATURE_P2P_GO_CTWIN | 577 585 NL80211_FEATURE_LOW_PRIORITY_SCAN | ··· 1137 1129 1138 1130 lockdep_assert_held(&mvm->mutex); 1139 1131 1132 + /* there's no point in fw dump if the bus is dead */ 1133 + if (test_bit(STATUS_TRANS_DEAD, &mvm->trans->status)) { 1134 + IWL_ERR(mvm, "Skip fw error dump since bus is dead\n"); 1135 + return; 1136 + } 1137 + 1140 1138 if (mvm->fw_dump_trig && 1141 1139 mvm->fw_dump_trig->mode & IWL_FW_DBG_TRIGGER_MONITOR_ONLY) 1142 1140 monitor_dump_only = true; ··· 1205 1191 /* Make room for the secondary SRAM, if it exists */ 1206 1192 if (sram2_len) 1207 1193 file_len += sizeof(*dump_data) + sizeof(*dump_mem) + sram2_len; 1194 + 1195 + /* Make room for fw's virtual image pages, if it exists */ 1196 + if (mvm->fw->img[mvm->cur_ucode].paging_mem_size) 1197 + file_len += mvm->num_of_paging_blk * 1198 + (sizeof(*dump_data) + 1199 + sizeof(struct iwl_fw_error_dump_paging) + 1200 + PAGING_BLOCK_SIZE); 1208 1201 1209 1202 /* If we only want a monitor dump, reset the file length */ 1210 1203 if (monitor_dump_only) { ··· 1321 1300 dump_mem->offset = cpu_to_le32(IWL8260_ICCM_OFFSET); 1322 1301 iwl_trans_read_mem_bytes(mvm->trans, IWL8260_ICCM_OFFSET, 1323 1302 dump_mem->data, IWL8260_ICCM_LEN); 1303 + } 1304 + 1305 + /* Dump fw's virtual image */ 1306 + if (mvm->fw->img[mvm->cur_ucode].paging_mem_size) { 1307 + u32 i; 1308 + 1309 + for (i = 1; i < mvm->num_of_paging_blk + 1; i++) { 1310 + struct iwl_fw_error_dump_paging *paging; 1311 + struct page *pages = 1312 + mvm->fw_paging_db[i].fw_paging_block; 1313 + 1314 + dump_data = iwl_fw_error_next_data(dump_data); 1315 + dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PAGING); 1316 + dump_data->len = cpu_to_le32(sizeof(*paging) + 1317 + PAGING_BLOCK_SIZE); 1318 + paging = (void *)dump_data->data; 1319 + paging->index = cpu_to_le32(i); 1320 + memcpy(paging->data, page_address(pages), 1321 + PAGING_BLOCK_SIZE); 1322 + } 1324 1323 } 1325 1324 1326 1325 dump_trans_data: ··· 1795 1754 * Flush them here. 1796 1755 */ 1797 1756 mutex_lock(&mvm->mutex); 1798 - iwl_mvm_flush_tx_path(mvm, tfd_msk, true); 1757 + iwl_mvm_flush_tx_path(mvm, tfd_msk, 0); 1799 1758 mutex_unlock(&mvm->mutex); 1800 1759 1801 1760 /* ··· 1994 1953 out: 1995 1954 mutex_unlock(&mvm->mutex); 1996 1955 *total_flags = 0; 1956 + } 1957 + 1958 + static void iwl_mvm_config_iface_filter(struct ieee80211_hw *hw, 1959 + struct ieee80211_vif *vif, 1960 + unsigned int filter_flags, 1961 + unsigned int changed_flags) 1962 + { 1963 + struct iwl_mvm *mvm = IWL_MAC80211_GET_MVM(hw); 1964 + 1965 + /* We support only filter for probe requests */ 1966 + if (!(changed_flags & FIF_PROBE_REQ)) 1967 + return; 1968 + 1969 + /* Supported only for p2p client interfaces */ 1970 + if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc || 1971 + !vif->p2p) 1972 + return; 1973 + 1974 + mutex_lock(&mvm->mutex); 1975 + iwl_mvm_mac_ctxt_changed(mvm, vif, false, NULL); 1976 + mutex_unlock(&mvm->mutex); 1997 1977 } 1998 1978 1999 1979 #ifdef CONFIG_IWLWIFI_BCAST_FILTERING ··· 3960 3898 } 3961 3899 3962 3900 if (drop) { 3963 - if (iwl_mvm_flush_tx_path(mvm, msk, true)) 3901 + if (iwl_mvm_flush_tx_path(mvm, msk, 0)) 3964 3902 IWL_ERR(mvm, "flush request fail\n"); 3965 3903 mutex_unlock(&mvm->mutex); 3966 3904 } else { ··· 4197 4135 .config = iwl_mvm_mac_config, 4198 4136 .prepare_multicast = iwl_mvm_prepare_multicast, 4199 4137 .configure_filter = iwl_mvm_configure_filter, 4138 + .config_iface_filter = iwl_mvm_config_iface_filter, 4200 4139 .bss_info_changed = iwl_mvm_bss_info_changed, 4201 4140 .hw_scan = iwl_mvm_mac_hw_scan, 4202 4141 .cancel_hw_scan = iwl_mvm_mac_cancel_hw_scan,
+1 -1
drivers/net/wireless/iwlwifi/mvm/mvm.h
··· 1036 1036 #else 1037 1037 static inline const char *iwl_mvm_get_tx_fail_reason(u32 status) { return ""; } 1038 1038 #endif 1039 - int iwl_mvm_flush_tx_path(struct iwl_mvm *mvm, u32 tfd_msk, bool sync); 1039 + int iwl_mvm_flush_tx_path(struct iwl_mvm *mvm, u32 tfd_msk, u32 flags); 1040 1040 void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm); 1041 1041 1042 1042 static inline void iwl_mvm_set_tx_cmd_ccmp(struct ieee80211_tx_info *info,
+1
drivers/net/wireless/iwlwifi/mvm/nvm.c
··· 483 483 ret = -ENOMEM; 484 484 break; 485 485 } 486 + kfree(mvm->nvm_sections[section_id].data); 486 487 mvm->nvm_sections[section_id].data = temp; 487 488 mvm->nvm_sections[section_id].length = section_size; 488 489
+26 -17
drivers/net/wireless/iwlwifi/mvm/power.c
··· 348 348 349 349 static void iwl_mvm_power_build_cmd(struct iwl_mvm *mvm, 350 350 struct ieee80211_vif *vif, 351 - struct iwl_mac_power_cmd *cmd) 351 + struct iwl_mac_power_cmd *cmd, 352 + bool host_awake) 352 353 { 353 354 int dtimper, bi; 354 355 int keep_alive; ··· 377 376 378 377 cmd->flags |= cpu_to_le16(POWER_FLAGS_POWER_SAVE_ENA_MSK); 379 378 380 - if (!vif->bss_conf.ps || !mvmvif->pm_enabled || 381 - (iwl_mvm_vif_low_latency(mvmvif) && vif->p2p)) 379 + if (!vif->bss_conf.ps || !mvmvif->pm_enabled) 380 + return; 381 + 382 + if (iwl_mvm_vif_low_latency(mvmvif) && vif->p2p && 383 + (!fw_has_capa(&mvm->fw->ucode_capa, 384 + IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS) || 385 + !IWL_MVM_P2P_LOWLATENCY_PS_ENABLE)) 382 386 return; 383 387 384 388 cmd->flags |= cpu_to_le16(POWER_FLAGS_POWER_MANAGEMENT_ENA_MSK); ··· 395 389 cmd->lprx_rssi_threshold = POWER_LPRX_RSSI_THRESHOLD; 396 390 } 397 391 398 - iwl_mvm_power_config_skip_dtim(mvm, vif, cmd, 399 - mvm->cur_ucode != IWL_UCODE_WOWLAN); 392 + iwl_mvm_power_config_skip_dtim(mvm, vif, cmd, host_awake); 400 393 401 - if (mvm->cur_ucode != IWL_UCODE_WOWLAN) { 402 - cmd->rx_data_timeout = 403 - cpu_to_le32(IWL_MVM_DEFAULT_PS_RX_DATA_TIMEOUT); 404 - cmd->tx_data_timeout = 405 - cpu_to_le32(IWL_MVM_DEFAULT_PS_TX_DATA_TIMEOUT); 406 - } else { 394 + if (!host_awake) { 407 395 cmd->rx_data_timeout = 408 396 cpu_to_le32(IWL_MVM_WOWLAN_PS_RX_DATA_TIMEOUT); 409 397 cmd->tx_data_timeout = 410 398 cpu_to_le32(IWL_MVM_WOWLAN_PS_TX_DATA_TIMEOUT); 399 + } else if (iwl_mvm_vif_low_latency(mvmvif) && vif->p2p && 400 + fw_has_capa(&mvm->fw->ucode_capa, 401 + IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS)) { 402 + cmd->tx_data_timeout = 403 + cpu_to_le32(IWL_MVM_SHORT_PS_TX_DATA_TIMEOUT); 404 + cmd->rx_data_timeout = 405 + cpu_to_le32(IWL_MVM_SHORT_PS_RX_DATA_TIMEOUT); 406 + } else { 407 + cmd->rx_data_timeout = 408 + cpu_to_le32(IWL_MVM_DEFAULT_PS_RX_DATA_TIMEOUT); 409 + cmd->tx_data_timeout = 410 + cpu_to_le32(IWL_MVM_DEFAULT_PS_TX_DATA_TIMEOUT); 411 411 } 412 412 413 413 if (iwl_mvm_power_allow_uapsd(mvm, vif)) ··· 470 458 { 471 459 struct iwl_mac_power_cmd cmd = {}; 472 460 473 - iwl_mvm_power_build_cmd(mvm, vif, &cmd); 461 + iwl_mvm_power_build_cmd(mvm, vif, &cmd, 462 + mvm->cur_ucode != IWL_UCODE_WOWLAN); 474 463 iwl_mvm_power_log(mvm, &cmd); 475 464 #ifdef CONFIG_IWLWIFI_DEBUGFS 476 465 memcpy(&iwl_mvm_vif_from_mac80211(vif)->mac_pwr_cmd, &cmd, sizeof(cmd)); ··· 1007 994 if (!vif->bss_conf.assoc) 1008 995 return 0; 1009 996 1010 - iwl_mvm_power_build_cmd(mvm, vif, &cmd); 1011 - 1012 - /* when enabling D0i3, override the skip-over-dtim configuration */ 1013 - if (enable) 1014 - iwl_mvm_power_config_skip_dtim(mvm, vif, &cmd, false); 997 + iwl_mvm_power_build_cmd(mvm, vif, &cmd, !enable); 1015 998 1016 999 iwl_mvm_power_log(mvm, &cmd); 1017 1000 #ifdef CONFIG_IWLWIFI_DEBUGFS
-6
drivers/net/wireless/iwlwifi/mvm/rs.c
··· 177 177 178 178 mvmsta = iwl_mvm_sta_from_mac80211(sta); 179 179 mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif); 180 - if (IWL_MVM_RS_DISABLE_P2P_MIMO && 181 - iwl_mvm_vif_low_latency(mvmvif) && mvmsta->vif->p2p) 182 - return false; 183 180 184 181 if (mvm->nvm_data->sku_cap_mimo_disabled) 185 182 return false; ··· 3067 3070 rs_ht_init(mvm, sta, lq_sta, ht_cap); 3068 3071 else 3069 3072 rs_vht_init(mvm, sta, lq_sta, vht_cap); 3070 - 3071 - if (IWL_MVM_RS_DISABLE_P2P_MIMO && sta_priv->vif->p2p) 3072 - lq_sta->active_mimo2_rate = 0; 3073 3073 3074 3074 lq_sta->max_legacy_rate_idx = 3075 3075 rs_get_max_rate_from_mask(lq_sta->active_legacy_rate);
+69 -51
drivers/net/wireless/iwlwifi/mvm/scan.c
··· 131 131 int n_ssids; 132 132 struct cfg80211_ssid *ssids; 133 133 struct ieee80211_channel **channels; 134 - u16 interval; /* interval between scans (in secs) */ 135 134 u32 flags; 136 135 u8 *mac_addr; 137 136 u8 *mac_addr_mask; ··· 139 140 int n_match_sets; 140 141 struct iwl_scan_probe_req preq; 141 142 struct cfg80211_match_set *match_sets; 142 - u8 iterations[2]; 143 + int n_scan_plans; 144 + struct cfg80211_sched_scan_plan *scan_plans; 143 145 }; 144 146 145 147 static u8 iwl_mvm_scan_rx_ant(struct iwl_mvm *mvm) ··· 474 474 int ret; 475 475 476 476 if (WARN_ON(req->n_match_sets > IWL_SCAN_MAX_PROFILES)) 477 - return -EIO; 477 + return -EIO; 478 478 479 479 if (mvm->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_SHORT_BL) 480 480 blacklist_len = IWL_SCAN_SHORT_BLACKLIST_LEN; ··· 737 737 } 738 738 739 739 static inline bool iwl_mvm_scan_use_ebs(struct iwl_mvm *mvm, 740 - struct ieee80211_vif *vif, 741 - int n_iterations) 740 + struct ieee80211_vif *vif) 742 741 { 743 742 const struct iwl_ucode_capabilities *capa = &mvm->fw->ucode_capa; 744 743 ··· 750 751 return ((capa->flags & IWL_UCODE_TLV_FLAGS_EBS_SUPPORT) && 751 752 mvm->last_ebs_successful && 752 753 vif->type != NL80211_IFTYPE_P2P_DEVICE); 753 - } 754 - 755 - static int iwl_mvm_scan_total_iterations(struct iwl_mvm_scan_params *params) 756 - { 757 - return params->iterations[0] + params->iterations[1]; 758 754 } 759 755 760 756 static int iwl_mvm_scan_lmac_flags(struct iwl_mvm *mvm, ··· 790 796 (void *)(cmd->data + sizeof(struct iwl_scan_channel_cfg_lmac) * 791 797 mvm->fw->ucode_capa.n_scan_channels); 792 798 u32 ssid_bitmap = 0; 793 - int n_iterations = iwl_mvm_scan_total_iterations(params); 799 + int i; 794 800 795 801 lockdep_assert_held(&mvm->mutex); 796 802 797 803 memset(cmd, 0, ksize(cmd)); 804 + 805 + if (WARN_ON(params->n_scan_plans > IWL_MAX_SCHED_SCAN_PLANS)) 806 + return -EINVAL; 798 807 799 808 iwl_mvm_scan_lmac_dwell(mvm, cmd, params); 800 809 ··· 818 821 /* this API uses bits 1-20 instead of 0-19 */ 819 822 ssid_bitmap <<= 1; 820 823 821 - cmd->schedule[0].delay = cpu_to_le16(params->interval); 822 - cmd->schedule[0].iterations = params->iterations[0]; 823 - cmd->schedule[0].full_scan_mul = 1; 824 - cmd->schedule[1].delay = cpu_to_le16(params->interval); 825 - cmd->schedule[1].iterations = params->iterations[1]; 826 - cmd->schedule[1].full_scan_mul = 1; 824 + for (i = 0; i < params->n_scan_plans; i++) { 825 + struct cfg80211_sched_scan_plan *scan_plan = 826 + &params->scan_plans[i]; 827 827 828 - if (iwl_mvm_scan_use_ebs(mvm, vif, n_iterations)) { 828 + cmd->schedule[i].delay = 829 + cpu_to_le16(scan_plan->interval); 830 + cmd->schedule[i].iterations = scan_plan->iterations; 831 + cmd->schedule[i].full_scan_mul = 1; 832 + } 833 + 834 + /* 835 + * If the number of iterations of the last scan plan is set to 836 + * zero, it should run infinitely. However, this is not always the case. 837 + * For example, when regular scan is requested the driver sets one scan 838 + * plan with one iteration. 839 + */ 840 + if (!cmd->schedule[i - 1].iterations) 841 + cmd->schedule[i - 1].iterations = 0xff; 842 + 843 + if (iwl_mvm_scan_use_ebs(mvm, vif)) { 829 844 cmd->channel_opt[0].flags = 830 845 cpu_to_le16(IWL_SCAN_CHANNEL_FLAG_EBS | 831 846 IWL_SCAN_CHANNEL_FLAG_EBS_ACCURATE | ··· 901 892 902 893 int iwl_mvm_config_scan(struct iwl_mvm *mvm) 903 894 { 904 - 905 895 struct iwl_scan_config *scan_config; 906 896 struct ieee80211_supported_band *band; 907 897 int num_channels = ··· 976 968 return -ENOENT; 977 969 } 978 970 971 + static inline bool iwl_mvm_is_regular_scan(struct iwl_mvm_scan_params *params) 972 + { 973 + return params->n_scan_plans == 1 && 974 + params->scan_plans[0].iterations == 1; 975 + } 976 + 979 977 static void iwl_mvm_scan_umac_dwell(struct iwl_mvm *mvm, 980 978 struct iwl_scan_req_umac *cmd, 981 979 struct iwl_mvm_scan_params *params) ··· 994 980 cmd->scan_priority = 995 981 iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6); 996 982 997 - if (iwl_mvm_scan_total_iterations(params) == 1) 983 + if (iwl_mvm_is_regular_scan(params)) 998 984 cmd->ooc_priority = 999 985 iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6); 1000 986 else ··· 1041 1027 else 1042 1028 flags |= IWL_UMAC_SCAN_GEN_FLAGS_MATCH; 1043 1029 1044 - if (iwl_mvm_scan_total_iterations(params) > 1) 1030 + if (!iwl_mvm_is_regular_scan(params)) 1045 1031 flags |= IWL_UMAC_SCAN_GEN_FLAGS_PERIODIC; 1046 1032 1047 1033 #ifdef CONFIG_IWLWIFI_DEBUGFS ··· 1059 1045 struct iwl_scan_req_umac_tail *sec_part = (void *)&cmd->data + 1060 1046 sizeof(struct iwl_scan_channel_cfg_umac) * 1061 1047 mvm->fw->ucode_capa.n_scan_channels; 1062 - int uid; 1048 + int uid, i; 1063 1049 u32 ssid_bitmap = 0; 1064 - int n_iterations = iwl_mvm_scan_total_iterations(params); 1065 1050 1066 1051 lockdep_assert_held(&mvm->mutex); 1052 + 1053 + if (WARN_ON(params->n_scan_plans > IWL_MAX_SCHED_SCAN_PLANS)) 1054 + return -EINVAL; 1067 1055 1068 1056 uid = iwl_mvm_scan_uid_by_status(mvm, 0); 1069 1057 if (uid < 0) ··· 1083 1067 if (type == IWL_MVM_SCAN_SCHED) 1084 1068 cmd->flags = cpu_to_le32(IWL_UMAC_SCAN_FLAG_PREEMPTIVE); 1085 1069 1086 - if (iwl_mvm_scan_use_ebs(mvm, vif, n_iterations)) 1070 + if (iwl_mvm_scan_use_ebs(mvm, vif)) 1087 1071 cmd->channel_flags = IWL_SCAN_CHANNEL_FLAG_EBS | 1088 1072 IWL_SCAN_CHANNEL_FLAG_EBS_ACCURATE | 1089 1073 IWL_SCAN_CHANNEL_FLAG_CACHE_ADD; ··· 1095 1079 iwl_mvm_umac_scan_cfg_channels(mvm, params->channels, 1096 1080 params->n_channels, ssid_bitmap, cmd); 1097 1081 1098 - /* With UMAC we use only one schedule for now, so use the sum 1099 - * of the iterations (with a a maximum of 255). 1082 + for (i = 0; i < params->n_scan_plans; i++) { 1083 + struct cfg80211_sched_scan_plan *scan_plan = 1084 + &params->scan_plans[i]; 1085 + 1086 + sec_part->schedule[i].iter_count = scan_plan->iterations; 1087 + sec_part->schedule[i].interval = 1088 + cpu_to_le16(scan_plan->interval); 1089 + } 1090 + 1091 + /* 1092 + * If the number of iterations of the last scan plan is set to 1093 + * zero, it should run infinitely. However, this is not always the case. 1094 + * For example, when regular scan is requested the driver sets one scan 1095 + * plan with one iteration. 1100 1096 */ 1101 - sec_part->schedule[0].iter_count = 1102 - (n_iterations > 255) ? 255 : n_iterations; 1103 - sec_part->schedule[0].interval = cpu_to_le16(params->interval); 1097 + if (!sec_part->schedule[i - 1].iter_count) 1098 + sec_part->schedule[i - 1].iter_count = 0xff; 1104 1099 1105 1100 sec_part->delay = cpu_to_le16(params->delay); 1106 1101 sec_part->preq = params->preq; ··· 1177 1150 }; 1178 1151 struct iwl_mvm_scan_params params = {}; 1179 1152 int ret; 1153 + struct cfg80211_sched_scan_plan scan_plan = { .iterations = 1 }; 1180 1154 1181 1155 lockdep_assert_held(&mvm->mutex); 1182 1156 ··· 1190 1162 if (ret) 1191 1163 return ret; 1192 1164 1193 - iwl_mvm_ref(mvm, IWL_MVM_REF_SCAN); 1194 - 1195 1165 /* we should have failed registration if scan_cmd was NULL */ 1196 1166 if (WARN_ON(!mvm->scan_cmd)) 1197 1167 return -ENOMEM; ··· 1201 1175 params.flags = req->flags; 1202 1176 params.n_channels = req->n_channels; 1203 1177 params.delay = 0; 1204 - params.interval = 0; 1205 1178 params.ssids = req->ssids; 1206 1179 params.channels = req->channels; 1207 1180 params.mac_addr = req->mac_addr; ··· 1210 1185 params.n_match_sets = 0; 1211 1186 params.match_sets = NULL; 1212 1187 1213 - params.iterations[0] = 1; 1214 - params.iterations[1] = 0; 1188 + params.scan_plans = &scan_plan; 1189 + params.n_scan_plans = 1; 1215 1190 1216 1191 params.type = iwl_mvm_get_scan_type(mvm, vif, &params); 1217 1192 ··· 1230 1205 return ret; 1231 1206 1232 1207 ret = iwl_mvm_send_cmd(mvm, &hcmd); 1233 - if (!ret) { 1234 - IWL_DEBUG_SCAN(mvm, "Scan request was sent successfully\n"); 1235 - mvm->scan_status |= IWL_MVM_SCAN_REGULAR; 1236 - } else { 1208 + if (ret) { 1237 1209 /* If the scan failed, it usually means that the FW was unable 1238 1210 * to allocate the time events. Warn on it, but maybe we 1239 1211 * should try to send the command again with different params. 1240 1212 */ 1241 1213 IWL_ERR(mvm, "Scan failed! ret %d\n", ret); 1214 + return ret; 1242 1215 } 1243 1216 1244 - if (ret) 1245 - iwl_mvm_unref(mvm, IWL_MVM_REF_SCAN); 1217 + IWL_DEBUG_SCAN(mvm, "Scan request was sent successfully\n"); 1218 + mvm->scan_status |= IWL_MVM_SCAN_REGULAR; 1219 + iwl_mvm_ref(mvm, IWL_MVM_REF_SCAN); 1246 1220 1247 - return ret; 1221 + return 0; 1248 1222 } 1249 1223 1250 1224 int iwl_mvm_sched_scan_start(struct iwl_mvm *mvm, ··· 1289 1265 params.pass_all = iwl_mvm_scan_pass_all(mvm, req); 1290 1266 params.n_match_sets = req->n_match_sets; 1291 1267 params.match_sets = req->match_sets; 1268 + if (!req->n_scan_plans) 1269 + return -EINVAL; 1292 1270 1293 - params.iterations[0] = 0; 1294 - params.iterations[1] = 0xff; 1271 + params.n_scan_plans = req->n_scan_plans; 1272 + params.scan_plans = req->scan_plans; 1295 1273 1296 1274 params.type = iwl_mvm_get_scan_type(mvm, vif, &params); 1297 - 1298 - if (req->scan_plans[0].interval > U16_MAX) { 1299 - IWL_DEBUG_SCAN(mvm, 1300 - "interval value is > 16-bits, set to max possible\n"); 1301 - params.interval = U16_MAX; 1302 - } else { 1303 - params.interval = req->scan_plans[0].interval; 1304 - } 1305 1275 1306 1276 /* In theory, LMAC scans can handle a 32-bit delay, but since 1307 1277 * waiting for over 18 hours to start the scan is a bit silly
+5 -4
drivers/net/wireless/iwlwifi/mvm/sta.c
··· 255 255 /* disable the TDLS STA-specific queues */ 256 256 sta_msk = mvmsta->tfd_queue_msk; 257 257 for_each_set_bit(i, &sta_msk, sizeof(sta_msk) * BITS_PER_BYTE) 258 - iwl_mvm_disable_txq(mvm, i, i, 0, 0); 258 + iwl_mvm_disable_txq(mvm, i, i, IWL_MAX_TID_COUNT, 0); 259 259 } 260 260 261 261 int iwl_mvm_add_sta(struct iwl_mvm *mvm, ··· 474 474 unsigned long i, msk = mvm->tfd_drained[sta_id]; 475 475 476 476 for_each_set_bit(i, &msk, sizeof(msk) * BITS_PER_BYTE) 477 - iwl_mvm_disable_txq(mvm, i, i, 0, 0); 477 + iwl_mvm_disable_txq(mvm, i, i, 478 + IWL_MAX_TID_COUNT, 0); 478 479 479 480 mvm->tfd_drained[sta_id] = 0; 480 481 IWL_DEBUG_TDLS(mvm, "Drained sta %d, with queues %ld\n", ··· 502 501 if (ret) 503 502 return ret; 504 503 /* flush its queues here since we are freeing mvm_sta */ 505 - ret = iwl_mvm_flush_tx_path(mvm, mvm_sta->tfd_queue_msk, true); 504 + ret = iwl_mvm_flush_tx_path(mvm, mvm_sta->tfd_queue_msk, 0); 506 505 if (ret) 507 506 return ret; 508 507 ret = iwl_trans_wait_tx_queue_empty(mvm->trans, ··· 1156 1155 1157 1156 if (old_state >= IWL_AGG_ON) { 1158 1157 iwl_mvm_drain_sta(mvm, mvmsta, true); 1159 - if (iwl_mvm_flush_tx_path(mvm, BIT(txq_id), true)) 1158 + if (iwl_mvm_flush_tx_path(mvm, BIT(txq_id), 0)) 1160 1159 IWL_ERR(mvm, "Couldn't flush the AGG queue\n"); 1161 1160 iwl_trans_wait_tx_queue_empty(mvm->trans, 1162 1161 mvmsta->tfd_queue_msk);
+1 -1
drivers/net/wireless/iwlwifi/mvm/time-event.c
··· 129 129 * issue as it will have to complete before the next command is 130 130 * executed, and a new time event means a new command. 131 131 */ 132 - iwl_mvm_flush_tx_path(mvm, queues, false); 132 + iwl_mvm_flush_tx_path(mvm, queues, CMD_ASYNC); 133 133 } 134 134 135 135 static void iwl_mvm_roc_finished(struct iwl_mvm *mvm)
+9 -2
drivers/net/wireless/iwlwifi/mvm/tt.c
··· 176 176 struct iwl_dts_measurement_cmd cmd = { 177 177 .flags = cpu_to_le32(DTS_TRIGGER_CMD_FLAGS_TEMP), 178 178 }; 179 + struct iwl_ext_dts_measurement_cmd extcmd = { 180 + .control_mode = cpu_to_le32(DTS_AUTOMATIC), 181 + }; 179 182 u32 cmdid; 180 183 181 184 if (fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_WIDE_CMD_HDR)) ··· 186 183 PHY_OPS_GROUP, 0); 187 184 else 188 185 cmdid = CMD_DTS_MEASUREMENT_TRIGGER; 189 - return iwl_mvm_send_cmd_pdu(mvm, cmdid, 0, 190 - sizeof(cmd), &cmd); 186 + 187 + if (!fw_has_capa(&mvm->fw->ucode_capa, 188 + IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE)) 189 + return iwl_mvm_send_cmd_pdu(mvm, cmdid, 0, sizeof(cmd), &cmd); 190 + 191 + return iwl_mvm_send_cmd_pdu(mvm, cmdid, 0, sizeof(extcmd), &extcmd); 191 192 } 192 193 193 194 int iwl_mvm_get_temp(struct iwl_mvm *mvm)
+1 -3
drivers/net/wireless/iwlwifi/mvm/tx.c
··· 1099 1099 * 2) flush the Tx path 1100 1100 * 3) wait for the transport queues to be empty 1101 1101 */ 1102 - int iwl_mvm_flush_tx_path(struct iwl_mvm *mvm, u32 tfd_msk, bool sync) 1102 + int iwl_mvm_flush_tx_path(struct iwl_mvm *mvm, u32 tfd_msk, u32 flags) 1103 1103 { 1104 1104 int ret; 1105 1105 struct iwl_tx_path_flush_cmd flush_cmd = { 1106 1106 .queues_ctl = cpu_to_le32(tfd_msk), 1107 1107 .flush_ctl = cpu_to_le16(DUMP_TX_FIFO_FLUSH), 1108 1108 }; 1109 - 1110 - u32 flags = sync ? 0 : CMD_ASYNC; 1111 1109 1112 1110 ret = iwl_mvm_send_cmd_pdu(mvm, TXPATH_FLUSH, flags, 1113 1111 sizeof(flush_cmd), &flush_cmd);
+2 -8
drivers/net/wireless/iwlwifi/pcie/trans.c
··· 592 592 593 593 do { 594 594 ret = iwl_pcie_set_hw_ready(trans); 595 - if (ret >= 0) { 596 - ret = 0; 597 - goto out; 598 - } 595 + if (ret >= 0) 596 + return 0; 599 597 600 598 usleep_range(200, 1000); 601 599 t += 200; ··· 602 604 } 603 605 604 606 IWL_ERR(trans, "Couldn't prepare the card\n"); 605 - 606 - out: 607 - iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, 608 - CSR_RESET_LINK_PWR_MGMT_DISABLED); 609 607 610 608 return ret; 611 609 }
+8
drivers/net/wireless/mwifiex/cfg80211.c
··· 1821 1821 return -1; 1822 1822 } 1823 1823 1824 + if (netif_carrier_ok(priv->netdev)) 1825 + netif_carrier_off(priv->netdev); 1826 + mwifiex_stop_net_dev_queue(priv->netdev, priv->adapter); 1827 + 1824 1828 return 0; 1825 1829 } 1826 1830 ··· 1928 1924 1929 1925 if (mwifiex_set_mgmt_ies(priv, &params->beacon)) 1930 1926 return -1; 1927 + 1928 + if (!netif_carrier_ok(priv->netdev)) 1929 + netif_carrier_on(priv->netdev); 1930 + mwifiex_wake_up_net_dev_queue(priv->netdev, priv->adapter); 1931 1931 1932 1932 memcpy(&priv->bss_cfg, bss_cfg, sizeof(priv->bss_cfg)); 1933 1933 kfree(bss_cfg);
-7
drivers/net/wireless/mwifiex/uap_event.c
··· 179 179 case EVENT_UAP_BSS_IDLE: 180 180 priv->media_connected = false; 181 181 priv->port_open = false; 182 - if (netif_carrier_ok(priv->netdev)) 183 - netif_carrier_off(priv->netdev); 184 - mwifiex_stop_net_dev_queue(priv->netdev, adapter); 185 - 186 182 mwifiex_clean_txrx(priv); 187 183 mwifiex_del_all_sta_list(priv); 188 184 break; 189 185 case EVENT_UAP_BSS_ACTIVE: 190 186 priv->media_connected = true; 191 187 priv->port_open = true; 192 - if (!netif_carrier_ok(priv->netdev)) 193 - netif_carrier_on(priv->netdev); 194 - mwifiex_wake_up_net_dev_queue(priv->netdev, adapter); 195 188 break; 196 189 case EVENT_UAP_BSS_START: 197 190 mwifiex_dbg(adapter, EVENT,
+1
drivers/net/wireless/orinoco/orinoco_usb.c
··· 1576 1576 ezusb_hard_reset, NULL); 1577 1577 if (!priv) { 1578 1578 err("Couldn't allocate orinocodev"); 1579 + retval = -ENOMEM; 1579 1580 goto exit; 1580 1581 } 1581 1582
+9
drivers/ssb/Kconfig
··· 80 80 81 81 If unsure, say N 82 82 83 + config SSB_HOST_SOC 84 + bool "Support for SSB bus on SoC" 85 + depends on SSB 86 + help 87 + Host interface for a SSB directly mapped into memory. This is 88 + for some Broadcom SoCs from the BCM47xx and BCM53xx lines. 89 + 90 + If unsure, say N 91 + 83 92 config SSB_SILENT 84 93 bool "No SSB kernel messages" 85 94 depends on SSB && EXPERT
+2 -1
drivers/ssb/Makefile
··· 5 5 6 6 # host support 7 7 ssb-$(CONFIG_SSB_PCIHOST) += pci.o pcihost_wrapper.o 8 - ssb-$(CONFIG_SSB_PCMCIAHOST) += pcmcia.o 8 + ssb-$(CONFIG_SSB_PCMCIAHOST) += pcmcia.o bridge_pcmcia_80211.o 9 9 ssb-$(CONFIG_SSB_SDIOHOST) += sdio.o 10 + ssb-$(CONFIG_SSB_HOST_SOC) += host_soc.o 10 11 11 12 # built-in drivers 12 13 ssb-y += driver_chipcommon.o
+128
drivers/ssb/bridge_pcmcia_80211.c
··· 1 + /* 2 + * Broadcom 43xx PCMCIA-SSB bridge module 3 + * 4 + * Copyright (c) 2007 Michael Buesch <m@bues.ch> 5 + * 6 + * Licensed under the GNU/GPL. See COPYING for details. 7 + */ 8 + 9 + #include <linux/ssb/ssb.h> 10 + #include <linux/slab.h> 11 + #include <linux/module.h> 12 + 13 + #include <pcmcia/cistpl.h> 14 + #include <pcmcia/ciscode.h> 15 + #include <pcmcia/ds.h> 16 + #include <pcmcia/cisreg.h> 17 + 18 + #include "ssb_private.h" 19 + 20 + static const struct pcmcia_device_id ssb_host_pcmcia_tbl[] = { 21 + PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x448), 22 + PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x476), 23 + PCMCIA_DEVICE_NULL, 24 + }; 25 + 26 + MODULE_DEVICE_TABLE(pcmcia, ssb_host_pcmcia_tbl); 27 + 28 + static int ssb_host_pcmcia_probe(struct pcmcia_device *dev) 29 + { 30 + struct ssb_bus *ssb; 31 + int err = -ENOMEM; 32 + int res = 0; 33 + 34 + ssb = kzalloc(sizeof(*ssb), GFP_KERNEL); 35 + if (!ssb) 36 + goto out_error; 37 + 38 + err = -ENODEV; 39 + 40 + dev->config_flags |= CONF_ENABLE_IRQ; 41 + 42 + dev->resource[2]->flags |= WIN_ENABLE | WIN_DATA_WIDTH_16 | 43 + WIN_USE_WAIT; 44 + dev->resource[2]->start = 0; 45 + dev->resource[2]->end = SSB_CORE_SIZE; 46 + res = pcmcia_request_window(dev, dev->resource[2], 250); 47 + if (res != 0) 48 + goto err_kfree_ssb; 49 + 50 + res = pcmcia_map_mem_page(dev, dev->resource[2], 0); 51 + if (res != 0) 52 + goto err_disable; 53 + 54 + if (!dev->irq) 55 + goto err_disable; 56 + 57 + res = pcmcia_enable_device(dev); 58 + if (res != 0) 59 + goto err_disable; 60 + 61 + err = ssb_bus_pcmciabus_register(ssb, dev, dev->resource[2]->start); 62 + if (err) 63 + goto err_disable; 64 + dev->priv = ssb; 65 + 66 + return 0; 67 + 68 + err_disable: 69 + pcmcia_disable_device(dev); 70 + err_kfree_ssb: 71 + kfree(ssb); 72 + out_error: 73 + ssb_err("Initialization failed (%d, %d)\n", res, err); 74 + return err; 75 + } 76 + 77 + static void ssb_host_pcmcia_remove(struct pcmcia_device *dev) 78 + { 79 + struct ssb_bus *ssb = dev->priv; 80 + 81 + ssb_bus_unregister(ssb); 82 + pcmcia_disable_device(dev); 83 + kfree(ssb); 84 + dev->priv = NULL; 85 + } 86 + 87 + #ifdef CONFIG_PM 88 + static int ssb_host_pcmcia_suspend(struct pcmcia_device *dev) 89 + { 90 + struct ssb_bus *ssb = dev->priv; 91 + 92 + return ssb_bus_suspend(ssb); 93 + } 94 + 95 + static int ssb_host_pcmcia_resume(struct pcmcia_device *dev) 96 + { 97 + struct ssb_bus *ssb = dev->priv; 98 + 99 + return ssb_bus_resume(ssb); 100 + } 101 + #else /* CONFIG_PM */ 102 + # define ssb_host_pcmcia_suspend NULL 103 + # define ssb_host_pcmcia_resume NULL 104 + #endif /* CONFIG_PM */ 105 + 106 + static struct pcmcia_driver ssb_host_pcmcia_driver = { 107 + .owner = THIS_MODULE, 108 + .name = "ssb-pcmcia", 109 + .id_table = ssb_host_pcmcia_tbl, 110 + .probe = ssb_host_pcmcia_probe, 111 + .remove = ssb_host_pcmcia_remove, 112 + .suspend = ssb_host_pcmcia_suspend, 113 + .resume = ssb_host_pcmcia_resume, 114 + }; 115 + 116 + /* 117 + * These are not module init/exit functions! 118 + * The module_pcmcia_driver() helper cannot be used here. 119 + */ 120 + int ssb_host_pcmcia_init(void) 121 + { 122 + return pcmcia_register_driver(&ssb_host_pcmcia_driver); 123 + } 124 + 125 + void ssb_host_pcmcia_exit(void) 126 + { 127 + pcmcia_unregister_driver(&ssb_host_pcmcia_driver); 128 + }
+173
drivers/ssb/host_soc.c
··· 1 + /* 2 + * Sonics Silicon Backplane SoC host related functions. 3 + * Subsystem core 4 + * 5 + * Copyright 2005, Broadcom Corporation 6 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch> 7 + * 8 + * Licensed under the GNU/GPL. See COPYING for details. 9 + */ 10 + 11 + #include <linux/ssb/ssb.h> 12 + 13 + #include "ssb_private.h" 14 + 15 + static u8 ssb_host_soc_read8(struct ssb_device *dev, u16 offset) 16 + { 17 + struct ssb_bus *bus = dev->bus; 18 + 19 + offset += dev->core_index * SSB_CORE_SIZE; 20 + return readb(bus->mmio + offset); 21 + } 22 + 23 + static u16 ssb_host_soc_read16(struct ssb_device *dev, u16 offset) 24 + { 25 + struct ssb_bus *bus = dev->bus; 26 + 27 + offset += dev->core_index * SSB_CORE_SIZE; 28 + return readw(bus->mmio + offset); 29 + } 30 + 31 + static u32 ssb_host_soc_read32(struct ssb_device *dev, u16 offset) 32 + { 33 + struct ssb_bus *bus = dev->bus; 34 + 35 + offset += dev->core_index * SSB_CORE_SIZE; 36 + return readl(bus->mmio + offset); 37 + } 38 + 39 + #ifdef CONFIG_SSB_BLOCKIO 40 + static void ssb_host_soc_block_read(struct ssb_device *dev, void *buffer, 41 + size_t count, u16 offset, u8 reg_width) 42 + { 43 + struct ssb_bus *bus = dev->bus; 44 + void __iomem *addr; 45 + 46 + offset += dev->core_index * SSB_CORE_SIZE; 47 + addr = bus->mmio + offset; 48 + 49 + switch (reg_width) { 50 + case sizeof(u8): { 51 + u8 *buf = buffer; 52 + 53 + while (count) { 54 + *buf = __raw_readb(addr); 55 + buf++; 56 + count--; 57 + } 58 + break; 59 + } 60 + case sizeof(u16): { 61 + __le16 *buf = buffer; 62 + 63 + SSB_WARN_ON(count & 1); 64 + while (count) { 65 + *buf = (__force __le16)__raw_readw(addr); 66 + buf++; 67 + count -= 2; 68 + } 69 + break; 70 + } 71 + case sizeof(u32): { 72 + __le32 *buf = buffer; 73 + 74 + SSB_WARN_ON(count & 3); 75 + while (count) { 76 + *buf = (__force __le32)__raw_readl(addr); 77 + buf++; 78 + count -= 4; 79 + } 80 + break; 81 + } 82 + default: 83 + SSB_WARN_ON(1); 84 + } 85 + } 86 + #endif /* CONFIG_SSB_BLOCKIO */ 87 + 88 + static void ssb_host_soc_write8(struct ssb_device *dev, u16 offset, u8 value) 89 + { 90 + struct ssb_bus *bus = dev->bus; 91 + 92 + offset += dev->core_index * SSB_CORE_SIZE; 93 + writeb(value, bus->mmio + offset); 94 + } 95 + 96 + static void ssb_host_soc_write16(struct ssb_device *dev, u16 offset, u16 value) 97 + { 98 + struct ssb_bus *bus = dev->bus; 99 + 100 + offset += dev->core_index * SSB_CORE_SIZE; 101 + writew(value, bus->mmio + offset); 102 + } 103 + 104 + static void ssb_host_soc_write32(struct ssb_device *dev, u16 offset, u32 value) 105 + { 106 + struct ssb_bus *bus = dev->bus; 107 + 108 + offset += dev->core_index * SSB_CORE_SIZE; 109 + writel(value, bus->mmio + offset); 110 + } 111 + 112 + #ifdef CONFIG_SSB_BLOCKIO 113 + static void ssb_host_soc_block_write(struct ssb_device *dev, const void *buffer, 114 + size_t count, u16 offset, u8 reg_width) 115 + { 116 + struct ssb_bus *bus = dev->bus; 117 + void __iomem *addr; 118 + 119 + offset += dev->core_index * SSB_CORE_SIZE; 120 + addr = bus->mmio + offset; 121 + 122 + switch (reg_width) { 123 + case sizeof(u8): { 124 + const u8 *buf = buffer; 125 + 126 + while (count) { 127 + __raw_writeb(*buf, addr); 128 + buf++; 129 + count--; 130 + } 131 + break; 132 + } 133 + case sizeof(u16): { 134 + const __le16 *buf = buffer; 135 + 136 + SSB_WARN_ON(count & 1); 137 + while (count) { 138 + __raw_writew((__force u16)(*buf), addr); 139 + buf++; 140 + count -= 2; 141 + } 142 + break; 143 + } 144 + case sizeof(u32): { 145 + const __le32 *buf = buffer; 146 + 147 + SSB_WARN_ON(count & 3); 148 + while (count) { 149 + __raw_writel((__force u32)(*buf), addr); 150 + buf++; 151 + count -= 4; 152 + } 153 + break; 154 + } 155 + default: 156 + SSB_WARN_ON(1); 157 + } 158 + } 159 + #endif /* CONFIG_SSB_BLOCKIO */ 160 + 161 + /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */ 162 + const struct ssb_bus_ops ssb_host_soc_ops = { 163 + .read8 = ssb_host_soc_read8, 164 + .read16 = ssb_host_soc_read16, 165 + .read32 = ssb_host_soc_read32, 166 + .write8 = ssb_host_soc_write8, 167 + .write16 = ssb_host_soc_write16, 168 + .write32 = ssb_host_soc_write32, 169 + #ifdef CONFIG_SSB_BLOCKIO 170 + .block_read = ssb_host_soc_block_read, 171 + .block_write = ssb_host_soc_block_write, 172 + #endif 173 + };
+10 -162
drivers/ssb/main.c
··· 596 596 return err; 597 597 } 598 598 599 - static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset) 600 - { 601 - struct ssb_bus *bus = dev->bus; 602 - 603 - offset += dev->core_index * SSB_CORE_SIZE; 604 - return readb(bus->mmio + offset); 605 - } 606 - 607 - static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset) 608 - { 609 - struct ssb_bus *bus = dev->bus; 610 - 611 - offset += dev->core_index * SSB_CORE_SIZE; 612 - return readw(bus->mmio + offset); 613 - } 614 - 615 - static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset) 616 - { 617 - struct ssb_bus *bus = dev->bus; 618 - 619 - offset += dev->core_index * SSB_CORE_SIZE; 620 - return readl(bus->mmio + offset); 621 - } 622 - 623 - #ifdef CONFIG_SSB_BLOCKIO 624 - static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer, 625 - size_t count, u16 offset, u8 reg_width) 626 - { 627 - struct ssb_bus *bus = dev->bus; 628 - void __iomem *addr; 629 - 630 - offset += dev->core_index * SSB_CORE_SIZE; 631 - addr = bus->mmio + offset; 632 - 633 - switch (reg_width) { 634 - case sizeof(u8): { 635 - u8 *buf = buffer; 636 - 637 - while (count) { 638 - *buf = __raw_readb(addr); 639 - buf++; 640 - count--; 641 - } 642 - break; 643 - } 644 - case sizeof(u16): { 645 - __le16 *buf = buffer; 646 - 647 - SSB_WARN_ON(count & 1); 648 - while (count) { 649 - *buf = (__force __le16)__raw_readw(addr); 650 - buf++; 651 - count -= 2; 652 - } 653 - break; 654 - } 655 - case sizeof(u32): { 656 - __le32 *buf = buffer; 657 - 658 - SSB_WARN_ON(count & 3); 659 - while (count) { 660 - *buf = (__force __le32)__raw_readl(addr); 661 - buf++; 662 - count -= 4; 663 - } 664 - break; 665 - } 666 - default: 667 - SSB_WARN_ON(1); 668 - } 669 - } 670 - #endif /* CONFIG_SSB_BLOCKIO */ 671 - 672 - static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value) 673 - { 674 - struct ssb_bus *bus = dev->bus; 675 - 676 - offset += dev->core_index * SSB_CORE_SIZE; 677 - writeb(value, bus->mmio + offset); 678 - } 679 - 680 - static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value) 681 - { 682 - struct ssb_bus *bus = dev->bus; 683 - 684 - offset += dev->core_index * SSB_CORE_SIZE; 685 - writew(value, bus->mmio + offset); 686 - } 687 - 688 - static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value) 689 - { 690 - struct ssb_bus *bus = dev->bus; 691 - 692 - offset += dev->core_index * SSB_CORE_SIZE; 693 - writel(value, bus->mmio + offset); 694 - } 695 - 696 - #ifdef CONFIG_SSB_BLOCKIO 697 - static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer, 698 - size_t count, u16 offset, u8 reg_width) 699 - { 700 - struct ssb_bus *bus = dev->bus; 701 - void __iomem *addr; 702 - 703 - offset += dev->core_index * SSB_CORE_SIZE; 704 - addr = bus->mmio + offset; 705 - 706 - switch (reg_width) { 707 - case sizeof(u8): { 708 - const u8 *buf = buffer; 709 - 710 - while (count) { 711 - __raw_writeb(*buf, addr); 712 - buf++; 713 - count--; 714 - } 715 - break; 716 - } 717 - case sizeof(u16): { 718 - const __le16 *buf = buffer; 719 - 720 - SSB_WARN_ON(count & 1); 721 - while (count) { 722 - __raw_writew((__force u16)(*buf), addr); 723 - buf++; 724 - count -= 2; 725 - } 726 - break; 727 - } 728 - case sizeof(u32): { 729 - const __le32 *buf = buffer; 730 - 731 - SSB_WARN_ON(count & 3); 732 - while (count) { 733 - __raw_writel((__force u32)(*buf), addr); 734 - buf++; 735 - count -= 4; 736 - } 737 - break; 738 - } 739 - default: 740 - SSB_WARN_ON(1); 741 - } 742 - } 743 - #endif /* CONFIG_SSB_BLOCKIO */ 744 - 745 - /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */ 746 - static const struct ssb_bus_ops ssb_ssb_ops = { 747 - .read8 = ssb_ssb_read8, 748 - .read16 = ssb_ssb_read16, 749 - .read32 = ssb_ssb_read32, 750 - .write8 = ssb_ssb_write8, 751 - .write16 = ssb_ssb_write16, 752 - .write32 = ssb_ssb_write32, 753 - #ifdef CONFIG_SSB_BLOCKIO 754 - .block_read = ssb_ssb_block_read, 755 - .block_write = ssb_ssb_block_write, 756 - #endif 757 - }; 758 - 759 599 static int ssb_fetch_invariants(struct ssb_bus *bus, 760 600 ssb_invariants_func_t get_invariants) 761 601 { ··· 737 897 738 898 return err; 739 899 } 740 - EXPORT_SYMBOL(ssb_bus_pcmciabus_register); 741 900 #endif /* CONFIG_SSB_PCMCIAHOST */ 742 901 743 902 #ifdef CONFIG_SSB_SDIOHOST ··· 761 922 EXPORT_SYMBOL(ssb_bus_sdiobus_register); 762 923 #endif /* CONFIG_SSB_PCMCIAHOST */ 763 924 925 + #ifdef CONFIG_SSB_HOST_SOC 764 926 int ssb_bus_ssbbus_register(struct ssb_bus *bus, unsigned long baseaddr, 765 927 ssb_invariants_func_t get_invariants) 766 928 { 767 929 int err; 768 930 769 931 bus->bustype = SSB_BUSTYPE_SSB; 770 - bus->ops = &ssb_ssb_ops; 932 + bus->ops = &ssb_host_soc_ops; 771 933 772 934 err = ssb_bus_register(bus, get_invariants, baseaddr); 773 935 if (!err) { ··· 778 938 779 939 return err; 780 940 } 941 + #endif 781 942 782 943 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner) 783 944 { ··· 1305 1464 /* don't fail SSB init because of this */ 1306 1465 err = 0; 1307 1466 } 1467 + err = ssb_host_pcmcia_init(); 1468 + if (err) { 1469 + ssb_err("PCMCIA host initialization failed\n"); 1470 + /* don't fail SSB init because of this */ 1471 + err = 0; 1472 + } 1308 1473 err = ssb_gige_init(); 1309 1474 if (err) { 1310 1475 ssb_err("SSB Broadcom Gigabit Ethernet driver initialization failed\n"); ··· 1328 1481 static void __exit ssb_modexit(void) 1329 1482 { 1330 1483 ssb_gige_exit(); 1484 + ssb_host_pcmcia_exit(); 1331 1485 b43_pci_ssb_bridge_exit(); 1332 1486 bus_unregister(&ssb_bustype); 1333 1487 }
+16
drivers/ssb/ssb_private.h
··· 94 94 extern int ssb_pcmcia_hardware_setup(struct ssb_bus *bus); 95 95 extern void ssb_pcmcia_exit(struct ssb_bus *bus); 96 96 extern int ssb_pcmcia_init(struct ssb_bus *bus); 97 + extern int ssb_host_pcmcia_init(void); 98 + extern void ssb_host_pcmcia_exit(void); 97 99 extern const struct ssb_bus_ops ssb_pcmcia_ops; 98 100 #else /* CONFIG_SSB_PCMCIAHOST */ 99 101 static inline int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, ··· 118 116 static inline int ssb_pcmcia_init(struct ssb_bus *bus) 119 117 { 120 118 return 0; 119 + } 120 + static inline int ssb_host_pcmcia_init(void) 121 + { 122 + return 0; 123 + } 124 + static inline void ssb_host_pcmcia_exit(void) 125 + { 121 126 } 122 127 #endif /* CONFIG_SSB_PCMCIAHOST */ 123 128 ··· 157 148 } 158 149 #endif /* CONFIG_SSB_SDIOHOST */ 159 150 151 + /************************************************** 152 + * host_soc.c 153 + **************************************************/ 154 + 155 + #ifdef CONFIG_SSB_HOST_SOC 156 + extern const struct ssb_bus_ops ssb_host_soc_ops; 157 + #endif 160 158 161 159 /* scan.c */ 162 160 extern const char *ssb_core_name(u16 coreid);