Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://git.infradead.org/mtd-2.6

* git://git.infradead.org/mtd-2.6:
Remove accidentally-added include/linux/utsrelease.h
Revert "[MTD] blkdev helper code: fix printk format warning"
[MTD] Add SSFDC (SmartMedia) read-only translation layer
[MTD] pmc551 pci cleanup
[MTD] pmc551 use kzalloc
[MTD] pmc551 whitespace cleanup
[MTD] Remove iq80310 map driver
[MTD NAND] Fix in typo ndfc.c causing wrong ECC layout
[MTD] physmap: add power management support
ioremap balanced with iounmap for drivers/mtd subsystem
[MTD] Switch to pci_get_device and do ref counting
[MTD] blkdev helper code: fix printk format warning
[MTD] Fix ixp4xx partition parsing.
[JFFS2] Remove unneeded ifdefs from jffs2_fs_i.h
[MTD NAND] Remove old code in au1550nd.c
[MTD] Unlock NOR flash automatically where necessary

+1225 -695
+8
drivers/mtd/Kconfig
··· 263 263 264 264 http://www.gensw.com/pages/prod/bios/rfd.htm 265 265 266 + config SSFDC 267 + bool "NAND SSFDC (SmartMedia) read only translation layer" 268 + depends on MTD 269 + default n 270 + help 271 + This enables read only access to SmartMedia formatted NAND 272 + flash. You can mount it with FAT file system. 273 + 266 274 source "drivers/mtd/chips/Kconfig" 267 275 268 276 source "drivers/mtd/maps/Kconfig"
+1
drivers/mtd/Makefile
··· 21 21 obj-$(CONFIG_NFTL) += nftl.o mtd_blkdevs.o 22 22 obj-$(CONFIG_INFTL) += inftl.o mtd_blkdevs.o 23 23 obj-$(CONFIG_RFD_FTL) += rfd_ftl.o mtd_blkdevs.o 24 + obj-$(CONFIG_SSFDC) += ssfdc.o mtd_blkdevs.o 24 25 25 26 nftl-objs := nftlcore.o nftlmount.o 26 27 inftl-objs := inftlcore.o inftlmount.o
+1
drivers/mtd/chips/cfi_cmdset_0002.c
··· 212 212 { 213 213 mtd->lock = cfi_atmel_lock; 214 214 mtd->unlock = cfi_atmel_unlock; 215 + mtd->flags |= MTD_STUPID_LOCK; 215 216 } 216 217 217 218 static struct cfi_fixup cfi_fixup_table[] = {
+561 -529
drivers/mtd/devices/pmc551.c
··· 4 4 * PMC551 PCI Mezzanine Ram Device 5 5 * 6 6 * Author: 7 - * Mark Ferrell <mferrell@mvista.com> 8 - * Copyright 1999,2000 Nortel Networks 7 + * Mark Ferrell <mferrell@mvista.com> 8 + * Copyright 1999,2000 Nortel Networks 9 9 * 10 10 * License: 11 - * As part of this driver was derived from the slram.c driver it 12 - * falls under the same license, which is GNU General Public 13 - * License v2 11 + * As part of this driver was derived from the slram.c driver it 12 + * falls under the same license, which is GNU General Public 13 + * License v2 14 14 * 15 15 * Description: 16 - * This driver is intended to support the PMC551 PCI Ram device 17 - * from Ramix Inc. The PMC551 is a PMC Mezzanine module for 18 - * cPCI embedded systems. The device contains a single SROM 19 - * that initially programs the V370PDC chipset onboard the 20 - * device, and various banks of DRAM/SDRAM onboard. This driver 21 - * implements this PCI Ram device as an MTD (Memory Technology 22 - * Device) so that it can be used to hold a file system, or for 23 - * added swap space in embedded systems. Since the memory on 24 - * this board isn't as fast as main memory we do not try to hook 25 - * it into main memory as that would simply reduce performance 26 - * on the system. Using it as a block device allows us to use 27 - * it as high speed swap or for a high speed disk device of some 28 - * sort. Which becomes very useful on diskless systems in the 29 - * embedded market I might add. 16 + * This driver is intended to support the PMC551 PCI Ram device 17 + * from Ramix Inc. The PMC551 is a PMC Mezzanine module for 18 + * cPCI embedded systems. The device contains a single SROM 19 + * that initially programs the V370PDC chipset onboard the 20 + * device, and various banks of DRAM/SDRAM onboard. This driver 21 + * implements this PCI Ram device as an MTD (Memory Technology 22 + * Device) so that it can be used to hold a file system, or for 23 + * added swap space in embedded systems. Since the memory on 24 + * this board isn't as fast as main memory we do not try to hook 25 + * it into main memory as that would simply reduce performance 26 + * on the system. Using it as a block device allows us to use 27 + * it as high speed swap or for a high speed disk device of some 28 + * sort. Which becomes very useful on diskless systems in the 29 + * embedded market I might add. 30 30 * 31 31 * Notes: 32 - * Due to what I assume is more buggy SROM, the 64M PMC551 I 33 - * have available claims that all 4 of it's DRAM banks have 64M 34 - * of ram configured (making a grand total of 256M onboard). 35 - * This is slightly annoying since the BAR0 size reflects the 36 - * aperture size, not the dram size, and the V370PDC supplies no 37 - * other method for memory size discovery. This problem is 38 - * mostly only relevant when compiled as a module, as the 39 - * unloading of the module with an aperture size smaller then 40 - * the ram will cause the driver to detect the onboard memory 41 - * size to be equal to the aperture size when the module is 42 - * reloaded. Soooo, to help, the module supports an msize 43 - * option to allow the specification of the onboard memory, and 44 - * an asize option, to allow the specification of the aperture 45 - * size. The aperture must be equal to or less then the memory 46 - * size, the driver will correct this if you screw it up. This 47 - * problem is not relevant for compiled in drivers as compiled 48 - * in drivers only init once. 32 + * Due to what I assume is more buggy SROM, the 64M PMC551 I 33 + * have available claims that all 4 of it's DRAM banks have 64M 34 + * of ram configured (making a grand total of 256M onboard). 35 + * This is slightly annoying since the BAR0 size reflects the 36 + * aperture size, not the dram size, and the V370PDC supplies no 37 + * other method for memory size discovery. This problem is 38 + * mostly only relevant when compiled as a module, as the 39 + * unloading of the module with an aperture size smaller then 40 + * the ram will cause the driver to detect the onboard memory 41 + * size to be equal to the aperture size when the module is 42 + * reloaded. Soooo, to help, the module supports an msize 43 + * option to allow the specification of the onboard memory, and 44 + * an asize option, to allow the specification of the aperture 45 + * size. The aperture must be equal to or less then the memory 46 + * size, the driver will correct this if you screw it up. This 47 + * problem is not relevant for compiled in drivers as compiled 48 + * in drivers only init once. 49 49 * 50 50 * Credits: 51 - * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the 52 - * initial example code of how to initialize this device and for 53 - * help with questions I had concerning operation of the device. 51 + * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the 52 + * initial example code of how to initialize this device and for 53 + * help with questions I had concerning operation of the device. 54 54 * 55 - * Most of the MTD code for this driver was originally written 56 - * for the slram.o module in the MTD drivers package which 57 - * allows the mapping of system memory into an MTD device. 58 - * Since the PMC551 memory module is accessed in the same 59 - * fashion as system memory, the slram.c code became a very nice 60 - * fit to the needs of this driver. All we added was PCI 61 - * detection/initialization to the driver and automatically figure 62 - * out the size via the PCI detection.o, later changes by Corey 63 - * Minyard set up the card to utilize a 1M sliding apature. 55 + * Most of the MTD code for this driver was originally written 56 + * for the slram.o module in the MTD drivers package which 57 + * allows the mapping of system memory into an MTD device. 58 + * Since the PMC551 memory module is accessed in the same 59 + * fashion as system memory, the slram.c code became a very nice 60 + * fit to the needs of this driver. All we added was PCI 61 + * detection/initialization to the driver and automatically figure 62 + * out the size via the PCI detection.o, later changes by Corey 63 + * Minyard set up the card to utilize a 1M sliding apature. 64 64 * 65 - * Corey Minyard <minyard@nortelnetworks.com> 66 - * * Modified driver to utilize a sliding aperture instead of 67 - * mapping all memory into kernel space which turned out to 68 - * be very wasteful. 69 - * * Located a bug in the SROM's initialization sequence that 70 - * made the memory unusable, added a fix to code to touch up 71 - * the DRAM some. 65 + * Corey Minyard <minyard@nortelnetworks.com> 66 + * * Modified driver to utilize a sliding aperture instead of 67 + * mapping all memory into kernel space which turned out to 68 + * be very wasteful. 69 + * * Located a bug in the SROM's initialization sequence that 70 + * made the memory unusable, added a fix to code to touch up 71 + * the DRAM some. 72 72 * 73 73 * Bugs/FIXME's: 74 - * * MUST fix the init function to not spin on a register 75 - * waiting for it to set .. this does not safely handle busted 76 - * devices that never reset the register correctly which will 77 - * cause the system to hang w/ a reboot being the only chance at 78 - * recover. [sort of fixed, could be better] 79 - * * Add I2C handling of the SROM so we can read the SROM's information 80 - * about the aperture size. This should always accurately reflect the 81 - * onboard memory size. 82 - * * Comb the init routine. It's still a bit cludgy on a few things. 74 + * * MUST fix the init function to not spin on a register 75 + * waiting for it to set .. this does not safely handle busted 76 + * devices that never reset the register correctly which will 77 + * cause the system to hang w/ a reboot being the only chance at 78 + * recover. [sort of fixed, could be better] 79 + * * Add I2C handling of the SROM so we can read the SROM's information 80 + * about the aperture size. This should always accurately reflect the 81 + * onboard memory size. 82 + * * Comb the init routine. It's still a bit cludgy on a few things. 83 83 */ 84 84 85 85 #include <linux/kernel.h> ··· 105 105 106 106 static struct mtd_info *pmc551list; 107 107 108 - static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr) 108 + static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr) 109 109 { 110 - struct mypriv *priv = mtd->priv; 111 - u32 soff_hi, soff_lo; /* start address offset hi/lo */ 112 - u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ 113 - unsigned long end; 110 + struct mypriv *priv = mtd->priv; 111 + u32 soff_hi, soff_lo; /* start address offset hi/lo */ 112 + u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ 113 + unsigned long end; 114 114 u_char *ptr; 115 115 size_t retlen; 116 116 117 117 #ifdef CONFIG_MTD_PMC551_DEBUG 118 - printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len); 118 + printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, 119 + (long)instr->len); 119 120 #endif 120 121 121 - end = instr->addr + instr->len - 1; 122 + end = instr->addr + instr->len - 1; 122 123 123 - /* Is it past the end? */ 124 - if ( end > mtd->size ) { 124 + /* Is it past the end? */ 125 + if (end > mtd->size) { 125 126 #ifdef CONFIG_MTD_PMC551_DEBUG 126 - printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", (long)end, (long)mtd->size); 127 + printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", 128 + (long)end, (long)mtd->size); 127 129 #endif 128 - return -EINVAL; 129 - } 130 + return -EINVAL; 131 + } 130 132 131 - eoff_hi = end & ~(priv->asize - 1); 132 - soff_hi = instr->addr & ~(priv->asize - 1); 133 - eoff_lo = end & (priv->asize - 1); 134 - soff_lo = instr->addr & (priv->asize - 1); 133 + eoff_hi = end & ~(priv->asize - 1); 134 + soff_hi = instr->addr & ~(priv->asize - 1); 135 + eoff_lo = end & (priv->asize - 1); 136 + soff_lo = instr->addr & (priv->asize - 1); 135 137 136 - pmc551_point (mtd, instr->addr, instr->len, &retlen, &ptr); 138 + pmc551_point(mtd, instr->addr, instr->len, &retlen, &ptr); 137 139 138 - if ( soff_hi == eoff_hi || mtd->size == priv->asize) { 139 - /* The whole thing fits within one access, so just one shot 140 - will do it. */ 141 - memset(ptr, 0xff, instr->len); 142 - } else { 143 - /* We have to do multiple writes to get all the data 144 - written. */ 145 - while (soff_hi != eoff_hi) { 140 + if (soff_hi == eoff_hi || mtd->size == priv->asize) { 141 + /* The whole thing fits within one access, so just one shot 142 + will do it. */ 143 + memset(ptr, 0xff, instr->len); 144 + } else { 145 + /* We have to do multiple writes to get all the data 146 + written. */ 147 + while (soff_hi != eoff_hi) { 146 148 #ifdef CONFIG_MTD_PMC551_DEBUG 147 - printk( KERN_DEBUG "pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); 149 + printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, " 150 + "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); 148 151 #endif 149 - memset(ptr, 0xff, priv->asize); 150 - if (soff_hi + priv->asize >= mtd->size) { 151 - goto out; 152 - } 153 - soff_hi += priv->asize; 154 - pmc551_point (mtd,(priv->base_map0|soff_hi), 155 - priv->asize, &retlen, &ptr); 156 - } 157 - memset (ptr, 0xff, eoff_lo); 158 - } 152 + memset(ptr, 0xff, priv->asize); 153 + if (soff_hi + priv->asize >= mtd->size) { 154 + goto out; 155 + } 156 + soff_hi += priv->asize; 157 + pmc551_point(mtd, (priv->base_map0 | soff_hi), 158 + priv->asize, &retlen, &ptr); 159 + } 160 + memset(ptr, 0xff, eoff_lo); 161 + } 159 162 160 - out: 163 + out: 161 164 instr->state = MTD_ERASE_DONE; 162 165 #ifdef CONFIG_MTD_PMC551_DEBUG 163 166 printk(KERN_DEBUG "pmc551_erase() done\n"); 164 167 #endif 165 168 166 - mtd_erase_callback(instr); 167 - return 0; 169 + mtd_erase_callback(instr); 170 + return 0; 168 171 } 169 172 170 - 171 - static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf) 173 + static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len, 174 + size_t * retlen, u_char ** mtdbuf) 172 175 { 173 - struct mypriv *priv = mtd->priv; 174 - u32 soff_hi; 175 - u32 soff_lo; 176 + struct mypriv *priv = mtd->priv; 177 + u32 soff_hi; 178 + u32 soff_lo; 176 179 177 180 #ifdef CONFIG_MTD_PMC551_DEBUG 178 181 printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len); ··· 183 180 184 181 if (from + len > mtd->size) { 185 182 #ifdef CONFIG_MTD_PMC551_DEBUG 186 - printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", (long)from+len, (long)mtd->size); 183 + printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", 184 + (long)from + len, (long)mtd->size); 187 185 #endif 188 186 return -EINVAL; 189 187 } 190 188 191 - soff_hi = from & ~(priv->asize - 1); 192 - soff_lo = from & (priv->asize - 1); 189 + soff_hi = from & ~(priv->asize - 1); 190 + soff_lo = from & (priv->asize - 1); 193 191 194 192 /* Cheap hack optimization */ 195 - if( priv->curr_map0 != from ) { 196 - pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0, 197 - (priv->base_map0 | soff_hi) ); 193 + if (priv->curr_map0 != from) { 194 + pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0, 195 + (priv->base_map0 | soff_hi)); 198 196 priv->curr_map0 = soff_hi; 199 197 } 200 198 ··· 204 200 return 0; 205 201 } 206 202 207 - 208 - static void pmc551_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len) 203 + static void pmc551_unpoint(struct mtd_info *mtd, u_char * addr, loff_t from, 204 + size_t len) 209 205 { 210 206 #ifdef CONFIG_MTD_PMC551_DEBUG 211 207 printk(KERN_DEBUG "pmc551_unpoint()\n"); 212 208 #endif 213 209 } 214 210 215 - 216 - static int pmc551_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) 211 + static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len, 212 + size_t * retlen, u_char * buf) 217 213 { 218 - struct mypriv *priv = mtd->priv; 219 - u32 soff_hi, soff_lo; /* start address offset hi/lo */ 220 - u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ 221 - unsigned long end; 214 + struct mypriv *priv = mtd->priv; 215 + u32 soff_hi, soff_lo; /* start address offset hi/lo */ 216 + u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ 217 + unsigned long end; 222 218 u_char *ptr; 223 - u_char *copyto = buf; 219 + u_char *copyto = buf; 224 220 225 221 #ifdef CONFIG_MTD_PMC551_DEBUG 226 - printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from, (long)len, (long)priv->asize); 222 + printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", 223 + (long)from, (long)len, (long)priv->asize); 227 224 #endif 228 225 229 - end = from + len - 1; 226 + end = from + len - 1; 230 227 231 - /* Is it past the end? */ 232 - if (end > mtd->size) { 228 + /* Is it past the end? */ 229 + if (end > mtd->size) { 233 230 #ifdef CONFIG_MTD_PMC551_DEBUG 234 - printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", (long) end, (long)mtd->size); 231 + printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", 232 + (long)end, (long)mtd->size); 235 233 #endif 236 - return -EINVAL; 237 - } 234 + return -EINVAL; 235 + } 238 236 239 - soff_hi = from & ~(priv->asize - 1); 240 - eoff_hi = end & ~(priv->asize - 1); 241 - soff_lo = from & (priv->asize - 1); 242 - eoff_lo = end & (priv->asize - 1); 237 + soff_hi = from & ~(priv->asize - 1); 238 + eoff_hi = end & ~(priv->asize - 1); 239 + soff_lo = from & (priv->asize - 1); 240 + eoff_lo = end & (priv->asize - 1); 243 241 244 - pmc551_point (mtd, from, len, retlen, &ptr); 242 + pmc551_point(mtd, from, len, retlen, &ptr); 245 243 246 - if (soff_hi == eoff_hi) { 247 - /* The whole thing fits within one access, so just one shot 248 - will do it. */ 249 - memcpy(copyto, ptr, len); 250 - copyto += len; 251 - } else { 252 - /* We have to do multiple writes to get all the data 253 - written. */ 254 - while (soff_hi != eoff_hi) { 244 + if (soff_hi == eoff_hi) { 245 + /* The whole thing fits within one access, so just one shot 246 + will do it. */ 247 + memcpy(copyto, ptr, len); 248 + copyto += len; 249 + } else { 250 + /* We have to do multiple writes to get all the data 251 + written. */ 252 + while (soff_hi != eoff_hi) { 255 253 #ifdef CONFIG_MTD_PMC551_DEBUG 256 - printk( KERN_DEBUG "pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); 254 + printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, " 255 + "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); 257 256 #endif 258 - memcpy(copyto, ptr, priv->asize); 259 - copyto += priv->asize; 260 - if (soff_hi + priv->asize >= mtd->size) { 261 - goto out; 262 - } 263 - soff_hi += priv->asize; 264 - pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr); 265 - } 266 - memcpy(copyto, ptr, eoff_lo); 267 - copyto += eoff_lo; 268 - } 257 + memcpy(copyto, ptr, priv->asize); 258 + copyto += priv->asize; 259 + if (soff_hi + priv->asize >= mtd->size) { 260 + goto out; 261 + } 262 + soff_hi += priv->asize; 263 + pmc551_point(mtd, soff_hi, priv->asize, retlen, &ptr); 264 + } 265 + memcpy(copyto, ptr, eoff_lo); 266 + copyto += eoff_lo; 267 + } 269 268 270 - out: 269 + out: 271 270 #ifdef CONFIG_MTD_PMC551_DEBUG 272 271 printk(KERN_DEBUG "pmc551_read() done\n"); 273 272 #endif 274 - *retlen = copyto - buf; 275 - return 0; 273 + *retlen = copyto - buf; 274 + return 0; 276 275 } 277 276 278 - static int pmc551_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf) 277 + static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len, 278 + size_t * retlen, const u_char * buf) 279 279 { 280 - struct mypriv *priv = mtd->priv; 281 - u32 soff_hi, soff_lo; /* start address offset hi/lo */ 282 - u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ 283 - unsigned long end; 280 + struct mypriv *priv = mtd->priv; 281 + u32 soff_hi, soff_lo; /* start address offset hi/lo */ 282 + u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ 283 + unsigned long end; 284 284 u_char *ptr; 285 - const u_char *copyfrom = buf; 286 - 285 + const u_char *copyfrom = buf; 287 286 288 287 #ifdef CONFIG_MTD_PMC551_DEBUG 289 - printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to, (long)len, (long)priv->asize); 288 + printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", 289 + (long)to, (long)len, (long)priv->asize); 290 290 #endif 291 291 292 - end = to + len - 1; 293 - /* Is it past the end? or did the u32 wrap? */ 294 - if (end > mtd->size ) { 292 + end = to + len - 1; 293 + /* Is it past the end? or did the u32 wrap? */ 294 + if (end > mtd->size) { 295 295 #ifdef CONFIG_MTD_PMC551_DEBUG 296 - printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end, (long)mtd->size, (long)to); 296 + printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, " 297 + "size: %ld, to: %ld)\n", (long)end, (long)mtd->size, 298 + (long)to); 297 299 #endif 298 - return -EINVAL; 299 - } 300 + return -EINVAL; 301 + } 300 302 301 - soff_hi = to & ~(priv->asize - 1); 302 - eoff_hi = end & ~(priv->asize - 1); 303 - soff_lo = to & (priv->asize - 1); 304 - eoff_lo = end & (priv->asize - 1); 303 + soff_hi = to & ~(priv->asize - 1); 304 + eoff_hi = end & ~(priv->asize - 1); 305 + soff_lo = to & (priv->asize - 1); 306 + eoff_lo = end & (priv->asize - 1); 305 307 306 - pmc551_point (mtd, to, len, retlen, &ptr); 308 + pmc551_point(mtd, to, len, retlen, &ptr); 307 309 308 - if (soff_hi == eoff_hi) { 309 - /* The whole thing fits within one access, so just one shot 310 - will do it. */ 311 - memcpy(ptr, copyfrom, len); 312 - copyfrom += len; 313 - } else { 314 - /* We have to do multiple writes to get all the data 315 - written. */ 316 - while (soff_hi != eoff_hi) { 310 + if (soff_hi == eoff_hi) { 311 + /* The whole thing fits within one access, so just one shot 312 + will do it. */ 313 + memcpy(ptr, copyfrom, len); 314 + copyfrom += len; 315 + } else { 316 + /* We have to do multiple writes to get all the data 317 + written. */ 318 + while (soff_hi != eoff_hi) { 317 319 #ifdef CONFIG_MTD_PMC551_DEBUG 318 - printk( KERN_DEBUG "pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); 320 + printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, " 321 + "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); 319 322 #endif 320 - memcpy(ptr, copyfrom, priv->asize); 321 - copyfrom += priv->asize; 322 - if (soff_hi >= mtd->size) { 323 - goto out; 324 - } 325 - soff_hi += priv->asize; 326 - pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr); 327 - } 328 - memcpy(ptr, copyfrom, eoff_lo); 329 - copyfrom += eoff_lo; 330 - } 323 + memcpy(ptr, copyfrom, priv->asize); 324 + copyfrom += priv->asize; 325 + if (soff_hi >= mtd->size) { 326 + goto out; 327 + } 328 + soff_hi += priv->asize; 329 + pmc551_point(mtd, soff_hi, priv->asize, retlen, &ptr); 330 + } 331 + memcpy(ptr, copyfrom, eoff_lo); 332 + copyfrom += eoff_lo; 333 + } 331 334 332 - out: 335 + out: 333 336 #ifdef CONFIG_MTD_PMC551_DEBUG 334 337 printk(KERN_DEBUG "pmc551_write() done\n"); 335 338 #endif 336 - *retlen = copyfrom - buf; 337 - return 0; 339 + *retlen = copyfrom - buf; 340 + return 0; 338 341 } 339 342 340 343 /* ··· 356 345 * mechanism 357 346 * returns the size of the memory region found. 358 347 */ 359 - static u32 fixup_pmc551 (struct pci_dev *dev) 348 + static u32 fixup_pmc551(struct pci_dev *dev) 360 349 { 361 350 #ifdef CONFIG_MTD_PMC551_BUGFIX 362 - u32 dram_data; 351 + u32 dram_data; 363 352 #endif 364 - u32 size, dcmd, cfg, dtmp; 365 - u16 cmd, tmp, i; 353 + u32 size, dcmd, cfg, dtmp; 354 + u16 cmd, tmp, i; 366 355 u8 bcmd, counter; 367 356 368 - /* Sanity Check */ 369 - if(!dev) { 370 - return -ENODEV; 371 - } 357 + /* Sanity Check */ 358 + if (!dev) { 359 + return -ENODEV; 360 + } 372 361 373 362 /* 374 363 * Attempt to reset the card 375 364 * FIXME: Stop Spinning registers 376 365 */ 377 - counter=0; 366 + counter = 0; 378 367 /* unlock registers */ 379 - pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5 ); 368 + pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5); 380 369 /* read in old data */ 381 - pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd ); 370 + pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd); 382 371 /* bang the reset line up and down for a few */ 383 - for(i=0;i<10;i++) { 384 - counter=0; 372 + for (i = 0; i < 10; i++) { 373 + counter = 0; 385 374 bcmd &= ~0x80; 386 - while(counter++ < 100) { 375 + while (counter++ < 100) { 387 376 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd); 388 377 } 389 - counter=0; 378 + counter = 0; 390 379 bcmd |= 0x80; 391 - while(counter++ < 100) { 380 + while (counter++ < 100) { 392 381 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd); 393 382 } 394 383 } 395 - bcmd |= (0x40|0x20); 384 + bcmd |= (0x40 | 0x20); 396 385 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd); 397 386 398 - /* 387 + /* 399 388 * Take care and turn off the memory on the device while we 400 389 * tweak the configurations 401 390 */ 402 - pci_read_config_word(dev, PCI_COMMAND, &cmd); 403 - tmp = cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY); 404 - pci_write_config_word(dev, PCI_COMMAND, tmp); 391 + pci_read_config_word(dev, PCI_COMMAND, &cmd); 392 + tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY); 393 + pci_write_config_word(dev, PCI_COMMAND, tmp); 405 394 406 395 /* 407 396 * Disable existing aperture before probing memory size 408 397 */ 409 398 pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd); 410 - dtmp=(dcmd|PMC551_PCI_MEM_MAP_ENABLE|PMC551_PCI_MEM_MAP_REG_EN); 399 + dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN); 411 400 pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp); 412 401 /* 413 402 * Grab old BAR0 config so that we can figure out memory size ··· 418 407 * then write all 1's to the memory space, read back the result into 419 408 * "size", and then write back all the old config. 420 409 */ 421 - pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &cfg ); 410 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg); 422 411 #ifndef CONFIG_MTD_PMC551_BUGFIX 423 - pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, ~0 ); 424 - pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &size ); 425 - size = (size&PCI_BASE_ADDRESS_MEM_MASK); 426 - size &= ~(size-1); 427 - pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg ); 412 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0); 413 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size); 414 + size = (size & PCI_BASE_ADDRESS_MEM_MASK); 415 + size &= ~(size - 1); 416 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg); 428 417 #else 429 - /* 430 - * Get the size of the memory by reading all the DRAM size values 431 - * and adding them up. 432 - * 433 - * KLUDGE ALERT: the boards we are using have invalid column and 434 - * row mux values. We fix them here, but this will break other 435 - * memory configurations. 436 - */ 437 - pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data); 438 - size = PMC551_DRAM_BLK_GET_SIZE(dram_data); 439 - dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); 440 - dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); 441 - pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data); 418 + /* 419 + * Get the size of the memory by reading all the DRAM size values 420 + * and adding them up. 421 + * 422 + * KLUDGE ALERT: the boards we are using have invalid column and 423 + * row mux values. We fix them here, but this will break other 424 + * memory configurations. 425 + */ 426 + pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data); 427 + size = PMC551_DRAM_BLK_GET_SIZE(dram_data); 428 + dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); 429 + dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); 430 + pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data); 442 431 443 - pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data); 444 - size += PMC551_DRAM_BLK_GET_SIZE(dram_data); 445 - dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); 446 - dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); 447 - pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data); 432 + pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data); 433 + size += PMC551_DRAM_BLK_GET_SIZE(dram_data); 434 + dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); 435 + dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); 436 + pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data); 448 437 449 - pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data); 450 - size += PMC551_DRAM_BLK_GET_SIZE(dram_data); 451 - dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); 452 - dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); 453 - pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data); 438 + pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data); 439 + size += PMC551_DRAM_BLK_GET_SIZE(dram_data); 440 + dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); 441 + dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); 442 + pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data); 454 443 455 - pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data); 456 - size += PMC551_DRAM_BLK_GET_SIZE(dram_data); 457 - dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); 458 - dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); 459 - pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data); 444 + pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data); 445 + size += PMC551_DRAM_BLK_GET_SIZE(dram_data); 446 + dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); 447 + dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); 448 + pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data); 460 449 461 - /* 462 - * Oops .. something went wrong 463 - */ 464 - if( (size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) { 465 - return -ENODEV; 466 - } 467 - #endif /* CONFIG_MTD_PMC551_BUGFIX */ 450 + /* 451 + * Oops .. something went wrong 452 + */ 453 + if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) { 454 + return -ENODEV; 455 + } 456 + #endif /* CONFIG_MTD_PMC551_BUGFIX */ 468 457 469 - if ((cfg&PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) { 470 - return -ENODEV; 458 + if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) { 459 + return -ENODEV; 471 460 } 472 461 473 - /* 474 - * Precharge Dram 475 - */ 476 - pci_write_config_word( dev, PMC551_SDRAM_MA, 0x0400 ); 477 - pci_write_config_word( dev, PMC551_SDRAM_CMD, 0x00bf ); 462 + /* 463 + * Precharge Dram 464 + */ 465 + pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400); 466 + pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf); 478 467 479 - /* 480 - * Wait until command has gone through 481 - * FIXME: register spinning issue 482 - */ 483 - do { pci_read_config_word( dev, PMC551_SDRAM_CMD, &cmd ); 484 - if(counter++ > 100)break; 485 - } while ( (PCI_COMMAND_IO) & cmd ); 468 + /* 469 + * Wait until command has gone through 470 + * FIXME: register spinning issue 471 + */ 472 + do { 473 + pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd); 474 + if (counter++ > 100) 475 + break; 476 + } while ((PCI_COMMAND_IO) & cmd); 486 477 487 - /* 478 + /* 488 479 * Turn on auto refresh 489 480 * The loop is taken directly from Ramix's example code. I assume that 490 481 * this must be held high for some duration of time, but I can find no 491 482 * documentation refrencing the reasons why. 492 - */ 493 - for ( i = 1; i<=8 ; i++) { 494 - pci_write_config_word (dev, PMC551_SDRAM_CMD, 0x0df); 483 + */ 484 + for (i = 1; i <= 8; i++) { 485 + pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df); 495 486 496 - /* 497 - * Make certain command has gone through 498 - * FIXME: register spinning issue 499 - */ 500 - counter=0; 501 - do { pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd); 502 - if(counter++ > 100)break; 503 - } while ( (PCI_COMMAND_IO) & cmd ); 504 - } 487 + /* 488 + * Make certain command has gone through 489 + * FIXME: register spinning issue 490 + */ 491 + counter = 0; 492 + do { 493 + pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd); 494 + if (counter++ > 100) 495 + break; 496 + } while ((PCI_COMMAND_IO) & cmd); 497 + } 505 498 506 - pci_write_config_word ( dev, PMC551_SDRAM_MA, 0x0020); 507 - pci_write_config_word ( dev, PMC551_SDRAM_CMD, 0x0ff); 499 + pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020); 500 + pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff); 508 501 509 - /* 510 - * Wait until command completes 511 - * FIXME: register spinning issue 512 - */ 513 - counter=0; 514 - do { pci_read_config_word ( dev, PMC551_SDRAM_CMD, &cmd); 515 - if(counter++ > 100)break; 516 - } while ( (PCI_COMMAND_IO) & cmd ); 502 + /* 503 + * Wait until command completes 504 + * FIXME: register spinning issue 505 + */ 506 + counter = 0; 507 + do { 508 + pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd); 509 + if (counter++ > 100) 510 + break; 511 + } while ((PCI_COMMAND_IO) & cmd); 517 512 518 - pci_read_config_dword ( dev, PMC551_DRAM_CFG, &dcmd); 519 - dcmd |= 0x02000000; 520 - pci_write_config_dword ( dev, PMC551_DRAM_CFG, dcmd); 513 + pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd); 514 + dcmd |= 0x02000000; 515 + pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd); 521 516 522 - /* 523 - * Check to make certain fast back-to-back, if not 524 - * then set it so 525 - */ 526 - pci_read_config_word( dev, PCI_STATUS, &cmd); 527 - if((cmd&PCI_COMMAND_FAST_BACK) == 0) { 528 - cmd |= PCI_COMMAND_FAST_BACK; 529 - pci_write_config_word( dev, PCI_STATUS, cmd); 530 - } 517 + /* 518 + * Check to make certain fast back-to-back, if not 519 + * then set it so 520 + */ 521 + pci_read_config_word(dev, PCI_STATUS, &cmd); 522 + if ((cmd & PCI_COMMAND_FAST_BACK) == 0) { 523 + cmd |= PCI_COMMAND_FAST_BACK; 524 + pci_write_config_word(dev, PCI_STATUS, cmd); 525 + } 531 526 532 - /* 533 - * Check to make certain the DEVSEL is set correctly, this device 534 - * has a tendancy to assert DEVSEL and TRDY when a write is performed 535 - * to the memory when memory is read-only 536 - */ 537 - if((cmd&PCI_STATUS_DEVSEL_MASK) != 0x0) { 538 - cmd &= ~PCI_STATUS_DEVSEL_MASK; 539 - pci_write_config_word( dev, PCI_STATUS, cmd ); 540 - } 541 - /* 542 - * Set to be prefetchable and put everything back based on old cfg. 527 + /* 528 + * Check to make certain the DEVSEL is set correctly, this device 529 + * has a tendancy to assert DEVSEL and TRDY when a write is performed 530 + * to the memory when memory is read-only 531 + */ 532 + if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) { 533 + cmd &= ~PCI_STATUS_DEVSEL_MASK; 534 + pci_write_config_word(dev, PCI_STATUS, cmd); 535 + } 536 + /* 537 + * Set to be prefetchable and put everything back based on old cfg. 543 538 * it's possible that the reset of the V370PDC nuked the original 544 539 * setup 545 - */ 540 + */ 546 541 /* 547 - cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH; 548 - pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg ); 549 - */ 542 + cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH; 543 + pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg ); 544 + */ 550 545 551 - /* 552 - * Turn PCI memory and I/O bus access back on 553 - */ 554 - pci_write_config_word( dev, PCI_COMMAND, 555 - PCI_COMMAND_MEMORY | PCI_COMMAND_IO ); 546 + /* 547 + * Turn PCI memory and I/O bus access back on 548 + */ 549 + pci_write_config_word(dev, PCI_COMMAND, 550 + PCI_COMMAND_MEMORY | PCI_COMMAND_IO); 556 551 #ifdef CONFIG_MTD_PMC551_DEBUG 557 - /* 558 - * Some screen fun 559 - */ 560 - printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%llx\n", 561 - (size<1024)?size:(size<1048576)?size>>10:size>>20, 562 - (size<1024)?'B':(size<1048576)?'K':'M', 563 - size, ((dcmd&(0x1<<3)) == 0)?"non-":"", 564 - (unsigned long long)((dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK)); 552 + /* 553 + * Some screen fun 554 + */ 555 + printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at " 556 + "0x%llx\n", (size < 1024) ? size : (size < 1048576) ? 557 + size >> 10 : size >> 20, 558 + (size < 1024) ? 'B' : (size < 1048576) ? 'K' : 'M', size, 559 + ((dcmd & (0x1 << 3)) == 0) ? "non-" : "", 560 + (unsigned long long)pci_resource_start(dev, 0)); 565 561 566 - /* 567 - * Check to see the state of the memory 568 - */ 569 - pci_read_config_dword( dev, PMC551_DRAM_BLK0, &dcmd ); 570 - printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n" 571 - "pmc551: DRAM_BLK0 Size: %d at %d\n" 572 - "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n", 573 - (((0x1<<1)&dcmd) == 0)?"RW":"RO", 574 - (((0x1<<0)&dcmd) == 0)?"Off":"On", 575 - PMC551_DRAM_BLK_GET_SIZE(dcmd), 576 - ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) ); 562 + /* 563 + * Check to see the state of the memory 564 + */ 565 + pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd); 566 + printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n" 567 + "pmc551: DRAM_BLK0 Size: %d at %d\n" 568 + "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n", 569 + (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO", 570 + (((0x1 << 0) & dcmd) == 0) ? "Off" : "On", 571 + PMC551_DRAM_BLK_GET_SIZE(dcmd), 572 + ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7), 573 + ((dcmd >> 9) & 0xF)); 577 574 578 - pci_read_config_dword( dev, PMC551_DRAM_BLK1, &dcmd ); 579 - printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n" 580 - "pmc551: DRAM_BLK1 Size: %d at %d\n" 581 - "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n", 582 - (((0x1<<1)&dcmd) == 0)?"RW":"RO", 583 - (((0x1<<0)&dcmd) == 0)?"Off":"On", 584 - PMC551_DRAM_BLK_GET_SIZE(dcmd), 585 - ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) ); 575 + pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd); 576 + printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n" 577 + "pmc551: DRAM_BLK1 Size: %d at %d\n" 578 + "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n", 579 + (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO", 580 + (((0x1 << 0) & dcmd) == 0) ? "Off" : "On", 581 + PMC551_DRAM_BLK_GET_SIZE(dcmd), 582 + ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7), 583 + ((dcmd >> 9) & 0xF)); 586 584 587 - pci_read_config_dword( dev, PMC551_DRAM_BLK2, &dcmd ); 588 - printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n" 589 - "pmc551: DRAM_BLK2 Size: %d at %d\n" 590 - "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n", 591 - (((0x1<<1)&dcmd) == 0)?"RW":"RO", 592 - (((0x1<<0)&dcmd) == 0)?"Off":"On", 593 - PMC551_DRAM_BLK_GET_SIZE(dcmd), 594 - ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) ); 585 + pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd); 586 + printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n" 587 + "pmc551: DRAM_BLK2 Size: %d at %d\n" 588 + "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n", 589 + (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO", 590 + (((0x1 << 0) & dcmd) == 0) ? "Off" : "On", 591 + PMC551_DRAM_BLK_GET_SIZE(dcmd), 592 + ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7), 593 + ((dcmd >> 9) & 0xF)); 595 594 596 - pci_read_config_dword( dev, PMC551_DRAM_BLK3, &dcmd ); 597 - printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n" 598 - "pmc551: DRAM_BLK3 Size: %d at %d\n" 599 - "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n", 600 - (((0x1<<1)&dcmd) == 0)?"RW":"RO", 601 - (((0x1<<0)&dcmd) == 0)?"Off":"On", 602 - PMC551_DRAM_BLK_GET_SIZE(dcmd), 603 - ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) ); 595 + pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd); 596 + printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n" 597 + "pmc551: DRAM_BLK3 Size: %d at %d\n" 598 + "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n", 599 + (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO", 600 + (((0x1 << 0) & dcmd) == 0) ? "Off" : "On", 601 + PMC551_DRAM_BLK_GET_SIZE(dcmd), 602 + ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7), 603 + ((dcmd >> 9) & 0xF)); 604 604 605 - pci_read_config_word( dev, PCI_COMMAND, &cmd ); 606 - printk( KERN_DEBUG "pmc551: Memory Access %s\n", 607 - (((0x1<<1)&cmd) == 0)?"off":"on" ); 608 - printk( KERN_DEBUG "pmc551: I/O Access %s\n", 609 - (((0x1<<0)&cmd) == 0)?"off":"on" ); 605 + pci_read_config_word(dev, PCI_COMMAND, &cmd); 606 + printk(KERN_DEBUG "pmc551: Memory Access %s\n", 607 + (((0x1 << 1) & cmd) == 0) ? "off" : "on"); 608 + printk(KERN_DEBUG "pmc551: I/O Access %s\n", 609 + (((0x1 << 0) & cmd) == 0) ? "off" : "on"); 610 610 611 - pci_read_config_word( dev, PCI_STATUS, &cmd ); 612 - printk( KERN_DEBUG "pmc551: Devsel %s\n", 613 - ((PCI_STATUS_DEVSEL_MASK&cmd)==0x000)?"Fast": 614 - ((PCI_STATUS_DEVSEL_MASK&cmd)==0x200)?"Medium": 615 - ((PCI_STATUS_DEVSEL_MASK&cmd)==0x400)?"Slow":"Invalid" ); 611 + pci_read_config_word(dev, PCI_STATUS, &cmd); 612 + printk(KERN_DEBUG "pmc551: Devsel %s\n", 613 + ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" : 614 + ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" : 615 + ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid"); 616 616 617 - printk( KERN_DEBUG "pmc551: %sFast Back-to-Back\n", 618 - ((PCI_COMMAND_FAST_BACK&cmd) == 0)?"Not ":"" ); 617 + printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n", 618 + ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : ""); 619 619 620 - pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd ); 621 - printk( KERN_DEBUG "pmc551: EEPROM is under %s control\n" 622 - "pmc551: System Control Register is %slocked to PCI access\n" 623 - "pmc551: System Control Register is %slocked to EEPROM access\n", 624 - (bcmd&0x1)?"software":"hardware", 625 - (bcmd&0x20)?"":"un", (bcmd&0x40)?"":"un"); 620 + pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd); 621 + printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n" 622 + "pmc551: System Control Register is %slocked to PCI access\n" 623 + "pmc551: System Control Register is %slocked to EEPROM access\n", 624 + (bcmd & 0x1) ? "software" : "hardware", 625 + (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un"); 626 626 #endif 627 - return size; 627 + return size; 628 628 } 629 629 630 630 /* 631 631 * Kernel version specific module stuffages 632 632 */ 633 - 634 633 635 634 MODULE_LICENSE("GPL"); 636 635 MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>"); ··· 649 628 /* 650 629 * Stuff these outside the ifdef so as to not bust compiled in driver support 651 630 */ 652 - static int msize=0; 631 + static int msize = 0; 653 632 #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE) 654 - static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE 633 + static int asize = CONFIG_MTD_PMC551_APERTURE_SIZE 655 634 #else 656 - static int asize=0; 635 + static int asize = 0; 657 636 #endif 658 637 659 638 module_param(msize, int, 0); ··· 666 645 */ 667 646 static int __init init_pmc551(void) 668 647 { 669 - struct pci_dev *PCI_Device = NULL; 670 - struct mypriv *priv; 671 - int count, found=0; 672 - struct mtd_info *mtd; 673 - u32 length = 0; 648 + struct pci_dev *PCI_Device = NULL; 649 + struct mypriv *priv; 650 + int count, found = 0; 651 + struct mtd_info *mtd; 652 + u32 length = 0; 674 653 675 - if(msize) { 676 - msize = (1 << (ffs(msize) - 1))<<20; 677 - if (msize > (1<<30)) { 678 - printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", msize); 654 + if (msize) { 655 + msize = (1 << (ffs(msize) - 1)) << 20; 656 + if (msize > (1 << 30)) { 657 + printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", 658 + msize); 679 659 return -EINVAL; 680 660 } 681 661 } 682 662 683 - if(asize) { 684 - asize = (1 << (ffs(asize) - 1))<<20; 685 - if (asize > (1<<30) ) { 686 - printk(KERN_NOTICE "pmc551: Invalid aperture size [%d]\n", asize); 663 + if (asize) { 664 + asize = (1 << (ffs(asize) - 1)) << 20; 665 + if (asize > (1 << 30)) { 666 + printk(KERN_NOTICE "pmc551: Invalid aperture size " 667 + "[%d]\n", asize); 687 668 return -EINVAL; 688 669 } 689 670 } 690 671 691 - printk(KERN_INFO PMC551_VERSION); 672 + printk(KERN_INFO PMC551_VERSION); 692 673 693 - /* 694 - * PCU-bus chipset probe. 695 - */ 696 - for( count = 0; count < MAX_MTD_DEVICES; count++ ) { 674 + /* 675 + * PCU-bus chipset probe. 676 + */ 677 + for (count = 0; count < MAX_MTD_DEVICES; count++) { 697 678 698 - if ((PCI_Device = pci_find_device(PCI_VENDOR_ID_V3_SEMI, 699 - PCI_DEVICE_ID_V3_SEMI_V370PDC, 700 - PCI_Device ) ) == NULL) { 701 - break; 702 - } 679 + if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI, 680 + PCI_DEVICE_ID_V3_SEMI_V370PDC, 681 + PCI_Device)) == NULL) { 682 + break; 683 + } 703 684 704 - printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n", 705 - (unsigned long long)PCI_Device->resource[0].start); 685 + printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n", 686 + (unsigned long long)pci_resource_start(PCI_Device, 0)); 706 687 707 - /* 708 - * The PMC551 device acts VERY weird if you don't init it 709 - * first. i.e. it will not correctly report devsel. If for 710 - * some reason the sdram is in a wrote-protected state the 711 - * device will DEVSEL when it is written to causing problems 712 - * with the oldproc.c driver in 713 - * some kernels (2.2.*) 714 - */ 715 - if((length = fixup_pmc551(PCI_Device)) <= 0) { 716 - printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n"); 717 - break; 718 - } 688 + /* 689 + * The PMC551 device acts VERY weird if you don't init it 690 + * first. i.e. it will not correctly report devsel. If for 691 + * some reason the sdram is in a wrote-protected state the 692 + * device will DEVSEL when it is written to causing problems 693 + * with the oldproc.c driver in 694 + * some kernels (2.2.*) 695 + */ 696 + if ((length = fixup_pmc551(PCI_Device)) <= 0) { 697 + printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n"); 698 + break; 699 + } 719 700 720 701 /* 721 702 * This is needed until the driver is capable of reading the 722 703 * onboard I2C SROM to discover the "real" memory size. 723 704 */ 724 - if(msize) { 705 + if (msize) { 725 706 length = msize; 726 - printk(KERN_NOTICE "pmc551: Using specified memory size 0x%x\n", length); 707 + printk(KERN_NOTICE "pmc551: Using specified memory " 708 + "size 0x%x\n", length); 727 709 } else { 728 710 msize = length; 729 711 } 730 712 731 - mtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL); 732 - if (!mtd) { 733 - printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n"); 734 - break; 735 - } 736 - 737 - memset(mtd, 0, sizeof(struct mtd_info)); 738 - 739 - priv = kmalloc (sizeof(struct mypriv), GFP_KERNEL); 740 - if (!priv) { 741 - printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n"); 742 - kfree(mtd); 743 - break; 744 - } 745 - memset(priv, 0, sizeof(*priv)); 746 - mtd->priv = priv; 747 - priv->dev = PCI_Device; 748 - 749 - if(asize > length) { 750 - printk(KERN_NOTICE "pmc551: reducing aperture size to fit %dM\n",length>>20); 751 - priv->asize = asize = length; 752 - } else if (asize == 0 || asize == length) { 753 - printk(KERN_NOTICE "pmc551: Using existing aperture size %dM\n", length>>20); 754 - priv->asize = asize = length; 755 - } else { 756 - printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20); 757 - priv->asize = asize; 758 - } 759 - priv->start = ioremap(((PCI_Device->resource[0].start) 760 - & PCI_BASE_ADDRESS_MEM_MASK), 761 - priv->asize); 762 - 763 - if (!priv->start) { 764 - printk(KERN_NOTICE "pmc551: Unable to map IO space\n"); 765 - kfree(mtd->priv); 766 - kfree(mtd); 713 + mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL); 714 + if (!mtd) { 715 + printk(KERN_NOTICE "pmc551: Cannot allocate new MTD " 716 + "device.\n"); 767 717 break; 768 718 } 769 719 720 + priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL); 721 + if (!priv) { 722 + printk(KERN_NOTICE "pmc551: Cannot allocate new MTD " 723 + "device.\n"); 724 + kfree(mtd); 725 + break; 726 + } 727 + mtd->priv = priv; 728 + priv->dev = PCI_Device; 729 + 730 + if (asize > length) { 731 + printk(KERN_NOTICE "pmc551: reducing aperture size to " 732 + "fit %dM\n", length >> 20); 733 + priv->asize = asize = length; 734 + } else if (asize == 0 || asize == length) { 735 + printk(KERN_NOTICE "pmc551: Using existing aperture " 736 + "size %dM\n", length >> 20); 737 + priv->asize = asize = length; 738 + } else { 739 + printk(KERN_NOTICE "pmc551: Using specified aperture " 740 + "size %dM\n", asize >> 20); 741 + priv->asize = asize; 742 + } 743 + priv->start = pci_iomap(PCI_Device, 0, priv->asize); 744 + 745 + if (!priv->start) { 746 + printk(KERN_NOTICE "pmc551: Unable to map IO space\n"); 747 + kfree(mtd->priv); 748 + kfree(mtd); 749 + break; 750 + } 770 751 #ifdef CONFIG_MTD_PMC551_DEBUG 771 - printk( KERN_DEBUG "pmc551: setting aperture to %d\n", 772 - ffs(priv->asize>>20)-1); 752 + printk(KERN_DEBUG "pmc551: setting aperture to %d\n", 753 + ffs(priv->asize >> 20) - 1); 773 754 #endif 774 755 775 - priv->base_map0 = ( PMC551_PCI_MEM_MAP_REG_EN 776 - | PMC551_PCI_MEM_MAP_ENABLE 777 - | (ffs(priv->asize>>20)-1)<<4 ); 778 - priv->curr_map0 = priv->base_map0; 779 - pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0, 780 - priv->curr_map0 ); 756 + priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN 757 + | PMC551_PCI_MEM_MAP_ENABLE 758 + | (ffs(priv->asize >> 20) - 1) << 4); 759 + priv->curr_map0 = priv->base_map0; 760 + pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0, 761 + priv->curr_map0); 781 762 782 763 #ifdef CONFIG_MTD_PMC551_DEBUG 783 - printk( KERN_DEBUG "pmc551: aperture set to %d\n", 784 - (priv->base_map0 & 0xF0)>>4 ); 764 + printk(KERN_DEBUG "pmc551: aperture set to %d\n", 765 + (priv->base_map0 & 0xF0) >> 4); 785 766 #endif 786 767 787 - mtd->size = msize; 788 - mtd->flags = MTD_CAP_RAM; 789 - mtd->erase = pmc551_erase; 790 - mtd->read = pmc551_read; 791 - mtd->write = pmc551_write; 792 - mtd->point = pmc551_point; 793 - mtd->unpoint = pmc551_unpoint; 794 - mtd->type = MTD_RAM; 795 - mtd->name = "PMC551 RAM board"; 796 - mtd->erasesize = 0x10000; 797 - mtd->writesize = 1; 798 - mtd->owner = THIS_MODULE; 768 + mtd->size = msize; 769 + mtd->flags = MTD_CAP_RAM; 770 + mtd->erase = pmc551_erase; 771 + mtd->read = pmc551_read; 772 + mtd->write = pmc551_write; 773 + mtd->point = pmc551_point; 774 + mtd->unpoint = pmc551_unpoint; 775 + mtd->type = MTD_RAM; 776 + mtd->name = "PMC551 RAM board"; 777 + mtd->erasesize = 0x10000; 778 + mtd->writesize = 1; 779 + mtd->owner = THIS_MODULE; 799 780 800 - if (add_mtd_device(mtd)) { 801 - printk(KERN_NOTICE "pmc551: Failed to register new device\n"); 802 - iounmap(priv->start); 803 - kfree(mtd->priv); 804 - kfree(mtd); 805 - break; 806 - } 807 - printk(KERN_NOTICE "Registered pmc551 memory device.\n"); 808 - printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n", 809 - priv->asize>>20, 810 - priv->start, 811 - priv->start + priv->asize); 812 - printk(KERN_NOTICE "Total memory is %d%c\n", 813 - (length<1024)?length: 814 - (length<1048576)?length>>10:length>>20, 815 - (length<1024)?'B':(length<1048576)?'K':'M'); 781 + if (add_mtd_device(mtd)) { 782 + printk(KERN_NOTICE "pmc551: Failed to register new " 783 + "device\n"); 784 + pci_iounmap(PCI_Device, priv->start); 785 + kfree(mtd->priv); 786 + kfree(mtd); 787 + break; 788 + } 789 + 790 + /* Keep a reference as the add_mtd_device worked */ 791 + pci_dev_get(PCI_Device); 792 + 793 + printk(KERN_NOTICE "Registered pmc551 memory device.\n"); 794 + printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n", 795 + priv->asize >> 20, 796 + priv->start, priv->start + priv->asize); 797 + printk(KERN_NOTICE "Total memory is %d%c\n", 798 + (length < 1024) ? length : 799 + (length < 1048576) ? length >> 10 : length >> 20, 800 + (length < 1024) ? 'B' : (length < 1048576) ? 'K' : 'M'); 816 801 priv->nextpmc551 = pmc551list; 817 802 pmc551list = mtd; 818 803 found++; 819 - } 804 + } 820 805 821 - if( !pmc551list ) { 822 - printk(KERN_NOTICE "pmc551: not detected\n"); 823 - return -ENODEV; 824 - } else { 806 + /* Exited early, reference left over */ 807 + if (PCI_Device) 808 + pci_dev_put(PCI_Device); 809 + 810 + if (!pmc551list) { 811 + printk(KERN_NOTICE "pmc551: not detected\n"); 812 + return -ENODEV; 813 + } else { 825 814 printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found); 826 - return 0; 815 + return 0; 827 816 } 828 817 } 829 818 ··· 842 811 */ 843 812 static void __exit cleanup_pmc551(void) 844 813 { 845 - int found=0; 846 - struct mtd_info *mtd; 814 + int found = 0; 815 + struct mtd_info *mtd; 847 816 struct mypriv *priv; 848 817 849 - while((mtd=pmc551list)) { 818 + while ((mtd = pmc551list)) { 850 819 priv = mtd->priv; 851 820 pmc551list = priv->nextpmc551; 852 821 853 - if(priv->start) { 854 - printk (KERN_DEBUG "pmc551: unmapping %dM starting at 0x%p\n", 855 - priv->asize>>20, priv->start); 856 - iounmap (priv->start); 822 + if (priv->start) { 823 + printk(KERN_DEBUG "pmc551: unmapping %dM starting at " 824 + "0x%p\n", priv->asize >> 20, priv->start); 825 + pci_iounmap(priv->dev, priv->start); 857 826 } 827 + pci_dev_put(priv->dev); 858 828 859 - kfree (mtd->priv); 860 - del_mtd_device (mtd); 861 - kfree (mtd); 829 + kfree(mtd->priv); 830 + del_mtd_device(mtd); 831 + kfree(mtd); 862 832 found++; 863 833 } 864 834
-8
drivers/mtd/maps/Kconfig
··· 447 447 21285 bridge used with Intel's StrongARM processors. More info at 448 448 <http://www.intel.com/design/bridge/docs/21285_documentation.htm>. 449 449 450 - config MTD_IQ80310 451 - tristate "CFI Flash device mapped on the XScale IQ80310 board" 452 - depends on MTD_CFI && ARCH_IQ80310 453 - help 454 - This enables access routines for the flash chips on the Intel XScale 455 - IQ80310 evaluation board. If you have one of these boards and would 456 - like to use the flash chips on it, say 'Y'. 457 - 458 450 config MTD_IXP4XX 459 451 tristate "CFI Flash device mapped on Intel IXP4xx based systems" 460 452 depends on MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP4XX
-1
drivers/mtd/maps/Makefile
··· 15 15 obj-$(CONFIG_MTD_CSTM_MIPS_IXX) += cstm_mips_ixx.o 16 16 obj-$(CONFIG_MTD_DC21285) += dc21285.o 17 17 obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o 18 - obj-$(CONFIG_MTD_IQ80310) += iq80310.o 19 18 obj-$(CONFIG_MTD_L440GX) += l440gx.o 20 19 obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o 21 20 obj-$(CONFIG_MTD_ICHXROM) += ichxrom.o
+3 -2
drivers/mtd/maps/amd76xrom.c
··· 57 57 /* Disable writes through the rom window */ 58 58 pci_read_config_byte(window->pdev, 0x40, &byte); 59 59 pci_write_config_byte(window->pdev, 0x40, byte & ~1); 60 + pci_dev_put(window->pdev); 60 61 } 61 62 62 63 /* Free all of the mtd devices */ ··· 92 91 struct amd76xrom_map_info *map = NULL; 93 92 unsigned long map_top; 94 93 95 - /* Remember the pci dev I find the window in */ 94 + /* Remember the pci dev I find the window in - already have a ref */ 96 95 window->pdev = pdev; 97 96 98 97 /* Assume the rom window is properly setup, and find it's size */ ··· 303 302 struct pci_device_id *id; 304 303 pdev = NULL; 305 304 for(id = amd76xrom_pci_tbl; id->vendor; id++) { 306 - pdev = pci_find_device(id->vendor, id->device, NULL); 305 + pdev = pci_get_device(id->vendor, id->device, NULL); 307 306 if (pdev) { 308 307 break; 309 308 }
+12 -2
drivers/mtd/maps/arctic-mtd.c
··· 96 96 static int __init 97 97 init_arctic_mtd(void) 98 98 { 99 + int err = 0; 100 + 99 101 printk("%s: 0x%08x at 0x%08x\n", NAME, SIZE, PADDR); 100 102 101 103 arctic_mtd_map.virt = ioremap(PADDR, SIZE); ··· 111 109 printk("%s: probing %d-bit flash bus\n", NAME, BUSWIDTH * 8); 112 110 arctic_mtd = do_map_probe("cfi_probe", &arctic_mtd_map); 113 111 114 - if (!arctic_mtd) 112 + if (!arctic_mtd) { 113 + iounmap((void *) arctic_mtd_map.virt); 115 114 return -ENXIO; 115 + } 116 116 117 117 arctic_mtd->owner = THIS_MODULE; 118 118 119 - return add_mtd_partitions(arctic_mtd, arctic_partitions, PARTITIONS); 119 + err = add_mtd_partitions(arctic_mtd, arctic_partitions, PARTITIONS); 120 + if (err) { 121 + printk("%s: add_mtd_partitions failed\n", NAME); 122 + iounmap((void *) arctic_mtd_map.virt); 123 + } 124 + 125 + return err; 120 126 } 121 127 122 128 static void __exit
+12 -2
drivers/mtd/maps/beech-mtd.c
··· 72 72 static int __init 73 73 init_beech_mtd(void) 74 74 { 75 + int err = 0; 76 + 75 77 printk("%s: 0x%08x at 0x%08x\n", NAME, SIZE, PADDR); 76 78 77 79 beech_mtd_map.virt = ioremap(PADDR, SIZE); ··· 88 86 printk("%s: probing %d-bit flash bus\n", NAME, BUSWIDTH * 8); 89 87 beech_mtd = do_map_probe("cfi_probe", &beech_mtd_map); 90 88 91 - if (!beech_mtd) 89 + if (!beech_mtd) { 90 + iounmap((void *) beech_mtd_map.virt); 92 91 return -ENXIO; 92 + } 93 93 94 94 beech_mtd->owner = THIS_MODULE; 95 95 96 - return add_mtd_partitions(beech_mtd, beech_partitions, 2); 96 + err = add_mtd_partitions(beech_mtd, beech_partitions, 2); 97 + if (err) { 98 + printk("%s: add_mtd_partitions failed\n", NAME); 99 + iounmap((void *) beech_mtd_map.virt); 100 + } 101 + 102 + return err; 97 103 } 98 104 99 105 static void __exit
+16 -2
drivers/mtd/maps/cstm_mips_ixx.c
··· 171 171 cstm_mips_ixx_map[i].phys = cstm_mips_ixx_board_desc[i].window_addr; 172 172 cstm_mips_ixx_map[i].virt = ioremap(cstm_mips_ixx_board_desc[i].window_addr, cstm_mips_ixx_board_desc[i].window_size); 173 173 if (!cstm_mips_ixx_map[i].virt) { 174 + int j = 0; 174 175 printk(KERN_WARNING "Failed to ioremap\n"); 176 + for (j = 0; j < i; j++) { 177 + if (cstm_mips_ixx_map[j].virt) { 178 + iounmap((void *)cstm_mips_ixx_map[j].virt); 179 + cstm_mips_ixx_map[j].virt = 0; 180 + } 181 + } 175 182 return -EIO; 176 183 } 177 184 cstm_mips_ixx_map[i].name = cstm_mips_ixx_board_desc[i].name; ··· 211 204 cstm_mips_ixx_map[i].map_priv_2 = (unsigned long)mymtd; 212 205 add_mtd_partitions(mymtd, parts, cstm_mips_ixx_board_desc[i].num_partitions); 213 206 } 214 - else 215 - return -ENXIO; 207 + else { 208 + for (i = 0; i < PHYSMAP_NUMBER; i++) { 209 + if (cstm_mips_ixx_map[i].virt) { 210 + iounmap((void *)cstm_mips_ixx_map[i].virt); 211 + cstm_mips_ixx_map[i].virt = 0; 212 + } 213 + } 214 + return -ENXIO; 215 + } 216 216 } 217 217 return 0; 218 218 }
+4
drivers/mtd/maps/ebony.c
··· 108 108 ARRAY_SIZE(ebony_small_partitions)); 109 109 } else { 110 110 printk("map probe failed for flash\n"); 111 + iounmap(ebony_small_map.virt); 111 112 return -ENXIO; 112 113 } 113 114 ··· 118 117 119 118 if (!ebony_large_map.virt) { 120 119 printk("Failed to ioremap flash\n"); 120 + iounmap(ebony_small_map.virt); 121 121 return -EIO; 122 122 } 123 123 ··· 131 129 ARRAY_SIZE(ebony_large_partitions)); 132 130 } else { 133 131 printk("map probe failed for flash\n"); 132 + iounmap(ebony_small_map.virt); 133 + iounmap(ebony_large_map.virt); 134 134 return -ENXIO; 135 135 } 136 136
+3
drivers/mtd/maps/fortunet.c
··· 218 218 map_regions[ix].map_info.size); 219 219 if(!map_regions[ix].map_info.virt) 220 220 { 221 + int j = 0; 221 222 printk(MTD_FORTUNET_PK "%s flash failed to ioremap!\n", 222 223 map_regions[ix].map_info.name); 224 + for (j = 0 ; j < ix; j++) 225 + iounmap(map_regions[j].map_info.virt); 223 226 return -ENXIO; 224 227 } 225 228 simple_map_init(&map_regions[ix].map_info);
+2 -1
drivers/mtd/maps/ichxrom.c
··· 61 61 /* Disable writes through the rom window */ 62 62 pci_read_config_word(window->pdev, BIOS_CNTL, &word); 63 63 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); 64 + pci_dev_put(window->pdev); 64 65 65 66 /* Free all of the mtd devices */ 66 67 list_for_each_entry_safe(map, scratch, &window->maps, list) { ··· 356 355 357 356 pdev = NULL; 358 357 for (id = ichxrom_pci_tbl; id->vendor; id++) { 359 - pdev = pci_find_device(id->vendor, id->device, NULL); 358 + pdev = pci_get_device(id->vendor, id->device, NULL); 360 359 if (pdev) { 361 360 break; 362 361 }
-118
drivers/mtd/maps/iq80310.c
··· 1 - /* 2 - * $Id: iq80310.c,v 1.21 2005/11/07 11:14:27 gleixner Exp $ 3 - * 4 - * Mapping for the Intel XScale IQ80310 evaluation board 5 - * 6 - * Author: Nicolas Pitre 7 - * Copyright: (C) 2001 MontaVista Software Inc. 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License version 2 as 11 - * published by the Free Software Foundation. 12 - */ 13 - 14 - #include <linux/module.h> 15 - #include <linux/types.h> 16 - #include <linux/kernel.h> 17 - #include <linux/init.h> 18 - #include <linux/slab.h> 19 - #include <asm/io.h> 20 - #include <linux/mtd/mtd.h> 21 - #include <linux/mtd/map.h> 22 - #include <linux/mtd/partitions.h> 23 - 24 - 25 - #define WINDOW_ADDR 0 26 - #define WINDOW_SIZE 8*1024*1024 27 - #define BUSWIDTH 1 28 - 29 - static struct mtd_info *mymtd; 30 - 31 - static struct map_info iq80310_map = { 32 - .name = "IQ80310 flash", 33 - .size = WINDOW_SIZE, 34 - .bankwidth = BUSWIDTH, 35 - .phys = WINDOW_ADDR 36 - }; 37 - 38 - static struct mtd_partition iq80310_partitions[4] = { 39 - { 40 - .name = "Firmware", 41 - .size = 0x00080000, 42 - .offset = 0, 43 - .mask_flags = MTD_WRITEABLE /* force read-only */ 44 - },{ 45 - .name = "Kernel", 46 - .size = 0x000a0000, 47 - .offset = 0x00080000, 48 - },{ 49 - .name = "Filesystem", 50 - .size = 0x00600000, 51 - .offset = 0x00120000 52 - },{ 53 - .name = "RedBoot", 54 - .size = 0x000e0000, 55 - .offset = 0x00720000, 56 - .mask_flags = MTD_WRITEABLE 57 - } 58 - }; 59 - 60 - static struct mtd_info *mymtd; 61 - static struct mtd_partition *parsed_parts; 62 - static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; 63 - 64 - static int __init init_iq80310(void) 65 - { 66 - struct mtd_partition *parts; 67 - int nb_parts = 0; 68 - int parsed_nr_parts = 0; 69 - int ret; 70 - 71 - iq80310_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE); 72 - if (!iq80310_map.virt) { 73 - printk("Failed to ioremap\n"); 74 - return -EIO; 75 - } 76 - simple_map_init(&iq80310_map); 77 - 78 - mymtd = do_map_probe("cfi_probe", &iq80310_map); 79 - if (!mymtd) { 80 - iounmap((void *)iq80310_map.virt); 81 - return -ENXIO; 82 - } 83 - mymtd->owner = THIS_MODULE; 84 - 85 - ret = parse_mtd_partitions(mymtd, probes, &parsed_parts, 0); 86 - 87 - if (ret > 0) 88 - parsed_nr_parts = ret; 89 - 90 - if (parsed_nr_parts > 0) { 91 - parts = parsed_parts; 92 - nb_parts = parsed_nr_parts; 93 - } else { 94 - parts = iq80310_partitions; 95 - nb_parts = ARRAY_SIZE(iq80310_partitions); 96 - } 97 - add_mtd_partitions(mymtd, parts, nb_parts); 98 - return 0; 99 - } 100 - 101 - static void __exit cleanup_iq80310(void) 102 - { 103 - if (mymtd) { 104 - del_mtd_partitions(mymtd); 105 - map_destroy(mymtd); 106 - kfree(parsed_parts); 107 - } 108 - if (iq80310_map.virt) 109 - iounmap((void *)iq80310_map.virt); 110 - } 111 - 112 - module_init(init_iq80310); 113 - module_exit(cleanup_iq80310); 114 - 115 - 116 - MODULE_LICENSE("GPL"); 117 - MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>"); 118 - MODULE_DESCRIPTION("MTD map driver for Intel XScale IQ80310 evaluation board");
+1 -1
drivers/mtd/maps/ixp4xx.c
··· 253 253 /* Use the fast version */ 254 254 info->map.write = ixp4xx_write16, 255 255 256 - err = parse_mtd_partitions(info->mtd, probes, &info->partitions, 0); 256 + err = parse_mtd_partitions(info->mtd, probes, &info->partitions, dev->resource->start); 257 257 if (err > 0) { 258 258 err = add_mtd_partitions(info->mtd, info->partitions, err); 259 259 if(err)
+10 -2
drivers/mtd/maps/l440gx.c
··· 61 61 struct resource *pm_iobase; 62 62 __u16 word; 63 63 64 - dev = pci_find_device(PCI_VENDOR_ID_INTEL, 64 + dev = pci_get_device(PCI_VENDOR_ID_INTEL, 65 65 PCI_DEVICE_ID_INTEL_82371AB_0, NULL); 66 66 67 - pm_dev = pci_find_device(PCI_VENDOR_ID_INTEL, 67 + pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL, 68 68 PCI_DEVICE_ID_INTEL_82371AB_3, NULL); 69 + 70 + pci_dev_put(dev); 69 71 70 72 if (!dev || !pm_dev) { 71 73 printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n"); 74 + pci_dev_put(pm_dev); 72 75 return -ENODEV; 73 76 } 74 77 ··· 79 76 80 77 if (!l440gx_map.virt) { 81 78 printk(KERN_WARNING "Failed to ioremap L440GX flash region\n"); 79 + pci_dev_put(pm_dev); 82 80 return -ENOMEM; 83 81 } 84 82 simple_map_init(&l440gx_map); ··· 103 99 pm_iobase->start += iobase & ~1; 104 100 pm_iobase->end += iobase & ~1; 105 101 102 + pci_dev_put(pm_dev); 103 + 106 104 /* Allocate the resource region */ 107 105 if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) { 106 + pci_dev_put(dev); 107 + pci_dev_put(pm_dev); 108 108 printk(KERN_WARNING "Could not allocate pm iobase resource\n"); 109 109 iounmap(l440gx_map.virt); 110 110 return -ENXIO;
+2
drivers/mtd/maps/lasat.c
··· 79 79 return 0; 80 80 } 81 81 82 + iounmap(lasat_map.virt); 82 83 return -ENXIO; 83 84 } 84 85 ··· 90 89 map_destroy(lasat_mtd); 91 90 } 92 91 if (lasat_map.virt) { 92 + iounmap(lasat_map.virt); 93 93 lasat_map.virt = 0; 94 94 } 95 95 }
+27 -7
drivers/mtd/maps/nettel.c
··· 277 277 nettel_amd_map.virt = ioremap_nocache(amdaddr, maxsize); 278 278 if (!nettel_amd_map.virt) { 279 279 printk("SNAPGEAR: failed to ioremap() BOOTCS\n"); 280 + iounmap(nettel_mmcrp); 280 281 return(-EIO); 281 282 } 282 283 simple_map_init(&nettel_amd_map); ··· 338 337 nettel_amd_map.virt = NULL; 339 338 #else 340 339 /* Only AMD flash supported */ 341 - return(-ENXIO); 340 + rc = -ENXIO; 341 + goto out_unmap2; 342 342 #endif 343 343 } 344 344 ··· 363 361 nettel_intel_map.virt = ioremap_nocache(intel0addr, maxsize); 364 362 if (!nettel_intel_map.virt) { 365 363 printk("SNAPGEAR: failed to ioremap() ROMCS1\n"); 366 - return(-EIO); 364 + rc = -EIO; 365 + goto out_unmap2; 367 366 } 368 367 simple_map_init(&nettel_intel_map); 369 368 370 369 intel_mtd = do_map_probe("cfi_probe", &nettel_intel_map); 371 370 if (!intel_mtd) { 372 - iounmap(nettel_intel_map.virt); 373 - return(-ENXIO); 371 + rc = -ENXIO; 372 + goto out_unmap1; 374 373 } 375 374 376 375 /* Set PAR to the detected size */ ··· 397 394 nettel_intel_map.virt = ioremap_nocache(intel0addr, maxsize); 398 395 if (!nettel_intel_map.virt) { 399 396 printk("SNAPGEAR: failed to ioremap() ROMCS1/2\n"); 400 - return(-EIO); 397 + rc = -EIO; 398 + goto out_unmap2; 401 399 } 402 400 403 401 intel_mtd = do_map_probe("cfi_probe", &nettel_intel_map); 404 402 if (! intel_mtd) { 405 - iounmap((void *) nettel_intel_map.virt); 406 - return(-ENXIO); 403 + rc = -ENXIO; 404 + goto out_unmap1; 407 405 } 408 406 409 407 intel1size = intel_mtd->size - intel0size; ··· 460 456 #endif 461 457 462 458 return(rc); 459 + 460 + #ifdef CONFIG_MTD_CFI_INTELEXT 461 + out_unmap1: 462 + iounmap((void *) nettel_intel_map.virt); 463 + #endif 464 + 465 + out_unmap2: 466 + iounmap(nettel_mmcrp); 467 + iounmap(nettel_amd_map.virt); 468 + 469 + return(rc); 470 + 463 471 } 464 472 465 473 /****************************************************************************/ ··· 484 468 if (amd_mtd) { 485 469 del_mtd_partitions(amd_mtd); 486 470 map_destroy(amd_mtd); 471 + } 472 + if (nettel_mmcrp) { 473 + iounmap(nettel_mmcrp); 474 + nettel_mmcrp = NULL; 487 475 } 488 476 if (nettel_amd_map.virt) { 489 477 iounmap(nettel_amd_map.virt);
+4
drivers/mtd/maps/ocotea.c
··· 97 97 ARRAY_SIZE(ocotea_small_partitions)); 98 98 } else { 99 99 printk("map probe failed for flash\n"); 100 + iounmap(ocotea_small_map.virt); 100 101 return -ENXIO; 101 102 } 102 103 ··· 107 106 108 107 if (!ocotea_large_map.virt) { 109 108 printk("Failed to ioremap flash\n"); 109 + iounmap(ocotea_small_map.virt); 110 110 return -EIO; 111 111 } 112 112 ··· 120 118 ARRAY_SIZE(ocotea_large_partitions)); 121 119 } else { 122 120 printk("map probe failed for flash\n"); 121 + iounmap(ocotea_small_map.virt); 122 + iounmap(ocotea_large_map.virt); 123 123 return -ENXIO; 124 124 } 125 125
+4
drivers/mtd/maps/pcmciamtd.c
··· 602 602 ret = pcmcia_request_configuration(link, &link->conf); 603 603 if(ret != CS_SUCCESS) { 604 604 cs_error(link, RequestConfiguration, ret); 605 + if (dev->win_base) { 606 + iounmap(dev->win_base); 607 + dev->win_base = NULL; 608 + } 605 609 return -ENODEV; 606 610 } 607 611
+33
drivers/mtd/maps/physmap.c
··· 158 158 return err; 159 159 } 160 160 161 + #ifdef CONFIG_PM 162 + static int physmap_flash_suspend(struct platform_device *dev, pm_message_t state) 163 + { 164 + struct physmap_flash_info *info = platform_get_drvdata(dev); 165 + int ret = 0; 166 + 167 + if (info) 168 + ret = info->mtd->suspend(info->mtd); 169 + 170 + return ret; 171 + } 172 + 173 + static int physmap_flash_resume(struct platform_device *dev) 174 + { 175 + struct physmap_flash_info *info = platform_get_drvdata(dev); 176 + if (info) 177 + info->mtd->resume(info->mtd); 178 + return 0; 179 + } 180 + 181 + static void physmap_flash_shutdown(struct platform_device *dev) 182 + { 183 + struct physmap_flash_info *info = platform_get_drvdata(dev); 184 + if (info && info->mtd->suspend(info->mtd) == 0) 185 + info->mtd->resume(info->mtd); 186 + } 187 + #endif 188 + 161 189 static struct platform_driver physmap_flash_driver = { 162 190 .probe = physmap_flash_probe, 163 191 .remove = physmap_flash_remove, 192 + #ifdef CONFIG_PM 193 + .suspend = physmap_flash_suspend, 194 + .resume = physmap_flash_resume, 195 + .shutdown = physmap_flash_shutdown, 196 + #endif 164 197 .driver = { 165 198 .name = "physmap-flash", 166 199 },
+10 -1
drivers/mtd/maps/redwood.c
··· 126 126 127 127 int __init init_redwood_flash(void) 128 128 { 129 + int err = 0; 130 + 129 131 printk(KERN_NOTICE "redwood: flash mapping: %x at %x\n", 130 132 WINDOW_SIZE, WINDOW_ADDR); 131 133 ··· 143 141 144 142 if (redwood_mtd) { 145 143 redwood_mtd->owner = THIS_MODULE; 146 - return add_mtd_partitions(redwood_mtd, 144 + err = add_mtd_partitions(redwood_mtd, 147 145 redwood_flash_partitions, 148 146 NUM_REDWOOD_FLASH_PARTITIONS); 147 + if (err) { 148 + printk("init_redwood_flash: add_mtd_partitions failed\n"); 149 + iounmap(redwood_flash_map.virt); 150 + } 151 + return err; 152 + 149 153 } 150 154 155 + iounmap(redwood_flash_map.virt); 151 156 return -ENXIO; 152 157 } 153 158
+10 -1
drivers/mtd/maps/sbc8240.c
··· 156 156 }; 157 157 158 158 int devicesfound = 0; 159 - int i; 159 + int i,j; 160 160 161 161 for (i = 0; i < NUM_FLASH_BANKS; i++) { 162 162 printk (KERN_NOTICE MSG_PREFIX ··· 166 166 (unsigned long) ioremap (pt[i].addr, pt[i].size); 167 167 if (!sbc8240_map[i].map_priv_1) { 168 168 printk (MSG_PREFIX "failed to ioremap\n"); 169 + for (j = 0; j < i; j++) { 170 + iounmap((void *) sbc8240_map[j].map_priv_1); 171 + sbc8240_map[j].map_priv_1 = 0; 172 + } 169 173 return -EIO; 170 174 } 171 175 simple_map_init(&sbc8240_mtd[i]); ··· 179 175 if (sbc8240_mtd[i]) { 180 176 sbc8240_mtd[i]->module = THIS_MODULE; 181 177 devicesfound++; 178 + } else { 179 + if (sbc8240_map[i].map_priv_1) { 180 + iounmap((void *) sbc8240_map[i].map_priv_1); 181 + sbc8240_map[i].map_priv_1 = 0; 182 + } 182 183 } 183 184 } 184 185
+7 -2
drivers/mtd/maps/scx200_docflash.c
··· 87 87 88 88 printk(KERN_DEBUG NAME ": NatSemi SCx200 DOCCS Flash Driver\n"); 89 89 90 - if ((bridge = pci_find_device(PCI_VENDOR_ID_NS, 90 + if ((bridge = pci_get_device(PCI_VENDOR_ID_NS, 91 91 PCI_DEVICE_ID_NS_SCx200_BRIDGE, 92 92 NULL)) == NULL) 93 93 return -ENODEV; 94 94 95 95 /* check that we have found the configuration block */ 96 - if (!scx200_cb_present()) 96 + if (!scx200_cb_present()) { 97 + pci_dev_put(bridge); 97 98 return -ENODEV; 99 + } 98 100 99 101 if (probe) { 100 102 /* Try to use the present flash mapping if any */ 101 103 pci_read_config_dword(bridge, SCx200_DOCCS_BASE, &base); 102 104 pci_read_config_dword(bridge, SCx200_DOCCS_CTRL, &ctrl); 105 + pci_dev_put(bridge); 106 + 103 107 pmr = inl(scx200_cb_base + SCx200_PMR); 104 108 105 109 if (base == 0 ··· 131 127 return -ENOMEM; 132 128 } 133 129 } else { 130 + pci_dev_put(bridge); 134 131 for (u = size; u > 1; u >>= 1) 135 132 ; 136 133 if (u != 1) {
+4
drivers/mtd/maps/walnut.c
··· 68 68 69 69 if (WALNUT_FLASH_ONBD_N(fpga_brds1)) { 70 70 printk("The on-board flash is disabled (U79 sw 5)!"); 71 + iounmap(fpga_status_adr); 71 72 return -EIO; 72 73 } 73 74 if (WALNUT_FLASH_SRAM_SEL(fpga_brds1)) ··· 82 81 83 82 if (!walnut_map.virt) { 84 83 printk("Failed to ioremap flash.\n"); 84 + iounmap(fpga_status_adr); 85 85 return -EIO; 86 86 } 87 87 ··· 95 93 ARRAY_SIZE(walnut_partitions)); 96 94 } else { 97 95 printk("map probe failed for flash\n"); 96 + iounmap(fpga_status_adr); 98 97 return -ENXIO; 99 98 } 100 99 100 + iounmap(fpga_status_adr); 101 101 return 0; 102 102 } 103 103
+10
drivers/mtd/mtdcore.c
··· 57 57 mtd->index = i; 58 58 mtd->usecount = 0; 59 59 60 + /* Some chips always power up locked. Unlock them now */ 61 + if ((mtd->flags & MTD_WRITEABLE) 62 + && (mtd->flags & MTD_STUPID_LOCK) && mtd->unlock) { 63 + if (mtd->unlock(mtd, 0, mtd->size)) 64 + printk(KERN_WARNING 65 + "%s: unlock failed, " 66 + "writes may not work\n", 67 + mtd->name); 68 + } 69 + 60 70 DEBUG(0, "mtd: Giving out device %d to %s\n",i, mtd->name); 61 71 /* No need to get a refcount on the module containing 62 72 the notifier, since we hold the mtd_table_mutex */
-11
drivers/mtd/nand/au1550nd.c
··· 21 21 #include <linux/version.h> 22 22 #include <asm/io.h> 23 23 24 - /* fixme: this is ugly */ 25 - #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 0) 26 24 #include <asm/mach-au1x00/au1xxx.h> 27 - #else 28 - #include <asm/au1000.h> 29 - #ifdef CONFIG_MIPS_PB1550 30 - #include <asm/pb1550.h> 31 - #endif 32 - #ifdef CONFIG_MIPS_DB1550 33 - #include <asm/db1x00.h> 34 - #endif 35 - #endif 36 25 37 26 /* 38 27 * MTD structure for NAND controller
+3
drivers/mtd/nand/edb7312.c
··· 198 198 /* Release resources, unregister device */ 199 199 nand_release(ap7312_mtd); 200 200 201 + /* Release io resource */ 202 + iounmap((void *)this->IO_ADDR_R); 203 + 201 204 /* Free the MTD device structure */ 202 205 kfree(ep7312_mtd); 203 206 }
+1 -1
drivers/mtd/nand/ndfc.c
··· 168 168 chip->ecc.mode = NAND_ECC_HW; 169 169 chip->ecc.size = 256; 170 170 chip->ecc.bytes = 3; 171 - chip->ecclayout = mtd->pl_chip->ecclayout; 171 + chip->ecclayout = chip->ecc.layout = mtd->pl_chip->ecclayout; 172 172 mtd->mtd.priv = chip; 173 173 mtd->mtd.owner = THIS_MODULE; 174 174 }
+7
drivers/mtd/nand/ppchameleonevb.c
··· 276 276 /* Scan to find existence of the device (it could not be mounted) */ 277 277 if (nand_scan(ppchameleon_mtd, 1)) { 278 278 iounmap((void *)ppchameleon_fio_base); 279 + ppchameleon_fio_base = NULL; 279 280 kfree(ppchameleon_mtd); 280 281 goto nand_evb_init; 281 282 } ··· 315 314 ppchameleonevb_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); 316 315 if (!ppchameleonevb_mtd) { 317 316 printk("Unable to allocate PPChameleonEVB NAND MTD device structure.\n"); 317 + if (ppchameleon_fio_base) 318 + iounmap(ppchameleon_fio_base); 318 319 return -ENOMEM; 319 320 } 320 321 ··· 325 322 if (!ppchameleonevb_fio_base) { 326 323 printk("ioremap PPChameleonEVB NAND flash failed\n"); 327 324 kfree(ppchameleonevb_mtd); 325 + if (ppchameleon_fio_base) 326 + iounmap(ppchameleon_fio_base); 328 327 return -EIO; 329 328 } 330 329 ··· 383 378 if (nand_scan(ppchameleonevb_mtd, 1)) { 384 379 iounmap((void *)ppchameleonevb_fio_base); 385 380 kfree(ppchameleonevb_mtd); 381 + if (ppchameleon_fio_base) 382 + iounmap(ppchameleon_fio_base); 386 383 return -ENXIO; 387 384 } 388 385 #ifdef CONFIG_MTD_PARTITIONS
+468
drivers/mtd/ssfdc.c
··· 1 + /* 2 + * Linux driver for SSFDC Flash Translation Layer (Read only) 3 + * (c) 2005 Eptar srl 4 + * Author: Claudio Lanconelli <lanconelli.claudio@eptar.com> 5 + * 6 + * Based on NTFL and MTDBLOCK_RO drivers 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License version 2 as 10 + * published by the Free Software Foundation. 11 + */ 12 + 13 + #include <linux/config.h> 14 + #include <linux/kernel.h> 15 + #include <linux/module.h> 16 + #include <linux/init.h> 17 + #include <linux/slab.h> 18 + #include <linux/hdreg.h> 19 + #include <linux/mtd/mtd.h> 20 + #include <linux/mtd/nand.h> 21 + #include <linux/mtd/blktrans.h> 22 + 23 + struct ssfdcr_record { 24 + struct mtd_blktrans_dev mbd; 25 + int usecount; 26 + unsigned char heads; 27 + unsigned char sectors; 28 + unsigned short cylinders; 29 + int cis_block; /* block n. containing CIS/IDI */ 30 + int erase_size; /* phys_block_size */ 31 + unsigned short *logic_block_map; /* all zones (max 8192 phys blocks on 32 + the 128MB) */ 33 + int map_len; /* n. phys_blocks on the card */ 34 + }; 35 + 36 + #define SSFDCR_MAJOR 257 37 + #define SSFDCR_PARTN_BITS 3 38 + 39 + #define SECTOR_SIZE 512 40 + #define SECTOR_SHIFT 9 41 + #define OOB_SIZE 16 42 + 43 + #define MAX_LOGIC_BLK_PER_ZONE 1000 44 + #define MAX_PHYS_BLK_PER_ZONE 1024 45 + 46 + #define KB(x) ( (x) * 1024L ) 47 + #define MB(x) ( KB(x) * 1024L ) 48 + 49 + /** CHS Table 50 + 1MB 2MB 4MB 8MB 16MB 32MB 64MB 128MB 51 + NCylinder 125 125 250 250 500 500 500 500 52 + NHead 4 4 4 4 4 8 8 16 53 + NSector 4 8 8 16 16 16 32 32 54 + SumSector 2,000 4,000 8,000 16,000 32,000 64,000 128,000 256,000 55 + SectorSize 512 512 512 512 512 512 512 512 56 + **/ 57 + 58 + typedef struct { 59 + unsigned long size; 60 + unsigned short cyl; 61 + unsigned char head; 62 + unsigned char sec; 63 + } chs_entry_t; 64 + 65 + /* Must be ordered by size */ 66 + static const chs_entry_t chs_table[] = { 67 + { MB( 1), 125, 4, 4 }, 68 + { MB( 2), 125, 4, 8 }, 69 + { MB( 4), 250, 4, 8 }, 70 + { MB( 8), 250, 4, 16 }, 71 + { MB( 16), 500, 4, 16 }, 72 + { MB( 32), 500, 8, 16 }, 73 + { MB( 64), 500, 8, 32 }, 74 + { MB(128), 500, 16, 32 }, 75 + { 0 }, 76 + }; 77 + 78 + static int get_chs(unsigned long size, unsigned short *cyl, unsigned char *head, 79 + unsigned char *sec) 80 + { 81 + int k; 82 + int found = 0; 83 + 84 + k = 0; 85 + while (chs_table[k].size > 0 && size > chs_table[k].size) 86 + k++; 87 + 88 + if (chs_table[k].size > 0) { 89 + if (cyl) 90 + *cyl = chs_table[k].cyl; 91 + if (head) 92 + *head = chs_table[k].head; 93 + if (sec) 94 + *sec = chs_table[k].sec; 95 + found = 1; 96 + } 97 + 98 + return found; 99 + } 100 + 101 + /* These bytes are the signature for the CIS/IDI sector */ 102 + static const uint8_t cis_numbers[] = { 103 + 0x01, 0x03, 0xD9, 0x01, 0xFF, 0x18, 0x02, 0xDF, 0x01, 0x20 104 + }; 105 + 106 + /* Read and check for a valid CIS sector */ 107 + static int get_valid_cis_sector(struct mtd_info *mtd) 108 + { 109 + int ret, k, cis_sector; 110 + size_t retlen; 111 + loff_t offset; 112 + uint8_t sect_buf[SECTOR_SIZE]; 113 + 114 + /* 115 + * Look for CIS/IDI sector on the first GOOD block (give up after 4 bad 116 + * blocks). If the first good block doesn't contain CIS number the flash 117 + * is not SSFDC formatted 118 + */ 119 + cis_sector = -1; 120 + for (k = 0, offset = 0; k < 4; k++, offset += mtd->erasesize) { 121 + if (!mtd->block_isbad(mtd, offset)) { 122 + ret = mtd->read(mtd, offset, SECTOR_SIZE, &retlen, 123 + sect_buf); 124 + 125 + /* CIS pattern match on the sector buffer */ 126 + if ( ret < 0 || retlen != SECTOR_SIZE ) { 127 + printk(KERN_WARNING 128 + "SSFDC_RO:can't read CIS/IDI sector\n"); 129 + } else if ( !memcmp(sect_buf, cis_numbers, 130 + sizeof(cis_numbers)) ) { 131 + /* Found */ 132 + cis_sector = (int)(offset >> SECTOR_SHIFT); 133 + } else { 134 + DEBUG(MTD_DEBUG_LEVEL1, 135 + "SSFDC_RO: CIS/IDI sector not found" 136 + " on %s (mtd%d)\n", mtd->name, 137 + mtd->index); 138 + } 139 + break; 140 + } 141 + } 142 + 143 + return cis_sector; 144 + } 145 + 146 + /* Read physical sector (wrapper to MTD_READ) */ 147 + static int read_physical_sector(struct mtd_info *mtd, uint8_t *sect_buf, 148 + int sect_no) 149 + { 150 + int ret; 151 + size_t retlen; 152 + loff_t offset = (loff_t)sect_no << SECTOR_SHIFT; 153 + 154 + ret = mtd->read(mtd, offset, SECTOR_SIZE, &retlen, sect_buf); 155 + if (ret < 0 || retlen != SECTOR_SIZE) 156 + return -1; 157 + 158 + return 0; 159 + } 160 + 161 + /* Read redundancy area (wrapper to MTD_READ_OOB */ 162 + static int read_raw_oob(struct mtd_info *mtd, loff_t offs, uint8_t *buf) 163 + { 164 + struct mtd_oob_ops ops; 165 + int ret; 166 + 167 + ops.mode = MTD_OOB_RAW; 168 + ops.ooboffs = 0; 169 + ops.ooblen = mtd->oobsize; 170 + ops.len = OOB_SIZE; 171 + ops.oobbuf = buf; 172 + ops.datbuf = NULL; 173 + 174 + ret = mtd->read_oob(mtd, offs, &ops); 175 + if (ret < 0 || ops.retlen != OOB_SIZE) 176 + return -1; 177 + 178 + return 0; 179 + } 180 + 181 + /* Parity calculator on a word of n bit size */ 182 + static int get_parity(int number, int size) 183 + { 184 + int k; 185 + int parity; 186 + 187 + parity = 1; 188 + for (k = 0; k < size; k++) { 189 + parity += (number >> k); 190 + parity &= 1; 191 + } 192 + return parity; 193 + } 194 + 195 + /* Read and validate the logical block address field stored in the OOB */ 196 + static int get_logical_address(uint8_t *oob_buf) 197 + { 198 + int block_address, parity; 199 + int offset[2] = {6, 11}; /* offset of the 2 address fields within OOB */ 200 + int j; 201 + int ok = 0; 202 + 203 + /* 204 + * Look for the first valid logical address 205 + * Valid address has fixed pattern on most significant bits and 206 + * parity check 207 + */ 208 + for (j = 0; j < ARRAY_SIZE(offset); j++) { 209 + block_address = ((int)oob_buf[offset[j]] << 8) | 210 + oob_buf[offset[j]+1]; 211 + 212 + /* Check for the signature bits in the address field (MSBits) */ 213 + if ((block_address & ~0x7FF) == 0x1000) { 214 + parity = block_address & 0x01; 215 + block_address &= 0x7FF; 216 + block_address >>= 1; 217 + 218 + if (get_parity(block_address, 10) != parity) { 219 + DEBUG(MTD_DEBUG_LEVEL0, 220 + "SSFDC_RO: logical address field%d" 221 + "parity error(0x%04X)\n", j+1, 222 + block_address); 223 + } else { 224 + ok = 1; 225 + break; 226 + } 227 + } 228 + } 229 + 230 + if ( !ok ) 231 + block_address = -2; 232 + 233 + DEBUG(MTD_DEBUG_LEVEL3, "SSFDC_RO: get_logical_address() %d\n", 234 + block_address); 235 + 236 + return block_address; 237 + } 238 + 239 + /* Build the logic block map */ 240 + static int build_logical_block_map(struct ssfdcr_record *ssfdc) 241 + { 242 + unsigned long offset; 243 + uint8_t oob_buf[OOB_SIZE]; 244 + int ret, block_address, phys_block; 245 + struct mtd_info *mtd = ssfdc->mbd.mtd; 246 + 247 + DEBUG(MTD_DEBUG_LEVEL1, "SSFDC_RO: build_block_map() nblks=%d (%luK)\n", 248 + ssfdc->map_len, (unsigned long)ssfdc->map_len * 249 + ssfdc->erase_size / 1024 ); 250 + 251 + /* Scan every physical block, skip CIS block */ 252 + for (phys_block = ssfdc->cis_block + 1; phys_block < ssfdc->map_len; 253 + phys_block++) { 254 + offset = (unsigned long)phys_block * ssfdc->erase_size; 255 + if (mtd->block_isbad(mtd, offset)) 256 + continue; /* skip bad blocks */ 257 + 258 + ret = read_raw_oob(mtd, offset, oob_buf); 259 + if (ret < 0) { 260 + DEBUG(MTD_DEBUG_LEVEL0, 261 + "SSFDC_RO: mtd read_oob() failed at %lu\n", 262 + offset); 263 + return -1; 264 + } 265 + block_address = get_logical_address(oob_buf); 266 + 267 + /* Skip invalid addresses */ 268 + if (block_address >= 0 && 269 + block_address < MAX_LOGIC_BLK_PER_ZONE) { 270 + int zone_index; 271 + 272 + zone_index = phys_block / MAX_PHYS_BLK_PER_ZONE; 273 + block_address += zone_index * MAX_LOGIC_BLK_PER_ZONE; 274 + ssfdc->logic_block_map[block_address] = 275 + (unsigned short)phys_block; 276 + 277 + DEBUG(MTD_DEBUG_LEVEL2, 278 + "SSFDC_RO: build_block_map() phys_block=%d," 279 + "logic_block_addr=%d, zone=%d\n", 280 + phys_block, block_address, zone_index); 281 + } 282 + } 283 + return 0; 284 + } 285 + 286 + static void ssfdcr_add_mtd(struct mtd_blktrans_ops *tr, struct mtd_info *mtd) 287 + { 288 + struct ssfdcr_record *ssfdc; 289 + int cis_sector; 290 + 291 + /* Check for small page NAND flash */ 292 + if (mtd->type != MTD_NANDFLASH || mtd->oobsize != OOB_SIZE) 293 + return; 294 + 295 + /* Check for SSDFC format by reading CIS/IDI sector */ 296 + cis_sector = get_valid_cis_sector(mtd); 297 + if (cis_sector == -1) 298 + return; 299 + 300 + ssfdc = kzalloc(sizeof(struct ssfdcr_record), GFP_KERNEL); 301 + if (!ssfdc) { 302 + printk(KERN_WARNING 303 + "SSFDC_RO: out of memory for data structures\n"); 304 + return; 305 + } 306 + 307 + ssfdc->mbd.mtd = mtd; 308 + ssfdc->mbd.devnum = -1; 309 + ssfdc->mbd.blksize = SECTOR_SIZE; 310 + ssfdc->mbd.tr = tr; 311 + ssfdc->mbd.readonly = 1; 312 + 313 + ssfdc->cis_block = cis_sector / (mtd->erasesize >> SECTOR_SHIFT); 314 + ssfdc->erase_size = mtd->erasesize; 315 + ssfdc->map_len = mtd->size / mtd->erasesize; 316 + 317 + DEBUG(MTD_DEBUG_LEVEL1, 318 + "SSFDC_RO: cis_block=%d,erase_size=%d,map_len=%d,n_zones=%d\n", 319 + ssfdc->cis_block, ssfdc->erase_size, ssfdc->map_len, 320 + (ssfdc->map_len + MAX_PHYS_BLK_PER_ZONE - 1) / 321 + MAX_PHYS_BLK_PER_ZONE); 322 + 323 + /* Set geometry */ 324 + ssfdc->heads = 16; 325 + ssfdc->sectors = 32; 326 + get_chs( mtd->size, NULL, &ssfdc->heads, &ssfdc->sectors); 327 + ssfdc->cylinders = (unsigned short)((mtd->size >> SECTOR_SHIFT) / 328 + ((long)ssfdc->sectors * (long)ssfdc->heads)); 329 + 330 + DEBUG(MTD_DEBUG_LEVEL1, "SSFDC_RO: using C:%d H:%d S:%d == %ld sects\n", 331 + ssfdc->cylinders, ssfdc->heads , ssfdc->sectors, 332 + (long)ssfdc->cylinders * (long)ssfdc->heads * 333 + (long)ssfdc->sectors ); 334 + 335 + ssfdc->mbd.size = (long)ssfdc->heads * (long)ssfdc->cylinders * 336 + (long)ssfdc->sectors; 337 + 338 + /* Allocate logical block map */ 339 + ssfdc->logic_block_map = kmalloc( sizeof(ssfdc->logic_block_map[0]) * 340 + ssfdc->map_len, GFP_KERNEL); 341 + if (!ssfdc->logic_block_map) { 342 + printk(KERN_WARNING 343 + "SSFDC_RO: out of memory for data structures\n"); 344 + goto out_err; 345 + } 346 + memset(ssfdc->logic_block_map, 0xff, sizeof(ssfdc->logic_block_map[0]) * 347 + ssfdc->map_len); 348 + 349 + /* Build logical block map */ 350 + if (build_logical_block_map(ssfdc) < 0) 351 + goto out_err; 352 + 353 + /* Register device + partitions */ 354 + if (add_mtd_blktrans_dev(&ssfdc->mbd)) 355 + goto out_err; 356 + 357 + printk(KERN_INFO "SSFDC_RO: Found ssfdc%c on mtd%d (%s)\n", 358 + ssfdc->mbd.devnum + 'a', mtd->index, mtd->name); 359 + return; 360 + 361 + out_err: 362 + kfree(ssfdc->logic_block_map); 363 + kfree(ssfdc); 364 + } 365 + 366 + static void ssfdcr_remove_dev(struct mtd_blktrans_dev *dev) 367 + { 368 + struct ssfdcr_record *ssfdc = (struct ssfdcr_record *)dev; 369 + 370 + DEBUG(MTD_DEBUG_LEVEL1, "SSFDC_RO: remove_dev (i=%d)\n", dev->devnum); 371 + 372 + del_mtd_blktrans_dev(dev); 373 + kfree(ssfdc->logic_block_map); 374 + kfree(ssfdc); 375 + } 376 + 377 + static int ssfdcr_readsect(struct mtd_blktrans_dev *dev, 378 + unsigned long logic_sect_no, char *buf) 379 + { 380 + struct ssfdcr_record *ssfdc = (struct ssfdcr_record *)dev; 381 + int sectors_per_block, offset, block_address; 382 + 383 + sectors_per_block = ssfdc->erase_size >> SECTOR_SHIFT; 384 + offset = (int)(logic_sect_no % sectors_per_block); 385 + block_address = (int)(logic_sect_no / sectors_per_block); 386 + 387 + DEBUG(MTD_DEBUG_LEVEL3, 388 + "SSFDC_RO: ssfdcr_readsect(%lu) sec_per_blk=%d, ofst=%d," 389 + " block_addr=%d\n", logic_sect_no, sectors_per_block, offset, 390 + block_address); 391 + 392 + if (block_address >= ssfdc->map_len) 393 + BUG(); 394 + 395 + block_address = ssfdc->logic_block_map[block_address]; 396 + 397 + DEBUG(MTD_DEBUG_LEVEL3, 398 + "SSFDC_RO: ssfdcr_readsect() phys_block_addr=%d\n", 399 + block_address); 400 + 401 + if (block_address < 0xffff) { 402 + unsigned long sect_no; 403 + 404 + sect_no = (unsigned long)block_address * sectors_per_block + 405 + offset; 406 + 407 + DEBUG(MTD_DEBUG_LEVEL3, 408 + "SSFDC_RO: ssfdcr_readsect() phys_sect_no=%lu\n", 409 + sect_no); 410 + 411 + if (read_physical_sector( ssfdc->mbd.mtd, buf, sect_no ) < 0) 412 + return -EIO; 413 + } else { 414 + memset(buf, 0xff, SECTOR_SIZE); 415 + } 416 + 417 + return 0; 418 + } 419 + 420 + static int ssfdcr_getgeo(struct mtd_blktrans_dev *dev, struct hd_geometry *geo) 421 + { 422 + struct ssfdcr_record *ssfdc = (struct ssfdcr_record *)dev; 423 + 424 + DEBUG(MTD_DEBUG_LEVEL1, "SSFDC_RO: ssfdcr_getgeo() C=%d, H=%d, S=%d\n", 425 + ssfdc->cylinders, ssfdc->heads, ssfdc->sectors); 426 + 427 + geo->heads = ssfdc->heads; 428 + geo->sectors = ssfdc->sectors; 429 + geo->cylinders = ssfdc->cylinders; 430 + 431 + return 0; 432 + } 433 + 434 + /**************************************************************************** 435 + * 436 + * Module stuff 437 + * 438 + ****************************************************************************/ 439 + 440 + static struct mtd_blktrans_ops ssfdcr_tr = { 441 + .name = "ssfdc", 442 + .major = SSFDCR_MAJOR, 443 + .part_bits = SSFDCR_PARTN_BITS, 444 + .getgeo = ssfdcr_getgeo, 445 + .readsect = ssfdcr_readsect, 446 + .add_mtd = ssfdcr_add_mtd, 447 + .remove_dev = ssfdcr_remove_dev, 448 + .owner = THIS_MODULE, 449 + }; 450 + 451 + static int __init init_ssfdcr(void) 452 + { 453 + printk(KERN_INFO "SSFDC read-only Flash Translation layer\n"); 454 + 455 + return register_mtd_blktrans(&ssfdcr_tr); 456 + } 457 + 458 + static void __exit cleanup_ssfdcr(void) 459 + { 460 + deregister_mtd_blktrans(&ssfdcr_tr); 461 + } 462 + 463 + module_init(init_ssfdcr); 464 + module_exit(cleanup_ssfdcr); 465 + 466 + MODULE_LICENSE("GPL"); 467 + MODULE_AUTHOR("Claudio Lanconelli <lanconelli.claudio@eptar.com>"); 468 + MODULE_DESCRIPTION("Flash Translation Layer for read-only SSFDC SmartMedia card");
-4
fs/jffs2/jffs2_fs_i.h
··· 41 41 42 42 uint16_t flags; 43 43 uint8_t usercompr; 44 - #if !defined (__ECOS) 45 - #if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,2) 46 44 struct inode vfs_inode; 47 - #endif 48 - #endif 49 45 #ifdef CONFIG_JFFS2_FS_POSIX_ACL 50 46 struct posix_acl *i_acl_access; 51 47 struct posix_acl *i_acl_default;
+1
include/mtd/mtd-abi.h
··· 34 34 #define MTD_WRITEABLE 0x400 /* Device is writeable */ 35 35 #define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */ 36 36 #define MTD_NO_ERASE 0x1000 /* No erase necessary */ 37 + #define MTD_STUPID_LOCK 0x2000 /* Always locked after reset */ 37 38 38 39 // Some common devices / combinations of capabilities 39 40 #define MTD_CAP_ROM 0