Merge tag 'char-misc-6.6-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver fixes from Greg KH:
"Here is a small set of char/misc and other smaller driver subsystem
fixes for 6.6-rc6. Included in here are:

- lots of iio driver fixes

- binder memory leak fix

- mcb driver fixes

- counter driver fixes

- firmware loader documentation fix

- documentation update for embargoed hardware issues

All of these have been in linux-next for over a week with no reported
issues"

* tag 'char-misc-6.6-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (22 commits)
iio: pressure: ms5611: ms5611_prom_is_valid false negative bug
dt-bindings: iio: adc: adi,ad7292: Fix additionalProperties on channel nodes
iio: adc: ad7192: Correct reference voltage
iio: light: vcnl4000: Don't power on/off chip in config
iio: addac: Kconfig: update ad74413r selections
iio: pressure: dps310: Adjust Timeout Settings
iio: imu: bno055: Fix missing Kconfig dependencies
iio: adc: imx8qxp: Fix address for command buffer registers
iio: cros_ec: fix an use-after-free in cros_ec_sensors_push_data()
iio: irsd200: fix -Warray-bounds bug in irsd200_trigger_handler
dt-bindings: iio: rohm,bu27010: add missing vdd-supply to example
binder: fix memory leaks of spam and pending work
firmware_loader: Update contact emails for ABI docs
Documentation: embargoed-hardware-issues.rst: Clarify prenotifaction
mcb: remove is_added flag from mcb_device struct
coresight: tmc-etr: Disable warnings for allocation failures
coresight: Fix run time warnings while reusing ETR buffer
iio: admv1013: add mixer_vgate corner cases
iio: pressure: bmp280: Fix NULL pointer exception
iio: dac: ad3552r: Correct device IDs
...

Changed files
+94 -62
Documentation
ABI
devicetree
bindings
process
drivers
android
counter
hwtracing
iio
adc
addac
common
cros_ec_sensors
dac
frequency
imu
bno055
light
pressure
proximity
mcb
include
linux
+7 -7
Documentation/ABI/testing/sysfs-class-firmware
··· 1 1 What: /sys/class/firmware/.../data 2 2 Date: July 2022 3 3 KernelVersion: 5.19 4 - Contact: Russ Weight <russell.h.weight@intel.com> 4 + Contact: Russ Weight <russ.weight@linux.dev> 5 5 Description: The data sysfs file is used for firmware-fallback and for 6 6 firmware uploads. Cat a firmware image to this sysfs file 7 7 after you echo 1 to the loading sysfs file. When the firmware ··· 13 13 What: /sys/class/firmware/.../cancel 14 14 Date: July 2022 15 15 KernelVersion: 5.19 16 - Contact: Russ Weight <russell.h.weight@intel.com> 16 + Contact: Russ Weight <russ.weight@linux.dev> 17 17 Description: Write-only. For firmware uploads, write a "1" to this file to 18 18 request that the transfer of firmware data to the lower-level 19 19 device be canceled. This request will be rejected (EBUSY) if ··· 23 23 What: /sys/class/firmware/.../error 24 24 Date: July 2022 25 25 KernelVersion: 5.19 26 - Contact: Russ Weight <russell.h.weight@intel.com> 26 + Contact: Russ Weight <russ.weight@linux.dev> 27 27 Description: Read-only. Returns a string describing a failed firmware 28 28 upload. This string will be in the form of <STATUS>:<ERROR>, 29 29 where <STATUS> will be one of the status strings described ··· 37 37 What: /sys/class/firmware/.../loading 38 38 Date: July 2022 39 39 KernelVersion: 5.19 40 - Contact: Russ Weight <russell.h.weight@intel.com> 40 + Contact: Russ Weight <russ.weight@linux.dev> 41 41 Description: The loading sysfs file is used for both firmware-fallback and 42 42 for firmware uploads. Echo 1 onto the loading file to indicate 43 43 you are writing a firmware file to the data sysfs node. Echo ··· 49 49 What: /sys/class/firmware/.../remaining_size 50 50 Date: July 2022 51 51 KernelVersion: 5.19 52 - Contact: Russ Weight <russell.h.weight@intel.com> 52 + Contact: Russ Weight <russ.weight@linux.dev> 53 53 Description: Read-only. For firmware upload, this file contains the size 54 54 of the firmware data that remains to be transferred to the 55 55 lower-level device driver. The size value is initialized to ··· 62 62 What: /sys/class/firmware/.../status 63 63 Date: July 2022 64 64 KernelVersion: 5.19 65 - Contact: Russ Weight <russell.h.weight@intel.com> 65 + Contact: Russ Weight <russ.weight@linux.dev> 66 66 Description: Read-only. Returns a string describing the current status of 67 67 a firmware upload. The string will be one of the following: 68 68 idle, "receiving", "preparing", "transferring", "programming". ··· 70 70 What: /sys/class/firmware/.../timeout 71 71 Date: July 2022 72 72 KernelVersion: 5.19 73 - Contact: Russ Weight <russell.h.weight@intel.com> 73 + Contact: Russ Weight <russ.weight@linux.dev> 74 74 Description: This file supports the timeout mechanism for firmware 75 75 fallback. This file has no affect on firmware uploads. For 76 76 more information on timeouts please see the documentation
+1 -1
Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml
··· 61 61 required: 62 62 - reg 63 63 64 - additionalProperties: true 64 + additionalProperties: false 65 65 66 66 allOf: 67 67 - $ref: /schemas/spi/spi-peripheral-props.yaml#
+1
Documentation/devicetree/bindings/iio/light/rohm,bu27010.yaml
··· 45 45 light-sensor@38 { 46 46 compatible = "rohm,bu27010"; 47 47 reg = <0x38>; 48 + vdd-supply = <&vdd>; 48 49 }; 49 50 };
+12 -7
Documentation/process/embargoed-hardware-issues.rst
··· 25 25 The Linux kernel hardware security team is separate from the regular Linux 26 26 kernel security team. 27 27 28 - The team only handles the coordination of embargoed hardware security 29 - issues. Reports of pure software security bugs in the Linux kernel are not 28 + The team only handles developing fixes for embargoed hardware security 29 + issues. Reports of pure software security bugs in the Linux kernel are not 30 30 handled by this team and the reporter will be guided to contact the regular 31 31 Linux kernel security team (:ref:`Documentation/admin-guide/ 32 32 <securitybugs>`) instead. 33 33 34 34 The team can be contacted by email at <hardware-security@kernel.org>. This 35 - is a private list of security officers who will help you to coordinate an 36 - issue according to our documented process. 35 + is a private list of security officers who will help you to coordinate a 36 + fix according to our documented process. 37 37 38 38 The list is encrypted and email to the list can be sent by either PGP or 39 39 S/MIME encrypted and must be signed with the reporter's PGP key or S/MIME ··· 132 132 133 133 The hardware security team will provide an incident-specific encrypted 134 134 mailing-list which will be used for initial discussion with the reporter, 135 - further disclosure and coordination. 135 + further disclosure, and coordination of fixes. 136 136 137 137 The hardware security team will provide the disclosing party a list of 138 138 developers (domain experts) who should be informed initially about the 139 - issue after confirming with the developers that they will adhere to this 139 + issue after confirming with the developers that they will adhere to this 140 140 Memorandum of Understanding and the documented process. These developers 141 141 form the initial response team and will be responsible for handling the 142 142 issue after initial contact. The hardware security team is supporting the ··· 209 209 After acknowledgement or resolution of an objection the expert is disclosed 210 210 by the incident team and brought into the development process. 211 211 212 + List participants may not communicate about the issue outside of the 213 + private mailing list. List participants may not use any shared resources 214 + (e.g. employer build farms, CI systems, etc) when working on patches. 215 + 212 216 213 217 Coordinated release 214 218 """"""""""""""""""" 215 219 216 220 The involved parties will negotiate the date and time where the embargo 217 221 ends. At that point the prepared mitigations are integrated into the 218 - relevant kernel trees and published. 222 + relevant kernel trees and published. There is no pre-notification process: 223 + fixes are published in public and available to everyone at the same time. 219 224 220 225 While we understand that hardware security issues need coordinated embargo 221 226 time, the embargo time should be constrained to the minimum time which is
+1 -1
MAINTAINERS
··· 8110 8110 8111 8111 FIRMWARE LOADER (request_firmware) 8112 8112 M: Luis Chamberlain <mcgrof@kernel.org> 8113 - M: Russ Weight <russell.h.weight@intel.com> 8113 + M: Russ Weight <russ.weight@linux.dev> 8114 8114 L: linux-kernel@vger.kernel.org 8115 8115 S: Maintained 8116 8116 F: Documentation/firmware_class/
+2
drivers/android/binder.c
··· 4812 4812 "undelivered TRANSACTION_ERROR: %u\n", 4813 4813 e->cmd); 4814 4814 } break; 4815 + case BINDER_WORK_TRANSACTION_PENDING: 4816 + case BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT: 4815 4817 case BINDER_WORK_TRANSACTION_COMPLETE: { 4816 4818 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION, 4817 4819 "undelivered TRANSACTION_COMPLETE\n");
+2 -2
drivers/counter/counter-chrdev.c
··· 247 247 if (*id == component_id) 248 248 return 0; 249 249 250 - if (ext->type == COUNTER_COMP_ARRAY) { 251 - element = ext->priv; 250 + if (ext[*ext_idx].type == COUNTER_COMP_ARRAY) { 251 + element = ext[*ext_idx].priv; 252 252 253 253 if (component_id - *id < element->length) 254 254 return 0;
+1 -1
drivers/counter/microchip-tcb-capture.c
··· 97 97 priv->qdec_mode = 0; 98 98 /* Set highest rate based on whether soc has gclk or not */ 99 99 bmr &= ~(ATMEL_TC_QDEN | ATMEL_TC_POSEN); 100 - if (priv->tc_cfg->has_gclk) 100 + if (!priv->tc_cfg->has_gclk) 101 101 cmr |= ATMEL_TC_TIMER_CLOCK2; 102 102 else 103 103 cmr |= ATMEL_TC_TIMER_CLOCK1;
+15 -12
drivers/hwtracing/coresight/coresight-tmc-etr.c
··· 610 610 611 611 flat_buf->vaddr = dma_alloc_noncoherent(real_dev, etr_buf->size, 612 612 &flat_buf->daddr, 613 - DMA_FROM_DEVICE, GFP_KERNEL); 613 + DMA_FROM_DEVICE, 614 + GFP_KERNEL | __GFP_NOWARN); 614 615 if (!flat_buf->vaddr) { 615 616 kfree(flat_buf); 616 617 return -ENOMEM; ··· 1175 1174 } 1176 1175 1177 1176 /* 1178 - * In sysFS mode we can have multiple writers per sink. Since this 1179 - * sink is already enabled no memory is needed and the HW need not be 1180 - * touched, even if the buffer size has changed. 1181 - */ 1182 - if (drvdata->mode == CS_MODE_SYSFS) { 1183 - atomic_inc(&csdev->refcnt); 1184 - goto out; 1185 - } 1186 - 1187 - /* 1188 1177 * If we don't have a buffer or it doesn't match the requested size, 1189 1178 * use the buffer allocated above. Otherwise reuse the existing buffer. 1190 1179 */ ··· 1195 1204 1196 1205 static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) 1197 1206 { 1198 - int ret; 1207 + int ret = 0; 1199 1208 unsigned long flags; 1200 1209 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 1201 1210 struct etr_buf *sysfs_buf = tmc_etr_get_sysfs_buffer(csdev); ··· 1204 1213 return PTR_ERR(sysfs_buf); 1205 1214 1206 1215 spin_lock_irqsave(&drvdata->spinlock, flags); 1216 + 1217 + /* 1218 + * In sysFS mode we can have multiple writers per sink. Since this 1219 + * sink is already enabled no memory is needed and the HW need not be 1220 + * touched, even if the buffer size has changed. 1221 + */ 1222 + if (drvdata->mode == CS_MODE_SYSFS) { 1223 + atomic_inc(&csdev->refcnt); 1224 + goto out; 1225 + } 1226 + 1207 1227 ret = tmc_etr_enable_hw(drvdata, sysfs_buf); 1208 1228 if (!ret) { 1209 1229 drvdata->mode = CS_MODE_SYSFS; 1210 1230 atomic_inc(&csdev->refcnt); 1211 1231 } 1212 1232 1233 + out: 1213 1234 spin_unlock_irqrestore(&drvdata->spinlock, flags); 1214 1235 1215 1236 if (!ret)
+25 -4
drivers/iio/adc/ad7192.c
··· 177 177 struct ad7192_state { 178 178 const struct ad7192_chip_info *chip_info; 179 179 struct regulator *avdd; 180 + struct regulator *vref; 180 181 struct clk *mclk; 181 182 u16 int_vref_mv; 182 183 u32 fclk; ··· 1009 1008 if (ret) 1010 1009 return dev_err_probe(&spi->dev, ret, "Failed to enable specified DVdd supply\n"); 1011 1010 1012 - ret = regulator_get_voltage(st->avdd); 1013 - if (ret < 0) { 1014 - dev_err(&spi->dev, "Device tree error, reference voltage undefined\n"); 1015 - return ret; 1011 + st->vref = devm_regulator_get_optional(&spi->dev, "vref"); 1012 + if (IS_ERR(st->vref)) { 1013 + if (PTR_ERR(st->vref) != -ENODEV) 1014 + return PTR_ERR(st->vref); 1015 + 1016 + ret = regulator_get_voltage(st->avdd); 1017 + if (ret < 0) 1018 + return dev_err_probe(&spi->dev, ret, 1019 + "Device tree error, AVdd voltage undefined\n"); 1020 + } else { 1021 + ret = regulator_enable(st->vref); 1022 + if (ret) { 1023 + dev_err(&spi->dev, "Failed to enable specified Vref supply\n"); 1024 + return ret; 1025 + } 1026 + 1027 + ret = devm_add_action_or_reset(&spi->dev, ad7192_reg_disable, st->vref); 1028 + if (ret) 1029 + return ret; 1030 + 1031 + ret = regulator_get_voltage(st->vref); 1032 + if (ret < 0) 1033 + return dev_err_probe(&spi->dev, ret, 1034 + "Device tree error, Vref voltage undefined\n"); 1016 1035 } 1017 1036 st->int_vref_mv = ret / 1000; 1018 1037
+2 -2
drivers/iio/adc/imx8qxp-adc.c
··· 38 38 #define IMX8QXP_ADR_ADC_FCTRL 0x30 39 39 #define IMX8QXP_ADR_ADC_SWTRIG 0x34 40 40 #define IMX8QXP_ADR_ADC_TCTRL(tid) (0xc0 + (tid) * 4) 41 - #define IMX8QXP_ADR_ADC_CMDH(cid) (0x100 + (cid) * 8) 42 - #define IMX8QXP_ADR_ADC_CMDL(cid) (0x104 + (cid) * 8) 41 + #define IMX8QXP_ADR_ADC_CMDL(cid) (0x100 + (cid) * 8) 42 + #define IMX8QXP_ADR_ADC_CMDH(cid) (0x104 + (cid) * 8) 43 43 #define IMX8QXP_ADR_ADC_RESFIFO 0x300 44 44 #define IMX8QXP_ADR_ADC_TST 0xffc 45 45
+2
drivers/iio/addac/Kconfig
··· 24 24 depends on GPIOLIB && SPI 25 25 select REGMAP_SPI 26 26 select CRC8 27 + select IIO_BUFFER 28 + select IIO_TRIGGERED_BUFFER 27 29 help 28 30 Say yes here to build support for Analog Devices AD74412R/AD74413R 29 31 quad-channel software configurable input/output solution.
+5 -1
drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c
··· 190 190 /* 191 191 * Ignore samples if the buffer is not set: it is needed if the ODR is 192 192 * set but the buffer is not enabled yet. 193 + * 194 + * Note: iio_device_claim_buffer_mode() returns -EBUSY if the buffer 195 + * is not enabled. 193 196 */ 194 - if (!iio_buffer_enabled(indio_dev)) 197 + if (iio_device_claim_buffer_mode(indio_dev) < 0) 195 198 return 0; 196 199 197 200 out = (s16 *)st->samples; ··· 213 210 iio_push_to_buffers_with_timestamp(indio_dev, st->samples, 214 211 timestamp + delta); 215 212 213 + iio_device_release_buffer_mode(indio_dev); 216 214 return 0; 217 215 } 218 216 EXPORT_SYMBOL_GPL(cros_ec_sensors_push_data);
+2 -2
drivers/iio/dac/ad3552r.c
··· 140 140 }; 141 141 142 142 enum ad3542r_id { 143 - AD3542R_ID = 0x4008, 144 - AD3552R_ID = 0x4009, 143 + AD3542R_ID = 0x4009, 144 + AD3552R_ID = 0x4008, 145 145 }; 146 146 147 147 enum ad3552r_ch_output_range {
+2 -2
drivers/iio/frequency/admv1013.c
··· 351 351 if (vcm < 0) 352 352 return vcm; 353 353 354 - if (vcm < 1800000) 354 + if (vcm <= 1800000) 355 355 mixer_vgate = (2389 * vcm / 1000000 + 8100) / 100; 356 - else if (vcm > 1800000 && vcm < 2600000) 356 + else if (vcm > 1800000 && vcm <= 2600000) 357 357 mixer_vgate = (2375 * vcm / 1000000 + 125) / 100; 358 358 else 359 359 return -EINVAL;
+2
drivers/iio/imu/bno055/Kconfig
··· 2 2 3 3 config BOSCH_BNO055 4 4 tristate 5 + select IIO_BUFFER 6 + select IIO_TRIGGERED_BUFFER 5 7 6 8 config BOSCH_BNO055_SERIAL 7 9 tristate "Bosch BNO055 attached via UART"
-1
drivers/iio/light/vcnl4000.c
··· 1513 1513 1514 1514 out: 1515 1515 mutex_unlock(&data->vcnl4000_lock); 1516 - data->chip_spec->set_power_state(data, data->ps_int || data->als_int); 1517 1516 1518 1517 return ret; 1519 1518 }
+1 -1
drivers/iio/pressure/bmp280-core.c
··· 2179 2179 * however as it happens, the BMP085 shares the chip ID of BMP180 2180 2180 * so we look for an IRQ if we have that. 2181 2181 */ 2182 - if (irq > 0 || (chip_id == BMP180_CHIP_ID)) { 2182 + if (irq > 0 && (chip_id == BMP180_CHIP_ID)) { 2183 2183 ret = bmp085_fetch_eoc_irq(dev, name, irq, data); 2184 2184 if (ret) 2185 2185 return ret;
+4 -4
drivers/iio/pressure/dps310.c
··· 57 57 #define DPS310_RESET_MAGIC 0x09 58 58 #define DPS310_COEF_BASE 0x10 59 59 60 - /* Make sure sleep time is <= 20ms for usleep_range */ 61 - #define DPS310_POLL_SLEEP_US(t) min(20000, (t) / 8) 60 + /* Make sure sleep time is <= 30ms for usleep_range */ 61 + #define DPS310_POLL_SLEEP_US(t) min(30000, (t) / 8) 62 62 /* Silently handle error in rate value here */ 63 63 #define DPS310_POLL_TIMEOUT_US(rc) ((rc) <= 0 ? 1000000 : 1000000 / (rc)) 64 64 ··· 402 402 if (rc) 403 403 return rc; 404 404 405 - /* Wait for device chip access: 2.5ms in specification */ 406 - usleep_range(2500, 12000); 405 + /* Wait for device chip access: 15ms in specification */ 406 + usleep_range(15000, 55000); 407 407 return 0; 408 408 } 409 409
+1 -1
drivers/iio/pressure/ms5611_core.c
··· 76 76 77 77 crc = (crc >> 12) & 0x000F; 78 78 79 - return crc_orig != 0x0000 && crc == crc_orig; 79 + return crc == crc_orig; 80 80 } 81 81 82 82 static int ms5611_read_prom(struct iio_dev *indio_dev)
+3 -3
drivers/iio/proximity/irsd200.c
··· 759 759 { 760 760 struct iio_dev *indio_dev = ((struct iio_poll_func *)pollf)->indio_dev; 761 761 struct irsd200_data *data = iio_priv(indio_dev); 762 - s16 buf = 0; 762 + s64 buf[2] = {}; 763 763 int ret; 764 764 765 - ret = irsd200_read_data(data, &buf); 765 + ret = irsd200_read_data(data, (s16 *)buf); 766 766 if (ret) 767 767 goto end; 768 768 769 - iio_push_to_buffers_with_timestamp(indio_dev, &buf, 769 + iio_push_to_buffers_with_timestamp(indio_dev, buf, 770 770 iio_get_time_ns(indio_dev)); 771 771 772 772 end:
+3 -7
drivers/mcb/mcb-core.c
··· 387 387 388 388 static int __mcb_bus_add_devices(struct device *dev, void *data) 389 389 { 390 - struct mcb_device *mdev = to_mcb_device(dev); 391 390 int retval; 392 391 393 - if (mdev->is_added) 394 - return 0; 395 - 396 392 retval = device_attach(dev); 397 - if (retval < 0) 393 + if (retval < 0) { 398 394 dev_err(dev, "Error adding device (%d)\n", retval); 399 - 400 - mdev->is_added = true; 395 + return retval; 396 + } 401 397 402 398 return 0; 403 399 }
-2
drivers/mcb/mcb-parse.c
··· 99 99 mdev->mem.end = mdev->mem.start + size - 1; 100 100 mdev->mem.flags = IORESOURCE_MEM; 101 101 102 - mdev->is_added = false; 103 - 104 102 ret = mcb_device_register(bus, mdev); 105 103 if (ret < 0) 106 104 goto err;
-1
include/linux/mcb.h
··· 63 63 struct mcb_device { 64 64 struct device dev; 65 65 struct mcb_bus *bus; 66 - bool is_added; 67 66 struct mcb_driver *driver; 68 67 u16 id; 69 68 int inst;