tjh.dev / kernel
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kernel os linux
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ARM: berlin: move BG2Q clock node

With the introduction of the Berlin simple-mfd controller driver, all
drivers previously sharing the chip and system controller nodes now
have their own sub-node.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

authored by

Antoine Tenart and committed by
Sebastian Hesselbarth a457b86c b8b59d4c

+27 -23
+27 -23
arch/arm/boot/dts/berlin2q.dtsi
··· 74 74 sdhci0: sdhci@ab0000 { 75 75 compatible = "mrvl,pxav3-mmc"; 76 76 reg = <0xab0000 0x200>; 77 - clocks = <&chip CLKID_SDIO1XIN>; 77 + clocks = <&chip_clk CLKID_SDIO1XIN>; 78 78 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 79 79 status = "disabled"; 80 80 }; ··· 82 82 sdhci1: sdhci@ab0800 { 83 83 compatible = "mrvl,pxav3-mmc"; 84 84 reg = <0xab0800 0x200>; 85 - clocks = <&chip CLKID_SDIO1XIN>; 85 + clocks = <&chip_clk CLKID_SDIO1XIN>; 86 86 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 87 87 status = "disabled"; 88 88 }; ··· 91 91 compatible = "mrvl,pxav3-mmc"; 92 92 reg = <0xab1000 0x200>; 93 93 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 94 - clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>; 94 + clocks = <&chip_clk CLKID_NFC_ECC>, <&chip_clk CLKID_NFC>; 95 95 clock-names = "io", "core"; 96 96 status = "disabled"; 97 97 }; ··· 112 112 local-timer@ad0600 { 113 113 compatible = "arm,cortex-a9-twd-timer"; 114 114 reg = <0xad0600 0x20>; 115 - clocks = <&chip CLKID_TWD>; 115 + clocks = <&chip_clk CLKID_TWD>; 116 116 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 117 117 }; 118 118 ··· 135 135 compatible = "chipidea,usb2"; 136 136 reg = <0xa30000 0x10000>; 137 137 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 138 - clocks = <&chip CLKID_USB2>; 138 + clocks = <&chip_clk CLKID_USB2>; 139 139 phys = <&usb_phy2>; 140 140 phy-names = "usb-phy"; 141 141 status = "disabled"; ··· 160 160 eth0: ethernet@b90000 { 161 161 compatible = "marvell,pxa168-eth"; 162 162 reg = <0xb90000 0x10000>; 163 - clocks = <&chip CLKID_GETH0>; 163 + clocks = <&chip_clk CLKID_GETH0>; 164 164 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 165 165 /* set by bootloader */ 166 166 local-mac-address = [00 00 00 00 00 00]; ··· 267 267 reg = <0x1400 0x100>; 268 268 interrupt-parent = <&aic>; 269 269 interrupts = <4>; 270 - clocks = <&chip CLKID_CFG>; 270 + clocks = <&chip_clk CLKID_CFG>; 271 271 pinctrl-0 = <&twsi0_pmux>; 272 272 pinctrl-names = "default"; 273 273 status = "disabled"; ··· 280 280 reg = <0x1800 0x100>; 281 281 interrupt-parent = <&aic>; 282 282 interrupts = <5>; 283 - clocks = <&chip CLKID_CFG>; 283 + clocks = <&chip_clk CLKID_CFG>; 284 284 pinctrl-0 = <&twsi1_pmux>; 285 285 pinctrl-names = "default"; 286 286 status = "disabled"; ··· 289 289 timer0: timer@2c00 { 290 290 compatible = "snps,dw-apb-timer"; 291 291 reg = <0x2c00 0x14>; 292 - clocks = <&chip CLKID_CFG>; 292 + clocks = <&chip_clk CLKID_CFG>; 293 293 clock-names = "timer"; 294 294 interrupts = <8>; 295 295 }; ··· 297 297 timer1: timer@2c14 { 298 298 compatible = "snps,dw-apb-timer"; 299 299 reg = <0x2c14 0x14>; 300 - clocks = <&chip CLKID_CFG>; 300 + clocks = <&chip_clk CLKID_CFG>; 301 301 clock-names = "timer"; 302 302 }; 303 303 304 304 timer2: timer@2c28 { 305 305 compatible = "snps,dw-apb-timer"; 306 306 reg = <0x2c28 0x14>; 307 - clocks = <&chip CLKID_CFG>; 307 + clocks = <&chip_clk CLKID_CFG>; 308 308 clock-names = "timer"; 309 309 status = "disabled"; 310 310 }; ··· 312 312 timer3: timer@2c3c { 313 313 compatible = "snps,dw-apb-timer"; 314 314 reg = <0x2c3c 0x14>; 315 - clocks = <&chip CLKID_CFG>; 315 + clocks = <&chip_clk CLKID_CFG>; 316 316 clock-names = "timer"; 317 317 status = "disabled"; 318 318 }; ··· 320 320 timer4: timer@2c50 { 321 321 compatible = "snps,dw-apb-timer"; 322 322 reg = <0x2c50 0x14>; 323 - clocks = <&chip CLKID_CFG>; 323 + clocks = <&chip_clk CLKID_CFG>; 324 324 clock-names = "timer"; 325 325 status = "disabled"; 326 326 }; ··· 328 328 timer5: timer@2c64 { 329 329 compatible = "snps,dw-apb-timer"; 330 330 reg = <0x2c64 0x14>; 331 - clocks = <&chip CLKID_CFG>; 331 + clocks = <&chip_clk CLKID_CFG>; 332 332 clock-names = "timer"; 333 333 status = "disabled"; 334 334 }; ··· 336 336 timer6: timer@2c78 { 337 337 compatible = "snps,dw-apb-timer"; 338 338 reg = <0x2c78 0x14>; 339 - clocks = <&chip CLKID_CFG>; 339 + clocks = <&chip_clk CLKID_CFG>; 340 340 clock-names = "timer"; 341 341 status = "disabled"; 342 342 }; ··· 344 344 timer7: timer@2c8c { 345 345 compatible = "snps,dw-apb-timer"; 346 346 reg = <0x2c8c 0x14>; 347 - clocks = <&chip CLKID_CFG>; 347 + clocks = <&chip_clk CLKID_CFG>; 348 348 clock-names = "timer"; 349 349 status = "disabled"; 350 350 }; ··· 361 361 362 362 chip: chip-control@ea0000 { 363 363 compatible = "marvell,berlin2q-chip-ctrl", "simple-mfd", "syscon"; 364 - #clock-cells = <1>; 365 364 reg = <0xea0000 0x400>, <0xdd0170 0x10>; 366 - clocks = <&refclk>; 367 - clock-names = "refclk"; 365 + 366 + chip_clk: clock { 367 + compatible = "marvell,berlin2q-clk"; 368 + #clock-cells = <1>; 369 + clocks = <&refclk>; 370 + clock-names = "refclk"; 371 + }; 368 372 369 373 soc_pinctrl: pin-controller { 370 374 compatible = "marvell,berlin2q-soc-pinctrl"; ··· 394 390 compatible = "marvell,berlin2q-ahci", "generic-ahci"; 395 391 reg = <0xe90000 0x1000>; 396 392 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 397 - clocks = <&chip CLKID_SATA>; 393 + clocks = <&chip_clk CLKID_SATA>; 398 394 #address-cells = <1>; 399 395 #size-cells = <0>; 400 396 ··· 414 410 sata_phy: phy@e900a0 { 415 411 compatible = "marvell,berlin2q-sata-phy"; 416 412 reg = <0xe900a0 0x200>; 417 - clocks = <&chip CLKID_SATA>; 413 + clocks = <&chip_clk CLKID_SATA>; 418 414 #address-cells = <1>; 419 415 #size-cells = <0>; 420 416 #phy-cells = <1>; ··· 433 429 compatible = "chipidea,usb2"; 434 430 reg = <0xed0000 0x10000>; 435 431 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 436 - clocks = <&chip CLKID_USB0>; 432 + clocks = <&chip_clk CLKID_USB0>; 437 433 phys = <&usb_phy0>; 438 434 phy-names = "usb-phy"; 439 435 status = "disabled"; ··· 443 439 compatible = "chipidea,usb2"; 444 440 reg = <0xee0000 0x10000>; 445 441 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 446 - clocks = <&chip CLKID_USB1>; 442 + clocks = <&chip_clk CLKID_USB1>; 447 443 phys = <&usb_phy1>; 448 444 phy-names = "usb-phy"; 449 445 status = "disabled";