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kernel os linux

Revert "PCI: aardvark: Rewrite IRQ code to chained IRQ handler"

This reverts commit 1571d67dc190e50c6c56e8f88cdc39f7cc53166e.

This commit broke support for setting interrupt affinity. It looks like
that it is related to the chained IRQ handler. Revert this commit until
issue with setting interrupt affinity is fixed.

Fixes: 1571d67dc190 ("PCI: aardvark: Rewrite IRQ code to chained IRQ handler")
Link: https://lore.kernel.org/r/20220515125815.30157-1-pali@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

authored by

Pali Rohár and committed by
Bjorn Helgaas
a3b69dd0 134b5ce3

+22 -26
+22 -26
drivers/pci/controller/pci-aardvark.c
··· 272 272 u32 actions; 273 273 } wins[OB_WIN_COUNT]; 274 274 u8 wins_count; 275 - int irq; 276 275 struct irq_domain *rp_irq_domain; 277 276 struct irq_domain *irq_domain; 278 277 struct irq_chip irq_chip; ··· 1569 1570 } 1570 1571 } 1571 1572 1572 - static void advk_pcie_irq_handler(struct irq_desc *desc) 1573 + static irqreturn_t advk_pcie_irq_handler(int irq, void *arg) 1573 1574 { 1574 - struct advk_pcie *pcie = irq_desc_get_handler_data(desc); 1575 - struct irq_chip *chip = irq_desc_get_chip(desc); 1576 - u32 val, mask, status; 1575 + struct advk_pcie *pcie = arg; 1576 + u32 status; 1577 1577 1578 - chained_irq_enter(chip, desc); 1578 + status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); 1579 + if (!(status & PCIE_IRQ_CORE_INT)) 1580 + return IRQ_NONE; 1579 1581 1580 - val = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); 1581 - mask = advk_readl(pcie, HOST_CTRL_INT_MASK_REG); 1582 - status = val & ((~mask) & PCIE_IRQ_ALL_MASK); 1582 + advk_pcie_handle_int(pcie); 1583 1583 1584 - if (status & PCIE_IRQ_CORE_INT) { 1585 - advk_pcie_handle_int(pcie); 1584 + /* Clear interrupt */ 1585 + advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG); 1586 1586 1587 - /* Clear interrupt */ 1588 - advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG); 1589 - } 1590 - 1591 - chained_irq_exit(chip, desc); 1587 + return IRQ_HANDLED; 1592 1588 } 1593 1589 1594 1590 static int advk_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) ··· 1663 1669 struct advk_pcie *pcie; 1664 1670 struct pci_host_bridge *bridge; 1665 1671 struct resource_entry *entry; 1666 - int ret; 1672 + int ret, irq; 1667 1673 1668 1674 bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie)); 1669 1675 if (!bridge) ··· 1749 1755 if (IS_ERR(pcie->base)) 1750 1756 return PTR_ERR(pcie->base); 1751 1757 1752 - pcie->irq = platform_get_irq(pdev, 0); 1753 - if (pcie->irq < 0) 1754 - return pcie->irq; 1758 + irq = platform_get_irq(pdev, 0); 1759 + if (irq < 0) 1760 + return irq; 1761 + 1762 + ret = devm_request_irq(dev, irq, advk_pcie_irq_handler, 1763 + IRQF_SHARED | IRQF_NO_THREAD, "advk-pcie", 1764 + pcie); 1765 + if (ret) { 1766 + dev_err(dev, "Failed to register interrupt\n"); 1767 + return ret; 1768 + } 1755 1769 1756 1770 pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node, 1757 1771 "reset-gpios", 0, ··· 1816 1814 return ret; 1817 1815 } 1818 1816 1819 - irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie); 1820 - 1821 1817 bridge->sysdata = pcie; 1822 1818 bridge->ops = &advk_pcie_ops; 1823 1819 bridge->map_irq = advk_pcie_map_irq; 1824 1820 1825 1821 ret = pci_host_probe(bridge); 1826 1822 if (ret < 0) { 1827 - irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); 1828 1823 advk_pcie_remove_rp_irq_domain(pcie); 1829 1824 advk_pcie_remove_msi_irq_domain(pcie); 1830 1825 advk_pcie_remove_irq_domain(pcie); ··· 1869 1870 advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG); 1870 1871 advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); 1871 1872 advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); 1872 - 1873 - /* Remove IRQ handler */ 1874 - irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); 1875 1873 1876 1874 /* Remove IRQ domains */ 1877 1875 advk_pcie_remove_rp_irq_domain(pcie);