arm64: fix typo in I-cache policy detection

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

This removes an unfortunately placed semi-colon resulting in all instruction
caches being classified as AIVIVT.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

authored by

Ard Biesheuvel and committed by

Will Deacon 11 years ago a3a80544 7d1311b9

+1 -1

1 changed file

expand all

arch

arm64

kernel

cpuinfo.c

+1 -1

arch/arm64/kernel/cpuinfo.c

··· 49 49 50 50 if (l1ip != ICACHE_POLICY_PIPT) 51 51 set_bit(ICACHEF_ALIASING, &__icache_flags); 52 - if (l1ip == ICACHE_POLICY_AIVIVT); 52 + if (l1ip == ICACHE_POLICY_AIVIVT) 53 53 set_bit(ICACHEF_AIVIVT, &__icache_flags); 54 54 55 55 pr_info("Detected %s I-cache on CPU%d\n", icache_policy_str[l1ip], cpu);