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media: dt-bindings: media: Binding document for Qualcomm Camera subsystem driver

Add DT binding document for Qualcomm Camera subsystem driver.

CC: Rob Herring <robh+dt@kernel.org>
CC: devicetree@vger.kernel.org
Signed-off-by: Todor Tomov <todor.tomov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>

authored by

Todor Tomov and committed by
Mauro Carvalho Chehab
a379e3f6 d1b3437e

+197
+197
Documentation/devicetree/bindings/media/qcom,camss.txt
··· 1 + Qualcomm Camera Subsystem 2 + 3 + * Properties 4 + 5 + - compatible: 6 + Usage: required 7 + Value type: <stringlist> 8 + Definition: Should contain: 9 + - "qcom,msm8916-camss" 10 + - reg: 11 + Usage: required 12 + Value type: <prop-encoded-array> 13 + Definition: Register ranges as listed in the reg-names property. 14 + - reg-names: 15 + Usage: required 16 + Value type: <stringlist> 17 + Definition: Should contain the following entries: 18 + - "csiphy0" 19 + - "csiphy0_clk_mux" 20 + - "csiphy1" 21 + - "csiphy1_clk_mux" 22 + - "csid0" 23 + - "csid1" 24 + - "ispif" 25 + - "csi_clk_mux" 26 + - "vfe0" 27 + - interrupts: 28 + Usage: required 29 + Value type: <prop-encoded-array> 30 + Definition: Interrupts as listed in the interrupt-names property. 31 + - interrupt-names: 32 + Usage: required 33 + Value type: <stringlist> 34 + Definition: Should contain the following entries: 35 + - "csiphy0" 36 + - "csiphy1" 37 + - "csid0" 38 + - "csid1" 39 + - "ispif" 40 + - "vfe0" 41 + - power-domains: 42 + Usage: required 43 + Value type: <prop-encoded-array> 44 + Definition: A phandle and power domain specifier pairs to the 45 + power domain which is responsible for collapsing 46 + and restoring power to the peripheral. 47 + - clocks: 48 + Usage: required 49 + Value type: <prop-encoded-array> 50 + Definition: A list of phandle and clock specifier pairs as listed 51 + in clock-names property. 52 + - clock-names: 53 + Usage: required 54 + Value type: <stringlist> 55 + Definition: Should contain the following entries: 56 + - "camss_top_ahb" 57 + - "ispif_ahb" 58 + - "csiphy0_timer" 59 + - "csiphy1_timer" 60 + - "csi0_ahb" 61 + - "csi0" 62 + - "csi0_phy" 63 + - "csi0_pix" 64 + - "csi0_rdi" 65 + - "csi1_ahb" 66 + - "csi1" 67 + - "csi1_phy" 68 + - "csi1_pix" 69 + - "csi1_rdi" 70 + - "camss_ahb" 71 + - "camss_vfe_vfe" 72 + - "camss_csi_vfe" 73 + - "iface" 74 + - "bus" 75 + - vdda-supply: 76 + Usage: required 77 + Value type: <phandle> 78 + Definition: A phandle to voltage supply for CSI2. 79 + - iommus: 80 + Usage: required 81 + Value type: <prop-encoded-array> 82 + Definition: A list of phandle and IOMMU specifier pairs. 83 + 84 + * Nodes 85 + 86 + - ports: 87 + Usage: required 88 + Definition: As described in video-interfaces.txt in same directory. 89 + Properties: 90 + - reg: 91 + Usage: required 92 + Value type: <u32> 93 + Definition: Selects CSI2 PHY interface - PHY0 or PHY1. 94 + Endpoint node properties: 95 + - clock-lanes: 96 + Usage: required 97 + Value type: <u32> 98 + Definition: The physical clock lane index. The value 99 + must always be <1> as the physical clock 100 + lane is lane 1. 101 + - data-lanes: 102 + Usage: required 103 + Value type: <prop-encoded-array> 104 + Definition: An array of physical data lanes indexes. 105 + Position of an entry determines the logical 106 + lane number, while the value of an entry 107 + indicates physical lane index. Lane swapping 108 + is supported. 109 + 110 + * An Example 111 + 112 + camss: camss@1b00000 { 113 + compatible = "qcom,msm8916-camss"; 114 + reg = <0x1b0ac00 0x200>, 115 + <0x1b00030 0x4>, 116 + <0x1b0b000 0x200>, 117 + <0x1b00038 0x4>, 118 + <0x1b08000 0x100>, 119 + <0x1b08400 0x100>, 120 + <0x1b0a000 0x500>, 121 + <0x1b00020 0x10>, 122 + <0x1b10000 0x1000>; 123 + reg-names = "csiphy0", 124 + "csiphy0_clk_mux", 125 + "csiphy1", 126 + "csiphy1_clk_mux", 127 + "csid0", 128 + "csid1", 129 + "ispif", 130 + "csi_clk_mux", 131 + "vfe0"; 132 + interrupts = <GIC_SPI 78 0>, 133 + <GIC_SPI 79 0>, 134 + <GIC_SPI 51 0>, 135 + <GIC_SPI 52 0>, 136 + <GIC_SPI 55 0>, 137 + <GIC_SPI 57 0>; 138 + interrupt-names = "csiphy0", 139 + "csiphy1", 140 + "csid0", 141 + "csid1", 142 + "ispif", 143 + "vfe0"; 144 + power-domains = <&gcc VFE_GDSC>; 145 + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, 146 + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, 147 + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, 148 + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, 149 + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, 150 + <&gcc GCC_CAMSS_CSI0_CLK>, 151 + <&gcc GCC_CAMSS_CSI0PHY_CLK>, 152 + <&gcc GCC_CAMSS_CSI0PIX_CLK>, 153 + <&gcc GCC_CAMSS_CSI0RDI_CLK>, 154 + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, 155 + <&gcc GCC_CAMSS_CSI1_CLK>, 156 + <&gcc GCC_CAMSS_CSI1PHY_CLK>, 157 + <&gcc GCC_CAMSS_CSI1PIX_CLK>, 158 + <&gcc GCC_CAMSS_CSI1RDI_CLK>, 159 + <&gcc GCC_CAMSS_AHB_CLK>, 160 + <&gcc GCC_CAMSS_VFE0_CLK>, 161 + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, 162 + <&gcc GCC_CAMSS_VFE_AHB_CLK>, 163 + <&gcc GCC_CAMSS_VFE_AXI_CLK>; 164 + clock-names = "camss_top_ahb", 165 + "ispif_ahb", 166 + "csiphy0_timer", 167 + "csiphy1_timer", 168 + "csi0_ahb", 169 + "csi0", 170 + "csi0_phy", 171 + "csi0_pix", 172 + "csi0_rdi", 173 + "csi1_ahb", 174 + "csi1", 175 + "csi1_phy", 176 + "csi1_pix", 177 + "csi1_rdi", 178 + "camss_ahb", 179 + "camss_vfe_vfe", 180 + "camss_csi_vfe", 181 + "iface", 182 + "bus"; 183 + vdda-supply = <&pm8916_l2>; 184 + iommus = <&apps_iommu 3>; 185 + ports { 186 + #address-cells = <1>; 187 + #size-cells = <0>; 188 + port@0 { 189 + reg = <0>; 190 + csiphy0_ep: endpoint { 191 + clock-lanes = <1>; 192 + data-lanes = <0 2>; 193 + remote-endpoint = <&ov5645_ep>; 194 + }; 195 + }; 196 + }; 197 + };