Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

net-next: dt-binding: dwmac-mediatek: remove fine-tune property

remove fine-tune property in device tree, modify
the corresponding description in dt-binding.

Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Biao Huang and committed by
David S. Miller
a32ed90b 24894bc6

+11 -20
+11 -20
Documentation/devicetree/bindings/net/mediatek-dwmac.txt
··· 22 22 23 23 Optional properties: 24 24 - mediatek,tx-delay-ps: TX clock delay macro value. Default is 0. 25 - It should be defined for rgmii/rgmii-rxid/mii interface. 25 + It should be defined for RGMII/MII interface. 26 26 - mediatek,rx-delay-ps: RX clock delay macro value. Default is 0. 27 - It should be defined for rgmii/rgmii-txid/mii/rmii interface. 28 - Both delay properties need to be a multiple of 170 for fine-tune rgmii, 29 - range 0~31*170. 30 - Both delay properties need to be a multiple of 550 for coarse-tune rgmii, 31 - range 0~31*550. 32 - Both delay properties need to be a multiple of 550 for mii/rmii, 33 - range 0~31*550. 27 + It should be defined for RGMII/MII/RMII interface. 28 + Both delay properties need to be a multiple of 170 for RGMII interface, 29 + or will round down. Range 0~31*170. 30 + Both delay properties need to be a multiple of 550 for MII/RMII interface, 31 + or will round down. Range 0~31*550. 34 32 35 - - mediatek,fine-tune: boolean property, if present indicates that fine delay 36 - is selected for rgmii interface. 37 - If present, tx-delay-ps/rx-delay-ps is 170+/-50ps per stage. 38 - Else tx-delay-ps/rx-delay-ps of coarse delay macro is 0.55+/-0.2ns per stage. 39 - This property do not apply to non-rgmii PHYs. 40 - Only coarse-tune delay is supported for mii/rmii PHYs. 41 - - mediatek,rmii-rxc: boolean property, if present indicates that the rmii 33 + - mediatek,rmii-rxc: boolean property, if present indicates that the RMII 42 34 reference clock, which is from external PHYs, is connected to RXC pin 43 35 on MT2712 SoC. 44 36 Otherwise, is connected to TXC pin. 45 37 - mediatek,txc-inverse: boolean property, if present indicates that 46 - 1. tx clock will be inversed in mii/rgmii case, 38 + 1. tx clock will be inversed in MII/RGMII case, 47 39 2. tx clock inside MAC will be inversed relative to reference clock 48 - which is from external PHYs in rmii case, and it rarely happen. 40 + which is from external PHYs in RMII case, and it rarely happen. 49 41 - mediatek,rxc-inverse: boolean property, if present indicates that 50 - 1. rx clock will be inversed in mii/rgmii case. 51 - 2. reference clock will be inversed when arrived at MAC in rmii case. 42 + 1. rx clock will be inversed in MII/RGMII case. 43 + 2. reference clock will be inversed when arrived at MAC in RMII case. 52 44 - assigned-clocks: mac_main and ptp_ref clocks 53 45 - assigned-clock-parents: parent clocks of the assigned clocks 54 46 ··· 68 76 mediatek,pericfg = <&pericfg>; 69 77 mediatek,tx-delay-ps = <1530>; 70 78 mediatek,rx-delay-ps = <1530>; 71 - mediatek,fine-tune; 72 79 mediatek,rmii-rxc; 73 80 mediatek,txc-inverse; 74 81 mediatek,rxc-inverse;