···258258 select ARCH_HAS_CPUFREQ259259 select CLKDEV_LOOKUP260260 select HAVE_MACH_CLKDEV261261+ select HAVE_TCM261262 select ICST262263 select GENERIC_CLOCKEVENTS263264 select PLAT_VERSATILE···1127112611281127source arch/arm/mm/Kconfig1129112811291129+config ARM_NR_BANKS11301130+ int11311131+ default 16 if ARCH_EP93XX11321132+ default 811331133+11301134config IWMMXT11311135 bool "Enable iWMMXt support"11321136 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4···15651559 legacy IPI broadcast method. Local timers allows the system15661560 accounting to be spread across the timer interval, preventing a15671561 "thundering herd" at every timer tick.15621562+15631563+config ARCH_NR_GPIO15641564+ int15651565+ default 1024 if ARCH_SHMOBILE || ARCH_TEGRA15661566+ default 350 if ARCH_U850015671567+ default 015681568+ help15691569+ Maximum number of GPIOs in the system.15701570+15711571+ If unsure, leave the default value.1568157215691573source kernel/Kconfig.preempt15701574
···11+/*22+ * Copyright 2011 Calxeda, Inc.33+ * Based on PPC version Copyright 2007 MontaVista Software, Inc.44+ *55+ * This program is free software; you can redistribute it and/or modify it66+ * under the terms and conditions of the GNU General Public License,77+ * version 2, as published by the Free Software Foundation.88+ *99+ * This program is distributed in the hope it will be useful, but WITHOUT1010+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or1111+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for1212+ * more details.1313+ *1414+ * You should have received a copy of the GNU General Public License along with1515+ * this program. If not, see <http://www.gnu.org/licenses/>.1616+ */1717+#ifndef ASM_EDAC_H1818+#define ASM_EDAC_H1919+/*2020+ * ECC atomic, DMA, SMP and interrupt safe scrub function.2121+ * Implements the per arch atomic_scrub() that EDAC use for software2222+ * ECC scrubbing. It reads memory and then writes back the original2323+ * value, allowing the hardware to detect and correct memory errors.2424+ */2525+static inline void atomic_scrub(void *va, u32 size)2626+{2727+#if __LINUX_ARM_ARCH__ >= 62828+ unsigned int *virt_addr = va;2929+ unsigned int temp, temp2;3030+ unsigned int i;3131+3232+ for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {3333+ /* Very carefully read and write to memory atomically3434+ * so we are interrupt, DMA and SMP safe.3535+ */3636+ __asm__ __volatile__("\n"3737+ "1: ldrex %0, [%2]\n"3838+ " strex %1, %0, [%2]\n"3939+ " teq %1, #0\n"4040+ " bne 1b\n"4141+ : "=&r"(temp), "=&r"(temp2)4242+ : "r"(virt_addr)4343+ : "cc");4444+ }4545+#endif4646+}4747+4848+#endif
+4
arch/arm/include/asm/gpio.h
···11#ifndef _ARCH_ARM_GPIO_H22#define _ARCH_ARM_GPIO_H3344+#if CONFIG_ARCH_NR_GPIO > 055+#define ARCH_NR_GPIO CONFIG_ARCH_NR_GPIO66+#endif77+48/* not all ARM platforms necessarily support this API ... */59#include <mach/gpio.h>610
-17
arch/arm/include/asm/hardirq.h
···27272828#define arch_irq_stat_cpu smp_irq_stat_cpu29293030-#if NR_IRQS > 5123131-#define HARDIRQ_BITS 103232-#elif NR_IRQS > 2563333-#define HARDIRQ_BITS 93434-#else3535-#define HARDIRQ_BITS 83636-#endif3737-3838-/*3939- * The hardirq mask has to be large enough to have space4040- * for potentially all IRQ sources in the system nesting4141- * on a single CPU:4242- */4343-#if (1 << HARDIRQ_BITS) < NR_IRQS4444-# error HARDIRQ_BITS is too low!4545-#endif4646-4730#define __ARCH_IRQ_EXIT_IRQS_DISABLED 148314932#endif /* __ASM_HARDIRQ_H */
+20
arch/arm/include/asm/opcodes.h
···11+/*22+ * arch/arm/include/asm/opcodes.h33+ *44+ * This program is free software; you can redistribute it and/or modify55+ * it under the terms of the GNU General Public License version 2 as66+ * published by the Free Software Foundation.77+ */88+99+#ifndef __ASM_ARM_OPCODES_H1010+#define __ASM_ARM_OPCODES_H1111+1212+#ifndef __ASSEMBLY__1313+extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);1414+#endif1515+1616+#define ARM_OPCODE_CONDTEST_FAIL 01717+#define ARM_OPCODE_CONDTEST_PASS 11818+#define ARM_OPCODE_CONDTEST_UNCOND 21919+2020+#endif /* __ASM_ARM_OPCODES_H */
+1
arch/arm/include/asm/pgtable.h
···336336 * We provide our own arch_get_unmapped_area to cope with VIPT caches.337337 */338338#define HAVE_ARCH_UNMAPPED_AREA339339+#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN339340340341/*341342 * remap a physical page `pfn' of size `size' with page protection `prot'
···202202#include <linux/slab.h>203203#include <linux/kprobes.h>204204205205+#include <asm/opcodes.h>206206+205207#include "kprobes.h"206208#include "kprobes-test.h"207209···1052105010531051static unsigned long test_check_cc(int cc, unsigned long cpsr)10541052{10551055- unsigned long temp;10531053+ int ret = arm_check_condition(cc << 28, cpsr);1056105410571057- switch (cc) {10581058- case 0x0: /* eq */10591059- return cpsr & PSR_Z_BIT;10601060-10611061- case 0x1: /* ne */10621062- return (~cpsr) & PSR_Z_BIT;10631063-10641064- case 0x2: /* cs */10651065- return cpsr & PSR_C_BIT;10661066-10671067- case 0x3: /* cc */10681068- return (~cpsr) & PSR_C_BIT;10691069-10701070- case 0x4: /* mi */10711071- return cpsr & PSR_N_BIT;10721072-10731073- case 0x5: /* pl */10741074- return (~cpsr) & PSR_N_BIT;10751075-10761076- case 0x6: /* vs */10771077- return cpsr & PSR_V_BIT;10781078-10791079- case 0x7: /* vc */10801080- return (~cpsr) & PSR_V_BIT;10811081-10821082- case 0x8: /* hi */10831083- cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */10841084- return cpsr & PSR_C_BIT;10851085-10861086- case 0x9: /* ls */10871087- cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */10881088- return (~cpsr) & PSR_C_BIT;10891089-10901090- case 0xa: /* ge */10911091- cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */10921092- return (~cpsr) & PSR_N_BIT;10931093-10941094- case 0xb: /* lt */10951095- cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */10961096- return cpsr & PSR_N_BIT;10971097-10981098- case 0xc: /* gt */10991099- temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */11001100- temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */11011101- return (~temp) & PSR_N_BIT;11021102-11031103- case 0xd: /* le */11041104- temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */11051105- temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */11061106- return temp & PSR_N_BIT;11071107-11081108- case 0xe: /* al */11091109- case 0xf: /* unconditional */11101110- return true;11111111- }11121112- BUG();11131113- return false;10551055+ return (ret != ARM_OPCODE_CONDTEST_FAIL);11141056}1115105711161058static int is_last_scenario;···1074112810751129 if (!test_case_is_thumb) {10761130 /* Testing ARM code */10771077- probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0;11311131+ int cc = current_instruction >> 28;11321132+11331133+ probe_should_run = test_check_cc(cc, cpsr) != 0;10781134 if (scenario == 15)10791135 is_last_scenario = true;10801136
+72
arch/arm/kernel/opcodes.c
···11+/*22+ * linux/arch/arm/kernel/opcodes.c33+ *44+ * A32 condition code lookup feature moved from nwfpe/fpopcode.c55+ *66+ * This program is free software; you can redistribute it and/or modify77+ * it under the terms of the GNU General Public License version 2 as88+ * published by the Free Software Foundation.99+ */1010+1111+#include <linux/module.h>1212+#include <asm/opcodes.h>1313+1414+#define ARM_OPCODE_CONDITION_UNCOND 0xf1515+1616+/*1717+ * condition code lookup table1818+ * index into the table is test code: EQ, NE, ... LT, GT, AL, NV1919+ *2020+ * bit position in short is condition code: NZCV2121+ */2222+static const unsigned short cc_map[16] = {2323+ 0xF0F0, /* EQ == Z set */2424+ 0x0F0F, /* NE */2525+ 0xCCCC, /* CS == C set */2626+ 0x3333, /* CC */2727+ 0xFF00, /* MI == N set */2828+ 0x00FF, /* PL */2929+ 0xAAAA, /* VS == V set */3030+ 0x5555, /* VC */3131+ 0x0C0C, /* HI == C set && Z clear */3232+ 0xF3F3, /* LS == C clear || Z set */3333+ 0xAA55, /* GE == (N==V) */3434+ 0x55AA, /* LT == (N!=V) */3535+ 0x0A05, /* GT == (!Z && (N==V)) */3636+ 0xF5FA, /* LE == (Z || (N!=V)) */3737+ 0xFFFF, /* AL always */3838+ 0 /* NV */3939+};4040+4141+/*4242+ * Returns:4343+ * ARM_OPCODE_CONDTEST_FAIL - if condition fails4444+ * ARM_OPCODE_CONDTEST_PASS - if condition passes (including AL)4545+ * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional4646+ * opcode space from v5 onwards4747+ *4848+ * Code that tests whether a conditional instruction would pass its condition4949+ * check should check that return value == ARM_OPCODE_CONDTEST_PASS.5050+ *5151+ * Code that tests if a condition means that the instruction would be executed5252+ * (regardless of conditional or unconditional) should instead check that the5353+ * return value != ARM_OPCODE_CONDTEST_FAIL.5454+ */5555+asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr)5656+{5757+ u32 cc_bits = opcode >> 28;5858+ u32 psr_cond = psr >> 28;5959+ unsigned int ret;6060+6161+ if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) {6262+ if ((cc_map[cc_bits] >> (psr_cond)) & 1)6363+ ret = ARM_OPCODE_CONDTEST_PASS;6464+ else6565+ ret = ARM_OPCODE_CONDTEST_FAIL;6666+ } else {6767+ ret = ARM_OPCODE_CONDTEST_UNCOND;6868+ }6969+7070+ return ret;7171+}7272+EXPORT_SYMBOL_GPL(arm_check_condition);
+88-7
arch/arm/kernel/smp_twd.c
···1010 */1111#include <linux/init.h>1212#include <linux/kernel.h>1313+#include <linux/clk.h>1414+#include <linux/cpufreq.h>1315#include <linux/delay.h>1416#include <linux/device.h>1717+#include <linux/err.h>1518#include <linux/smp.h>1619#include <linux/jiffies.h>1720#include <linux/clockchips.h>···2825/* set up by the platform code */2926void __iomem *twd_base;30272828+static struct clk *twd_clk;3129static unsigned long twd_timer_rate;32303331static struct clock_event_device __percpu **twd_evt;···9389 disable_percpu_irq(clk->irq);9490}95919292+#ifdef CONFIG_CPU_FREQ9393+9494+/*9595+ * Updates clockevent frequency when the cpu frequency changes.9696+ * Called on the cpu that is changing frequency with interrupts disabled.9797+ */9898+static void twd_update_frequency(void *data)9999+{100100+ twd_timer_rate = clk_get_rate(twd_clk);101101+102102+ clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);103103+}104104+105105+static int twd_cpufreq_transition(struct notifier_block *nb,106106+ unsigned long state, void *data)107107+{108108+ struct cpufreq_freqs *freqs = data;109109+110110+ /*111111+ * The twd clock events must be reprogrammed to account for the new112112+ * frequency. The timer is local to a cpu, so cross-call to the113113+ * changing cpu.114114+ */115115+ if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)116116+ smp_call_function_single(freqs->cpu, twd_update_frequency,117117+ NULL, 1);118118+119119+ return NOTIFY_OK;120120+}121121+122122+static struct notifier_block twd_cpufreq_nb = {123123+ .notifier_call = twd_cpufreq_transition,124124+};125125+126126+static int twd_cpufreq_init(void)127127+{128128+ if (!IS_ERR(twd_clk))129129+ return cpufreq_register_notifier(&twd_cpufreq_nb,130130+ CPUFREQ_TRANSITION_NOTIFIER);131131+132132+ return 0;133133+}134134+core_initcall(twd_cpufreq_init);135135+136136+#endif137137+96138static void __cpuinit twd_calibrate_rate(void)97139{98140 unsigned long count;···190140 return IRQ_NONE;191141}192142143143+static struct clk *twd_get_clock(void)144144+{145145+ struct clk *clk;146146+ int err;147147+148148+ clk = clk_get_sys("smp_twd", NULL);149149+ if (IS_ERR(clk)) {150150+ pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));151151+ return clk;152152+ }153153+154154+ err = clk_prepare(clk);155155+ if (err) {156156+ pr_err("smp_twd: clock failed to prepare: %d\n", err);157157+ clk_put(clk);158158+ return ERR_PTR(err);159159+ }160160+161161+ err = clk_enable(clk);162162+ if (err) {163163+ pr_err("smp_twd: clock failed to enable: %d\n", err);164164+ clk_unprepare(clk);165165+ clk_put(clk);166166+ return ERR_PTR(err);167167+ }168168+169169+ return clk;170170+}171171+193172/*194173 * Setup the local clock events for a CPU.195174 */···244165 }245166 }246167247247- twd_calibrate_rate();168168+ if (!twd_clk)169169+ twd_clk = twd_get_clock();170170+171171+ if (!IS_ERR_OR_NULL(twd_clk))172172+ twd_timer_rate = clk_get_rate(twd_clk);173173+ else174174+ twd_calibrate_rate();248175249176 clk->name = "local_timer";250177 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |···258173 clk->rating = 350;259174 clk->set_mode = twd_set_mode;260175 clk->set_next_event = twd_set_next_event;261261- clk->shift = 20;262262- clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift);263263- clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);264264- clk->min_delta_ns = clockevent_delta2ns(0xf, clk);265176266177 this_cpu_clk = __this_cpu_ptr(twd_evt);267178 *this_cpu_clk = clk;268179269269- clockevents_register_device(clk);270270-180180+ clockevents_config_and_register(clk, twd_timer_rate,181181+ 0xf, 0xffffffff);271182 enable_percpu_irq(clk->irq, 0);272183}
+16
arch/arm/kernel/swp_emulate.c
···2525#include <linux/syscalls.h>2626#include <linux/perf_event.h>27272828+#include <asm/opcodes.h>2829#include <asm/traps.h>2930#include <asm/uaccess.h>3031···185184 unsigned int res = 0;186185187186 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);187187+188188+ res = arm_check_condition(instr, regs->ARM_cpsr);189189+ switch (res) {190190+ case ARM_OPCODE_CONDTEST_PASS:191191+ break;192192+ case ARM_OPCODE_CONDTEST_FAIL:193193+ /* Condition failed - return to next instruction */194194+ regs->ARM_pc += 4;195195+ return 0;196196+ case ARM_OPCODE_CONDTEST_UNCOND:197197+ /* If unconditional encoding - not a SWP, undef */198198+ return -EFAULT;199199+ default:200200+ return -EINVAL;201201+ }188202189203 if (current->pid != previous_pid) {190204 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
+19-3
arch/arm/kernel/tcm.c
···180180 */181181void __init tcm_init(void)182182{183183- u32 tcm_status = read_cpuid_tcmstatus();184184- u8 dtcm_banks = (tcm_status >> 16) & 0x03;185185- u8 itcm_banks = (tcm_status & 0x03);183183+ u32 tcm_status;184184+ u8 dtcm_banks;185185+ u8 itcm_banks;186186 size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;187187 size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;188188 char *start;···190190 char *ram;191191 int ret;192192 int i;193193+194194+ /*195195+ * Prior to ARMv5 there is no TCM, and trying to read the status196196+ * register will hang the processor.197197+ */198198+ if (cpu_architecture() < CPU_ARCH_ARMv5) {199199+ if (dtcm_code_sz || itcm_code_sz)200200+ pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "201201+ "ITCM code compiled in, but no TCM present "202202+ "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);203203+ return;204204+ }205205+206206+ tcm_status = read_cpuid_tcmstatus();207207+ dtcm_banks = (tcm_status >> 16) & 0x03;208208+ itcm_banks = (tcm_status & 0x03);193209194210 /* Values greater than 2 for D/ITCM banks are "reserved" */195211 if (dtcm_banks > 2)
+4
arch/arm/mach-integrator/Kconfig
···66 bool "Support Integrator/AP and Integrator/PP2 platforms"77 select CLKSRC_MMIO88 select MIGHT_HAVE_PCI99+ select SERIAL_AMBA_PL0101010+ select SERIAL_AMBA_PL010_CONSOLE911 help1012 Include support for the ARM(R) Integrator/AP and1113 Integrator/PP2 platforms.···1715 select ARCH_CINTEGRATOR1816 select ARM_TIMER_SP8041917 select PLAT_VERSATILE_CLCD1818+ select SERIAL_AMBA_PL0111919+ select SERIAL_AMBA_PL011_CONSOLE2020 help2121 Include support for the ARM(R) Integrator CP platform.2222
+14-5
arch/arm/mach-integrator/core.c
···2929#include <mach/cm.h>3030#include <asm/system.h>3131#include <asm/leds.h>3232+#include <asm/mach-types.h>3233#include <asm/mach/time.h>3334#include <asm/pgtable.h>3435···4544 .flags = IORESOURCE_MEM,4645 },4746 .irq = { IRQ_RTCINT, NO_IRQ },4848- .periphid = 0x00041030,4947};50485149static struct amba_device uart0_device = {···5858 .flags = IORESOURCE_MEM,5959 },6060 .irq = { IRQ_UARTINT0, NO_IRQ },6161- .periphid = 0x0041010,6261};63626463static struct amba_device uart1_device = {···7172 .flags = IORESOURCE_MEM,7273 },7374 .irq = { IRQ_UARTINT1, NO_IRQ },7474- .periphid = 0x0041010,7575};76767777static struct amba_device kmi0_device = {···8385 .flags = IORESOURCE_MEM,8486 },8587 .irq = { IRQ_KMIINT0, NO_IRQ },8686- .periphid = 0x00041050,8788};88898990static struct amba_device kmi1_device = {···9598 .flags = IORESOURCE_MEM,9699 },97100 .irq = { IRQ_KMIINT1, NO_IRQ },9898- .periphid = 0x00041050,99101};100102101103static struct amba_device *amba_devs[] __initdata = {···152156static int __init integrator_init(void)153157{154158 int i;159159+160160+ /*161161+ * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to162162+ * hard-code them. The Integator/CP and forward have proper cell IDs.163163+ * Else we leave them undefined to the bus driver can autoprobe them.164164+ */165165+ if (machine_is_integrator()) {166166+ rtc_device.periphid = 0x00041030;167167+ uart0_device.periphid = 0x00041010;168168+ uart1_device.periphid = 0x00041010;169169+ kmi0_device.periphid = 0x00041050;170170+ kmi1_device.periphid = 0x00041050;171171+ }155172156173 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {157174 struct amba_device *d = amba_devs[i];
+3-3
arch/arm/mach-kirkwood/sheevaplug-setup.c
···107107 kirkwood_init();108108109109 /* setup gpio pin select */110110- if (machine_is_sheeva_esata())110110+ if (machine_is_esata_sheevaplug())111111 kirkwood_mpp_conf(sheeva_esata_mpp_config);112112 else113113 kirkwood_mpp_conf(sheevaplug_mpp_config);···123123 kirkwood_ge00_init(&sheevaplug_ge00_data);124124125125 /* honor lower power consumption for plugs with out eSATA */126126- if (machine_is_sheeva_esata())126126+ if (machine_is_esata_sheevaplug())127127 kirkwood_sata_init(&sheeva_esata_sata_data);128128129129 /* enable sd wp and sd cd on plugs with esata */130130- if (machine_is_sheeva_esata())130130+ if (machine_is_esata_sheevaplug())131131 kirkwood_sdio_init(&sheeva_esata_mvsdio_data);132132 else133133 kirkwood_sdio_init(&sheevaplug_mvsdio_data);
+1-1
arch/arm/mach-orion5x/ts209-setup.c
···178178179179static int __init qnap_ts209_pci_init(void)180180{181181- if (machine_is_ts_x09())181181+ if (machine_is_ts209())182182 pci_common_init(&qnap_ts209_pci);183183184184 return 0;
···11#ifndef __ASM_ARCH_GPIO_H22#define __ASM_ARCH_GPIO_H3344-/*55- * 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough66- * room for a couple of GPIO expanders.77- */88-#define ARCH_NR_GPIOS 35094105#endif /* __ASM_ARCH_GPIO_H */
+39-19
arch/arm/mm/fault.c
···231231232232static int __kprobes233233__do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,234234- struct task_struct *tsk)234234+ unsigned int flags, struct task_struct *tsk)235235{236236 struct vm_area_struct *vma;237237 int fault;···253253 goto out;254254 }255255256256- /*257257- * If for any reason at all we couldn't handle the fault, make258258- * sure we exit gracefully rather than endlessly redo the fault.259259- */260260- fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & FSR_WRITE) ? FAULT_FLAG_WRITE : 0);261261- if (unlikely(fault & VM_FAULT_ERROR))262262- return fault;263263- if (fault & VM_FAULT_MAJOR)264264- tsk->maj_flt++;265265- else266266- tsk->min_flt++;267267- return fault;256256+ return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);268257269258check_stack:270259 if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))···268279 struct task_struct *tsk;269280 struct mm_struct *mm;270281 int fault, sig, code;282282+ int write = fsr & FSR_WRITE;283283+ unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |284284+ (write ? FAULT_FLAG_WRITE : 0);271285272286 if (notify_page_fault(regs, fsr))273287 return 0;···297305 if (!down_read_trylock(&mm->mmap_sem)) {298306 if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc))299307 goto no_context;308308+retry:300309 down_read(&mm->mmap_sem);301310 } else {302311 /*···313320#endif314321 }315322316316- fault = __do_page_fault(mm, addr, fsr, tsk);317317- up_read(&mm->mmap_sem);323323+ fault = __do_page_fault(mm, addr, fsr, flags, tsk);324324+325325+ /* If we need to retry but a fatal signal is pending, handle the326326+ * signal first. We do not need to release the mmap_sem because327327+ * it would already be released in __lock_page_or_retry in328328+ * mm/filemap.c. */329329+ if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))330330+ return 0;331331+332332+ /*333333+ * Major/minor page fault accounting is only done on the334334+ * initial attempt. If we go through a retry, it is extremely335335+ * likely that the page will be found in page cache at that point.336336+ */318337319338 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);320320- if (fault & VM_FAULT_MAJOR)321321- perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, addr);322322- else if (fault & VM_FAULT_MINOR)323323- perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, addr);339339+ if (flags & FAULT_FLAG_ALLOW_RETRY) {340340+ if (fault & VM_FAULT_MAJOR) {341341+ tsk->maj_flt++;342342+ perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,343343+ regs, addr);344344+ } else {345345+ tsk->min_flt++;346346+ perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,347347+ regs, addr);348348+ }349349+ if (fault & VM_FAULT_RETRY) {350350+ /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk351351+ * of starvation. */352352+ flags &= ~FAULT_FLAG_ALLOW_RETRY;353353+ goto retry;354354+ }355355+ }356356+357357+ up_read(&mm->mmap_sem);324358325359 /*326360 * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR
+168-5
arch/arm/mm/mmap.c
···1111#include <linux/random.h>1212#include <asm/cachetype.h>13131414+static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,1515+ unsigned long pgoff)1616+{1717+ unsigned long base = addr & ~(SHMLBA-1);1818+ unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1);1919+2020+ if (base + off <= addr)2121+ return base + off;2222+2323+ return base - off;2424+}2525+1426#define COLOUR_ALIGN(addr,pgoff) \1527 ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \1628 (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))2929+3030+/* gap between mmap and stack */3131+#define MIN_GAP (128*1024*1024UL)3232+#define MAX_GAP ((TASK_SIZE)/6*5)3333+3434+static int mmap_is_legacy(void)3535+{3636+ if (current->personality & ADDR_COMPAT_LAYOUT)3737+ return 1;3838+3939+ if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)4040+ return 1;4141+4242+ return sysctl_legacy_va_layout;4343+}4444+4545+static unsigned long mmap_base(unsigned long rnd)4646+{4747+ unsigned long gap = rlimit(RLIMIT_STACK);4848+4949+ if (gap < MIN_GAP)5050+ gap = MIN_GAP;5151+ else if (gap > MAX_GAP)5252+ gap = MAX_GAP;5353+5454+ return PAGE_ALIGN(TASK_SIZE - gap - rnd);5555+}17561857/*1958 * We need to ensure that shared mappings are correctly aligned to···10768 if (len > mm->cached_hole_size) {10869 start_addr = addr = mm->free_area_cache;10970 } else {110110- start_addr = addr = TASK_UNMAPPED_BASE;7171+ start_addr = addr = mm->mmap_base;11172 mm->cached_hole_size = 0;11273 }113113- /* 8 bits of randomness in 20 address space bits */114114- if ((current->flags & PF_RANDOMIZE) &&115115- !(current->personality & ADDR_NO_RANDOMIZE))116116- addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT;1177411875full_search:11976 if (do_align)···146111 }147112}148113114114+unsigned long115115+arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,116116+ const unsigned long len, const unsigned long pgoff,117117+ const unsigned long flags)118118+{119119+ struct vm_area_struct *vma;120120+ struct mm_struct *mm = current->mm;121121+ unsigned long addr = addr0;122122+ int do_align = 0;123123+ int aliasing = cache_is_vipt_aliasing();124124+125125+ /*126126+ * We only need to do colour alignment if either the I or D127127+ * caches alias.128128+ */129129+ if (aliasing)130130+ do_align = filp || (flags & MAP_SHARED);131131+132132+ /* requested length too big for entire address space */133133+ if (len > TASK_SIZE)134134+ return -ENOMEM;135135+136136+ if (flags & MAP_FIXED) {137137+ if (aliasing && flags & MAP_SHARED &&138138+ (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))139139+ return -EINVAL;140140+ return addr;141141+ }142142+143143+ /* requesting a specific address */144144+ if (addr) {145145+ if (do_align)146146+ addr = COLOUR_ALIGN(addr, pgoff);147147+ else148148+ addr = PAGE_ALIGN(addr);149149+ vma = find_vma(mm, addr);150150+ if (TASK_SIZE - len >= addr &&151151+ (!vma || addr + len <= vma->vm_start))152152+ return addr;153153+ }154154+155155+ /* check if free_area_cache is useful for us */156156+ if (len <= mm->cached_hole_size) {157157+ mm->cached_hole_size = 0;158158+ mm->free_area_cache = mm->mmap_base;159159+ }160160+161161+ /* either no address requested or can't fit in requested address hole */162162+ addr = mm->free_area_cache;163163+ if (do_align) {164164+ unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff);165165+ addr = base + len;166166+ }167167+168168+ /* make sure it can fit in the remaining address space */169169+ if (addr > len) {170170+ vma = find_vma(mm, addr-len);171171+ if (!vma || addr <= vma->vm_start)172172+ /* remember the address as a hint for next time */173173+ return (mm->free_area_cache = addr-len);174174+ }175175+176176+ if (mm->mmap_base < len)177177+ goto bottomup;178178+179179+ addr = mm->mmap_base - len;180180+ if (do_align)181181+ addr = COLOUR_ALIGN_DOWN(addr, pgoff);182182+183183+ do {184184+ /*185185+ * Lookup failure means no vma is above this address,186186+ * else if new region fits below vma->vm_start,187187+ * return with success:188188+ */189189+ vma = find_vma(mm, addr);190190+ if (!vma || addr+len <= vma->vm_start)191191+ /* remember the address as a hint for next time */192192+ return (mm->free_area_cache = addr);193193+194194+ /* remember the largest hole we saw so far */195195+ if (addr + mm->cached_hole_size < vma->vm_start)196196+ mm->cached_hole_size = vma->vm_start - addr;197197+198198+ /* try just below the current vma->vm_start */199199+ addr = vma->vm_start - len;200200+ if (do_align)201201+ addr = COLOUR_ALIGN_DOWN(addr, pgoff);202202+ } while (len < vma->vm_start);203203+204204+bottomup:205205+ /*206206+ * A failed mmap() very likely causes application failure,207207+ * so fall back to the bottom-up function here. This scenario208208+ * can happen with large stack limits and large mmap()209209+ * allocations.210210+ */211211+ mm->cached_hole_size = ~0UL;212212+ mm->free_area_cache = TASK_UNMAPPED_BASE;213213+ addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);214214+ /*215215+ * Restore the topdown base:216216+ */217217+ mm->free_area_cache = mm->mmap_base;218218+ mm->cached_hole_size = ~0UL;219219+220220+ return addr;221221+}222222+223223+void arch_pick_mmap_layout(struct mm_struct *mm)224224+{225225+ unsigned long random_factor = 0UL;226226+227227+ /* 8 bits of randomness in 20 address space bits */228228+ if ((current->flags & PF_RANDOMIZE) &&229229+ !(current->personality & ADDR_NO_RANDOMIZE))230230+ random_factor = (get_random_int() % (1 << 8)) << PAGE_SHIFT;231231+232232+ if (mmap_is_legacy()) {233233+ mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;234234+ mm->get_unmapped_area = arch_get_unmapped_area;235235+ mm->unmap_area = arch_unmap_area;236236+ } else {237237+ mm->mmap_base = mmap_base(random_factor);238238+ mm->get_unmapped_area = arch_get_unmapped_area_topdown;239239+ mm->unmap_area = arch_unmap_area_topdown;240240+ }241241+}149242150243/*151244 * You really shouldn't be using read() or write() on /dev/mem. This
···2020 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.2121*/22222323+#include <asm/opcodes.h>2424+2325/* This is the kernel's entry point into the floating point emulator.2426It is called from the kernel with code similar to this:2527···8381 mov r6, r0 @ save the opcode8482emulate:8583 ldr r1, [sp, #S_PSR] @ fetch the PSR8686- bl checkCondition @ check the condition8787- cmp r0, #0 @ r0 = 0 ==> condition failed8484+ bl arm_check_condition @ check the condition8585+ cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed?88868987 @ if condition code failed to match, next insn9090- beq next @ get the next instruction;8888+ bne next @ get the next instruction;91899290 mov r0, r6 @ prepare for EmulateAll()9391 bl EmulateAll @ emulate the instruction
-26
arch/arm/nwfpe/fpopcode.c
···6161 0x41200000 /* single 10.0 */6262};63636464-/* condition code lookup table6565- index into the table is test code: EQ, NE, ... LT, GT, AL, NV6666- bit position in short is condition code: NZCV */6767-static const unsigned short aCC[16] = {6868- 0xF0F0, // EQ == Z set6969- 0x0F0F, // NE7070- 0xCCCC, // CS == C set7171- 0x3333, // CC7272- 0xFF00, // MI == N set7373- 0x00FF, // PL7474- 0xAAAA, // VS == V set7575- 0x5555, // VC7676- 0x0C0C, // HI == C set && Z clear7777- 0xF3F3, // LS == C clear || Z set7878- 0xAA55, // GE == (N==V)7979- 0x55AA, // LT == (N!=V)8080- 0x0A05, // GT == (!Z && (N==V))8181- 0xF5FA, // LE == (Z || (N!=V))8282- 0xFFFF, // AL always8383- 0 // NV8484-};8585-8686-unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes)8787-{8888- return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1;8989-}
-3
arch/arm/nwfpe/fpopcode.h
···475475 return (nRc);476476}477477478478-extern unsigned int checkCondition(const unsigned int opcode,479479- const unsigned int ccodes);480480-481478extern const float64 float64Constant[];482479extern const float32 float32Constant[];483480