Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: iop32x: enable multiplatform support

After iop32x was converted to the generic multi-irq entry
code, nothing really stops us from building it into a
generic kernel.

The two last headers can simply be removed, the mach/irqs.h
gets replaced with the sparse-irq intiialization from the
board specific .nr_irqs value, and the decompressor debug
output can use the debug_ll hack that all other platforms
use.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+19 -59
-14
arch/arm/Kconfig
··· 356 356 Support for systems based on the DC21285 companion chip 357 357 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 358 358 359 - config ARCH_IOP32X 360 - bool "IOP32x-based" 361 - select CPU_XSCALE 362 - select GPIO_IOP 363 - select GPIOLIB 364 - select FORCE_PCI 365 - select PLAT_IOP 366 - help 367 - Support for Intel's 80219 and IOP32X (XScale) family of 368 - processors. 369 - 370 359 config ARCH_IXP4XX 371 360 bool "IXP4xx-based" 372 361 select ARCH_SUPPORTS_BIG_ENDIAN ··· 675 686 676 687 # Definitions to make life easier 677 688 config ARCH_ACORN 678 - bool 679 - 680 - config PLAT_IOP 681 689 bool 682 690 683 691 config PLAT_ORION
+1
arch/arm/configs/iop32x_defconfig
··· 7 7 CONFIG_MODULES=y 8 8 CONFIG_MODULE_UNLOAD=y 9 9 # CONFIG_BLK_DEV_BSG is not set 10 + # CONFIG_ARCH_MULTI_V7 is not set 10 11 CONFIG_ARCH_IOP32X=y 11 12 CONFIG_MACH_GLANTANK=y 12 13 CONFIG_ARCH_IQ80321=y
+11 -6
arch/arm/mach-iop32x/Kconfig
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 + menuconfig ARCH_IOP32X 3 + bool "IOP32x-based platforms" 4 + depends on ARCH_MULTI_V5 5 + select CPU_XSCALE 6 + select GPIO_IOP 7 + select GPIOLIB 8 + select FORCE_PCI 9 + help 10 + Support for Intel's 80219 and IOP32X (XScale) family of 11 + processors. 12 + 2 13 if ARCH_IOP32X 3 - 4 - menu "IOP32x Implementation Options" 5 - 6 - comment "IOP32x Platform Types" 7 14 8 15 config MACH_EP80219 9 16 bool ··· 48 41 Say Y here if you want to run your kernel on the Lanner EM7210 49 42 board. Say also Y here if you have a SS4000e Baxter Creek NAS 50 43 appliance." 51 - 52 - endmenu 53 44 54 45 endif
+1
arch/arm/mach-iop32x/em7210.c
··· 223 223 224 224 MACHINE_START(EM7210, "Lanner EM7210") 225 225 .atag_offset = 0x100, 226 + .nr_irqs = IOP32X_NR_IRQS, 226 227 .map_io = em7210_map_io, 227 228 .init_irq = iop32x_init_irq, 228 229 .init_time = em7210_timer_init,
+1
arch/arm/mach-iop32x/glantank.c
··· 205 205 MACHINE_START(GLANTANK, "GLAN Tank") 206 206 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 207 207 .atag_offset = 0x100, 208 + .nr_irqs = IOP32X_NR_IRQS, 208 209 .map_io = glantank_map_io, 209 210 .init_irq = iop32x_init_irq, 210 211 .init_time = glantank_timer_init,
-14
arch/arm/mach-iop32x/include/mach/irqs.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * arch/arm/mach-iop32x/include/mach/irqs.h 4 - * 5 - * Author: Rory Bolt <rorybolt@pacbell.net> 6 - * Copyright: (C) 2002 Rory Bolt 7 - */ 8 - 9 - #ifndef __IRQS_H 10 - #define __IRQS_H 11 - 12 - #define NR_IRQS 33 13 - 14 - #endif
-25
arch/arm/mach-iop32x/include/mach/uncompress.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * arch/arm/mach-iop32x/include/mach/uncompress.h 4 - */ 5 - 6 - #include <asm/types.h> 7 - #include <asm/mach-types.h> 8 - #include <linux/serial_reg.h> 9 - 10 - #define uart_base ((volatile u8 *)0xfe800000) 11 - 12 - #define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE) 13 - 14 - static inline void putc(char c) 15 - { 16 - while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) 17 - barrier(); 18 - uart_base[UART_TX] = c; 19 - } 20 - 21 - static inline void flush(void) 22 - { 23 - } 24 - 25 - #define arch_decomp_setup() do { } while (0)
+1
arch/arm/mach-iop32x/iq31244.c
··· 324 324 MACHINE_START(EP80219, "Intel EP80219") 325 325 /* Maintainer: Intel Corp. */ 326 326 .atag_offset = 0x100, 327 + .nr_irqs = IOP32X_NR_IRQS, 327 328 .map_io = iq31244_map_io, 328 329 .init_irq = iop32x_init_irq, 329 330 .init_time = iq31244_timer_init,
+1
arch/arm/mach-iop32x/iq80321.c
··· 183 183 MACHINE_START(IQ80321, "Intel IQ80321") 184 184 /* Maintainer: Intel Corp. */ 185 185 .atag_offset = 0x100, 186 + .nr_irqs = IOP32X_NR_IRQS, 186 187 .map_io = iq80321_map_io, 187 188 .init_irq = iop32x_init_irq, 188 189 .init_time = iq80321_timer_init,
+2
arch/arm/mach-iop32x/irqs.h
··· 43 43 #define IRQ_IOP32X_XINT3 IOP_IRQ(30) 44 44 #define IRQ_IOP32X_HPI IOP_IRQ(31) 45 45 46 + #define IOP32X_NR_IRQS (IRQ_IOP32X_HPI + 1) 47 + 46 48 #endif
+1
arch/arm/mach-iop32x/n2100.c
··· 358 358 MACHINE_START(N2100, "Thecus N2100") 359 359 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 360 360 .atag_offset = 0x100, 361 + .nr_irqs = IOP32X_NR_IRQS, 361 362 .map_io = n2100_map_io, 362 363 .init_irq = iop32x_init_irq, 363 364 .init_time = n2100_timer_init,