tjh.dev
+7
arch/arm/mach-shmobile/setup-r8a7740.c
+7
arch/arm/mach-shmobile/setup-r8a7740.c
···
800
800
void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
801
801
void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
802
802
803
+
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
804
+
void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
805
+
void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
806
+
807
+
gic_init(0, 29, gic_dist_base, gic_cpu_base);
808
+
#else
803
809
irqchip_init();
810
+
#endif
804
811
805
812
/* route signals to GIC */
806
813
iowrite32(0x0, pfc_inta_ctrl);
+3
arch/arm/mach-shmobile/setup-sh73a0.c
+3
arch/arm/mach-shmobile/setup-sh73a0.c
···
595
595
596
596
static struct renesas_intc_irqpin_config irqpin0_platform_data = {
597
597
.irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */
598
+
.control_parent = true,
598
599
};
599
600
600
601
static struct resource irqpin0_resources[] = {
···
657
656
658
657
static struct renesas_intc_irqpin_config irqpin2_platform_data = {
659
658
.irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */
659
+
.control_parent = true,
660
660
};
661
661
662
662
static struct resource irqpin2_resources[] = {
···
688
686
689
687
static struct renesas_intc_irqpin_config irqpin3_platform_data = {
690
688
.irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */
689
+
.control_parent = true,
691
690
};
692
691
693
692
static struct resource irqpin3_resources[] = {