···302302{303303 ctrl_outl(pc, UBC_BARA);304304305305+#ifdef CONFIG_MMU305306 /* We don't have any ASID settings for the SH-2! */306307 if (cpu_data->type != CPU_SH7604)307308 ctrl_outb(asid, UBC_BASRA);309309+#endif308310309311 ctrl_outl(0, UBC_BAMRA);310312···349347 }350348#endif351349350350+#ifdef CONFIG_MMU352351 /*353352 * Restore the kernel mode register354353 * k7 (r7_bank1)···357354 asm volatile("ldc %0, r7_bank"358355 : /* no output */359356 : "r" (task_thread_info(next)));357357+#endif360358361361-#ifdef CONFIG_MMU362359 /* If no tasks are using the UBC, we're done */363360 if (ubc_usercnt == 0)364361 /* If no tasks are using the UBC, we're done */;365362 else if (next->thread.ubc_pc && next->mm) {366366- ubc_set_tracing(next->mm->context & MMU_CONTEXT_ASID_MASK,367367- next->thread.ubc_pc);363363+ int asid = 0;364364+#ifdef CONFIG_MMU365365+ asid |= next->mm->context & MMU_CONTEXT_ASID_MASK;366366+#endif367367+ ubc_set_tracing(asid, next->thread.ubc_pc);368368 } else {369369 ctrl_outw(0, UBC_BBRA);370370 ctrl_outw(0, UBC_BBRB);371371 }372372-#endif373372374373 return prev;375374}
+4-6
arch/sh/kernel/sh_ksyms.c
···7979DECLARE_EXPORT(__movstr_i4_even);8080DECLARE_EXPORT(__movstr_i4_odd);8181DECLARE_EXPORT(__movstrSI12_i4);8282+#endif82838484+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)8385/* needed by some modules */8486EXPORT_SYMBOL(flush_cache_all);8587EXPORT_SYMBOL(flush_cache_range);8688EXPORT_SYMBOL(flush_dcache_page);8789EXPORT_SYMBOL(__flush_purge_region);8888-EXPORT_SYMBOL(clear_user_page);8990#endif90919191-#if defined(CONFIG_SH7705_CACHE_32KB)9292-EXPORT_SYMBOL(flush_cache_all);9393-EXPORT_SYMBOL(flush_cache_range);9494-EXPORT_SYMBOL(flush_dcache_page);9595-EXPORT_SYMBOL(__flush_purge_region);9292+#ifdef CONFIG_MMU9393+EXPORT_SYMBOL(clear_user_page);9694#endif97959896EXPORT_SYMBOL(flush_tlb_page);
+1-1
arch/sh/kernel/sys_sh.c
···4444 return error;4545}46464747-#if defined(HAVE_ARCH_UNMAPPED_AREA)4747+#if defined(HAVE_ARCH_UNMAPPED_AREA) && defined(CONFIG_MMU)4848/*4949 * To avoid cache alias, we map the shard page with same color.5050 */
+1-1
arch/sh/mm/Kconfig
···194194195195config 32BIT196196 bool "Support 32-bit physical addressing through PMB"197197- depends on CPU_SH4A197197+ depends on CPU_SH4A && MMU198198 default y199199 help200200 If you say Y here, physical addressing will be extended to