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MIPS: Add CPU support for Loongson1C

Loongson1C is a 32-bit SoC designed by Loongson Technology Co., Ltd,
with many features similar to Loongson1B.

Signed-off-by: Yang Ling <gnaygnil@gmail.com>
Cc: paul.burton@imgtec.com
Cc: markos.chandras@imgtec.com
Cc: james.hogan@imgtec.com
Cc: kumba@gentoo.org
Cc: macro@imgtec.com
Cc: david.daney@cavium.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13303/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Yang Ling and committed by
Ralf Baechle a1ca8386 fd6ecf42

+3 -1
+2 -1
arch/mips/include/asm/cpu-type.h
··· 24 24 case CPU_LOONGSON3: 25 25 #endif 26 26 27 - #ifdef CONFIG_SYS_HAS_CPU_LOONGSON1B 27 + #if defined(CONFIG_SYS_HAS_CPU_LOONGSON1B) || \ 28 + defined(CONFIG_SYS_HAS_CPU_LOONGSON1C) 28 29 case CPU_LOONGSON1: 29 30 #endif 30 31
+1
arch/mips/include/asm/cpu.h
··· 240 240 #define PRID_REV_VR4130 0x0080 241 241 #define PRID_REV_34K_V1_0_2 0x0022 242 242 #define PRID_REV_LOONGSON1B 0x0020 243 + #define PRID_REV_LOONGSON1C 0x0020 /* Same as Loongson-1B */ 243 244 #define PRID_REV_LOONGSON2E 0x0002 244 245 #define PRID_REV_LOONGSON2F 0x0003 245 246 #define PRID_REV_LOONGSON3A_R1 0x0005