commit a0652eb205b7ac13429d63bcc42806115d393632 · tjh.dev/kernel

+6 -4

Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml

··· 15 15 16 16 properties: 17 17 compatible: 18 - enum: 19 - - fsl,imx23-ocotp 20 - - fsl,imx28-ocotp 18 + items: 19 + - enum: 20 + - fsl,imx23-ocotp 21 + - fsl,imx28-ocotp 22 + - const: fsl,ocotp 21 23 22 24 reg: 23 25 maxItems: 1 ··· 37 35 examples: 38 36 - | 39 37 ocotp: efuse@8002c000 { 40 - compatible = "fsl,imx28-ocotp"; 38 + compatible = "fsl,imx28-ocotp", "fsl,ocotp"; 41 39 #address-cells = <1>; 42 40 #size-cells = <1>; 43 41 reg = <0x8002c000 0x2000>;

+26 -11

drivers/iio/accel/kionix-kx022a.c

··· 393 393 * (range / 2^bits) * g = (range / 2^bits) * 9.80665 m/s^2 394 394 * => KX022A uses 16 bit (HiRes mode - assume the low 8 bits are zeroed 395 395 * in low-power mode(?) ) 396 - * => +/-2G => 4 / 2^16 * 9,80665 * 10^6 (to scale to micro) 397 - * => +/-2G - 598.550415 398 - * +/-4G - 1197.10083 399 - * +/-8G - 2394.20166 400 - * +/-16G - 4788.40332 396 + * => +/-2G => 4 / 2^16 * 9,80665 397 + * => +/-2G - 0.000598550415 398 + * +/-4G - 0.00119710083 399 + * +/-8G - 0.00239420166 400 + * +/-16G - 0.00478840332 401 401 */ 402 402 static const int kx022a_scale_table[][2] = { 403 - { 598, 550415 }, 404 - { 1197, 100830 }, 405 - { 2394, 201660 }, 406 - { 4788, 403320 }, 403 + { 0, 598550 }, 404 + { 0, 1197101 }, 405 + { 0, 2394202 }, 406 + { 0, 4788403 }, 407 407 }; 408 408 409 409 static int kx022a_read_avail(struct iio_dev *indio_dev, ··· 422 422 *vals = (const int *)kx022a_scale_table; 423 423 *length = ARRAY_SIZE(kx022a_scale_table) * 424 424 ARRAY_SIZE(kx022a_scale_table[0]); 425 - *type = IIO_VAL_INT_PLUS_MICRO; 425 + *type = IIO_VAL_INT_PLUS_NANO; 426 426 return IIO_AVAIL_LIST; 427 427 default: 428 428 return -EINVAL; ··· 483 483 mutex_unlock(&data->mutex); 484 484 485 485 return ret; 486 + } 487 + 488 + static int kx022a_write_raw_get_fmt(struct iio_dev *idev, 489 + struct iio_chan_spec const *chan, 490 + long mask) 491 + { 492 + switch (mask) { 493 + case IIO_CHAN_INFO_SCALE: 494 + return IIO_VAL_INT_PLUS_NANO; 495 + case IIO_CHAN_INFO_SAMP_FREQ: 496 + return IIO_VAL_INT_PLUS_MICRO; 497 + default: 498 + return -EINVAL; 499 + } 486 500 } 487 501 488 502 static int kx022a_write_raw(struct iio_dev *idev, ··· 643 629 644 630 kx022a_reg2scale(regval, val, val2); 645 631 646 - return IIO_VAL_INT_PLUS_MICRO; 632 + return IIO_VAL_INT_PLUS_NANO; 647 633 } 648 634 649 635 return -EINVAL; ··· 870 856 static const struct iio_info kx022a_info = { 871 857 .read_raw = &kx022a_read_raw, 872 858 .write_raw = &kx022a_write_raw, 859 + .write_raw_get_fmt = &kx022a_write_raw_get_fmt, 873 860 .read_avail = &kx022a_read_avail, 874 861 875 862 .validate_trigger = iio_validate_own_trigger,

+4

drivers/iio/adc/imx93_adc.c

··· 93 93 IMX93_ADC_CHAN(1), 94 94 IMX93_ADC_CHAN(2), 95 95 IMX93_ADC_CHAN(3), 96 + IMX93_ADC_CHAN(4), 97 + IMX93_ADC_CHAN(5), 98 + IMX93_ADC_CHAN(6), 99 + IMX93_ADC_CHAN(7), 96 100 }; 97 101 98 102 static void imx93_adc_power_down(struct imx93_adc *adc)

+4 -4

drivers/iio/adc/mcp3564.c

··· 918 918 mutex_unlock(&adc->lock); 919 919 return ret; 920 920 case IIO_CHAN_INFO_CALIBBIAS: 921 - if (val < mcp3564_calib_bias[0] && val > mcp3564_calib_bias[2]) 921 + if (val < mcp3564_calib_bias[0] || val > mcp3564_calib_bias[2]) 922 922 return -EINVAL; 923 923 924 924 mutex_lock(&adc->lock); ··· 928 928 mutex_unlock(&adc->lock); 929 929 return ret; 930 930 case IIO_CHAN_INFO_CALIBSCALE: 931 - if (val < mcp3564_calib_scale[0] && val > mcp3564_calib_scale[2]) 931 + if (val < mcp3564_calib_scale[0] || val > mcp3564_calib_scale[2]) 932 932 return -EINVAL; 933 933 934 934 if (adc->calib_scale == val) ··· 1122 1122 enum mcp3564_ids ids; 1123 1123 int ret = 0; 1124 1124 unsigned int tmp = 0x01; 1125 - bool err = true; 1125 + bool err = false; 1126 1126 1127 1127 /* 1128 1128 * The address is set on a per-device basis by fuses in the factory, ··· 1509 1509 module_spi_driver(mcp3564_driver); 1510 1510 1511 1511 MODULE_AUTHOR("Marius Cristea <marius.cristea@microchip.com>"); 1512 - MODULE_DESCRIPTION("Microchip MCP346x/MCP346xR and MCP356x/MCP346xR ADCs"); 1512 + MODULE_DESCRIPTION("Microchip MCP346x/MCP346xR and MCP356x/MCP356xR ADCs"); 1513 1513 MODULE_LICENSE("GPL v2");

+15 -1

drivers/iio/adc/meson_saradc.c

··· 1241 1241 .cmv_select = 1, 1242 1242 }; 1243 1243 1244 + static const struct meson_sar_adc_param meson_sar_adc_axg_param = { 1245 + .has_bl30_integration = true, 1246 + .clock_rate = 1200000, 1247 + .bandgap_reg = MESON_SAR_ADC_REG11, 1248 + .regmap_config = &meson_sar_adc_regmap_config_gxbb, 1249 + .resolution = 12, 1250 + .disable_ring_counter = 1, 1251 + .has_reg11 = true, 1252 + .vref_volatge = 1, 1253 + .has_vref_select = true, 1254 + .vref_select = VREF_VDDA, 1255 + .cmv_select = 1, 1256 + }; 1257 + 1244 1258 static const struct meson_sar_adc_param meson_sar_adc_g12a_param = { 1245 1259 .has_bl30_integration = false, 1246 1260 .clock_rate = 1200000, ··· 1299 1285 }; 1300 1286 1301 1287 static const struct meson_sar_adc_data meson_sar_adc_axg_data = { 1302 - .param = &meson_sar_adc_gxl_param, 1288 + .param = &meson_sar_adc_axg_param, 1303 1289 .name = "meson-axg-saradc", 1304 1290 }; 1305 1291

+3 -1

drivers/iio/adc/ti_am335x_adc.c

··· 670 670 platform_set_drvdata(pdev, indio_dev); 671 671 672 672 err = tiadc_request_dma(pdev, adc_dev); 673 - if (err && err == -EPROBE_DEFER) 673 + if (err && err != -ENODEV) { 674 + dev_err_probe(&pdev->dev, err, "DMA request failed\n"); 674 675 goto err_dma; 676 + } 675 677 676 678 return 0; 677 679

+10

drivers/iio/buffer/industrialio-triggered-buffer.c

··· 46 46 struct iio_buffer *buffer; 47 47 int ret; 48 48 49 + /* 50 + * iio_triggered_buffer_cleanup() assumes that the buffer allocated here 51 + * is assigned to indio_dev->buffer but this is only the case if this 52 + * function is the first caller to iio_device_attach_buffer(). If 53 + * indio_dev->buffer is already set then we can't proceed otherwise the 54 + * cleanup function will try to free a buffer that was not allocated here. 55 + */ 56 + if (indio_dev->buffer) 57 + return -EADDRINUSE; 58 + 49 59 buffer = iio_kfifo_allocate(); 50 60 if (!buffer) { 51 61 ret = -ENOMEM;

+2 -2

drivers/iio/common/ms_sensors/ms_sensors_i2c.c

··· 15 15 /* Conversion times in us */ 16 16 static const u16 ms_sensors_ht_t_conversion_time[] = { 50000, 25000, 17 17 13000, 7000 }; 18 - static const u16 ms_sensors_ht_h_conversion_time[] = { 16000, 3000, 19 - 5000, 8000 }; 18 + static const u16 ms_sensors_ht_h_conversion_time[] = { 16000, 5000, 19 + 3000, 8000 }; 20 20 static const u16 ms_sensors_tp_conversion_time[] = { 500, 1100, 2100, 21 21 4100, 8220, 16440 }; 22 22

+80 -53

drivers/iio/imu/adis16475.c

··· 70 70 #define ADIS16475_MAX_SCAN_DATA 20 71 71 /* spi max speed in brust mode */ 72 72 #define ADIS16475_BURST_MAX_SPEED 1000000 73 - #define ADIS16475_LSB_DEC_MASK BIT(0) 74 - #define ADIS16475_LSB_FIR_MASK BIT(1) 73 + #define ADIS16475_LSB_DEC_MASK 0 74 + #define ADIS16475_LSB_FIR_MASK 1 75 75 #define ADIS16500_BURST_DATA_SEL_0_CHN_MASK GENMASK(5, 0) 76 76 #define ADIS16500_BURST_DATA_SEL_1_CHN_MASK GENMASK(12, 7) 77 77 ··· 1406 1406 return 0; 1407 1407 } 1408 1408 1409 + 1410 + static int adis16475_probe(struct spi_device *spi) 1411 + { 1412 + struct iio_dev *indio_dev; 1413 + struct adis16475 *st; 1414 + int ret; 1415 + 1416 + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 1417 + if (!indio_dev) 1418 + return -ENOMEM; 1419 + 1420 + st = iio_priv(indio_dev); 1421 + 1422 + st->info = spi_get_device_match_data(spi); 1423 + if (!st->info) 1424 + return -EINVAL; 1425 + 1426 + ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data); 1427 + if (ret) 1428 + return ret; 1429 + 1430 + indio_dev->name = st->info->name; 1431 + indio_dev->channels = st->info->channels; 1432 + indio_dev->num_channels = st->info->num_channels; 1433 + indio_dev->info = &adis16475_info; 1434 + indio_dev->modes = INDIO_DIRECT_MODE; 1435 + 1436 + ret = __adis_initial_startup(&st->adis); 1437 + if (ret) 1438 + return ret; 1439 + 1440 + ret = adis16475_config_irq_pin(st); 1441 + if (ret) 1442 + return ret; 1443 + 1444 + ret = adis16475_config_sync_mode(st); 1445 + if (ret) 1446 + return ret; 1447 + 1448 + ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, 1449 + adis16475_trigger_handler); 1450 + if (ret) 1451 + return ret; 1452 + 1453 + ret = devm_iio_device_register(&spi->dev, indio_dev); 1454 + if (ret) 1455 + return ret; 1456 + 1457 + adis16475_debugfs_init(indio_dev); 1458 + 1459 + return 0; 1460 + } 1461 + 1409 1462 static const struct of_device_id adis16475_of_match[] = { 1410 1463 { .compatible = "adi,adis16470", 1411 1464 .data = &adis16475_chip_info[ADIS16470] }, ··· 1504 1451 }; 1505 1452 MODULE_DEVICE_TABLE(of, adis16475_of_match); 1506 1453 1507 - static int adis16475_probe(struct spi_device *spi) 1508 - { 1509 - struct iio_dev *indio_dev; 1510 - struct adis16475 *st; 1511 - int ret; 1512 - 1513 - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 1514 - if (!indio_dev) 1515 - return -ENOMEM; 1516 - 1517 - st = iio_priv(indio_dev); 1518 - 1519 - st->info = device_get_match_data(&spi->dev); 1520 - if (!st->info) 1521 - return -EINVAL; 1522 - 1523 - ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data); 1524 - if (ret) 1525 - return ret; 1526 - 1527 - indio_dev->name = st->info->name; 1528 - indio_dev->channels = st->info->channels; 1529 - indio_dev->num_channels = st->info->num_channels; 1530 - indio_dev->info = &adis16475_info; 1531 - indio_dev->modes = INDIO_DIRECT_MODE; 1532 - 1533 - ret = __adis_initial_startup(&st->adis); 1534 - if (ret) 1535 - return ret; 1536 - 1537 - ret = adis16475_config_irq_pin(st); 1538 - if (ret) 1539 - return ret; 1540 - 1541 - ret = adis16475_config_sync_mode(st); 1542 - if (ret) 1543 - return ret; 1544 - 1545 - ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, 1546 - adis16475_trigger_handler); 1547 - if (ret) 1548 - return ret; 1549 - 1550 - ret = devm_iio_device_register(&spi->dev, indio_dev); 1551 - if (ret) 1552 - return ret; 1553 - 1554 - adis16475_debugfs_init(indio_dev); 1555 - 1556 - return 0; 1557 - } 1454 + static const struct spi_device_id adis16475_ids[] = { 1455 + { "adis16470", (kernel_ulong_t)&adis16475_chip_info[ADIS16470] }, 1456 + { "adis16475-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16475_1] }, 1457 + { "adis16475-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16475_2] }, 1458 + { "adis16475-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16475_3] }, 1459 + { "adis16477-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16477_1] }, 1460 + { "adis16477-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16477_2] }, 1461 + { "adis16477-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16477_3] }, 1462 + { "adis16465-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16465_1] }, 1463 + { "adis16465-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16465_2] }, 1464 + { "adis16465-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16465_3] }, 1465 + { "adis16467-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16467_1] }, 1466 + { "adis16467-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16467_2] }, 1467 + { "adis16467-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16467_3] }, 1468 + { "adis16500", (kernel_ulong_t)&adis16475_chip_info[ADIS16500] }, 1469 + { "adis16505-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_1] }, 1470 + { "adis16505-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_2] }, 1471 + { "adis16505-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_3] }, 1472 + { "adis16507-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_1] }, 1473 + { "adis16507-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_2] }, 1474 + { "adis16507-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_3] }, 1475 + { } 1476 + }; 1477 + MODULE_DEVICE_TABLE(spi, adis16475_ids); 1558 1478 1559 1479 static struct spi_driver adis16475_driver = { 1560 1480 .driver = { ··· 1535 1509 .of_match_table = adis16475_of_match, 1536 1510 }, 1537 1511 .probe = adis16475_probe, 1512 + .id_table = adis16475_ids, 1538 1513 }; 1539 1514 module_spi_driver(adis16475_driver); 1540 1515

+2 -2

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

··· 750 750 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 751 751 chan->channel2, val); 752 752 mutex_unlock(&st->lock); 753 - return IIO_VAL_INT; 753 + return ret; 754 754 case IIO_ACCEL: 755 755 mutex_lock(&st->lock); 756 756 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 757 757 chan->channel2, val); 758 758 mutex_unlock(&st->lock); 759 - return IIO_VAL_INT; 759 + return ret; 760 760 761 761 default: 762 762 return -EINVAL;

+2 -98

drivers/iio/light/hid-sensor-als.c

··· 14 14 #include "../common/hid-sensors/hid-sensor-trigger.h" 15 15 16 16 enum { 17 - CHANNEL_SCAN_INDEX_INTENSITY, 18 - CHANNEL_SCAN_INDEX_ILLUM, 19 - CHANNEL_SCAN_INDEX_COLOR_TEMP, 20 - CHANNEL_SCAN_INDEX_CHROMATICITY_X, 21 - CHANNEL_SCAN_INDEX_CHROMATICITY_Y, 17 + CHANNEL_SCAN_INDEX_INTENSITY = 0, 18 + CHANNEL_SCAN_INDEX_ILLUM = 1, 22 19 CHANNEL_SCAN_INDEX_MAX 23 20 }; 24 21 ··· 65 68 BIT(IIO_CHAN_INFO_HYSTERESIS_RELATIVE), 66 69 .scan_index = CHANNEL_SCAN_INDEX_ILLUM, 67 70 }, 68 - { 69 - .type = IIO_COLORTEMP, 70 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 71 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 72 - BIT(IIO_CHAN_INFO_SCALE) | 73 - BIT(IIO_CHAN_INFO_SAMP_FREQ) | 74 - BIT(IIO_CHAN_INFO_HYSTERESIS) | 75 - BIT(IIO_CHAN_INFO_HYSTERESIS_RELATIVE), 76 - .scan_index = CHANNEL_SCAN_INDEX_COLOR_TEMP, 77 - }, 78 - { 79 - .type = IIO_CHROMATICITY, 80 - .modified = 1, 81 - .channel2 = IIO_MOD_X, 82 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 83 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 84 - BIT(IIO_CHAN_INFO_SCALE) | 85 - BIT(IIO_CHAN_INFO_SAMP_FREQ) | 86 - BIT(IIO_CHAN_INFO_HYSTERESIS) | 87 - BIT(IIO_CHAN_INFO_HYSTERESIS_RELATIVE), 88 - .scan_index = CHANNEL_SCAN_INDEX_CHROMATICITY_X, 89 - }, 90 - { 91 - .type = IIO_CHROMATICITY, 92 - .modified = 1, 93 - .channel2 = IIO_MOD_Y, 94 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 95 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 96 - BIT(IIO_CHAN_INFO_SCALE) | 97 - BIT(IIO_CHAN_INFO_SAMP_FREQ) | 98 - BIT(IIO_CHAN_INFO_HYSTERESIS) | 99 - BIT(IIO_CHAN_INFO_HYSTERESIS_RELATIVE), 100 - .scan_index = CHANNEL_SCAN_INDEX_CHROMATICITY_Y, 101 - }, 102 71 IIO_CHAN_SOFT_TIMESTAMP(CHANNEL_SCAN_INDEX_TIMESTAMP) 103 72 }; 104 73 ··· 102 139 report_id = als_state->als[chan->scan_index].report_id; 103 140 min = als_state->als[chan->scan_index].logical_minimum; 104 141 address = HID_USAGE_SENSOR_LIGHT_ILLUM; 105 - break; 106 - case CHANNEL_SCAN_INDEX_COLOR_TEMP: 107 - report_id = als_state->als[chan->scan_index].report_id; 108 - min = als_state->als[chan->scan_index].logical_minimum; 109 - address = HID_USAGE_SENSOR_LIGHT_COLOR_TEMPERATURE; 110 - break; 111 - case CHANNEL_SCAN_INDEX_CHROMATICITY_X: 112 - report_id = als_state->als[chan->scan_index].report_id; 113 - min = als_state->als[chan->scan_index].logical_minimum; 114 - address = HID_USAGE_SENSOR_LIGHT_CHROMATICITY_X; 115 - break; 116 - case CHANNEL_SCAN_INDEX_CHROMATICITY_Y: 117 - report_id = als_state->als[chan->scan_index].report_id; 118 - min = als_state->als[chan->scan_index].logical_minimum; 119 - address = HID_USAGE_SENSOR_LIGHT_CHROMATICITY_Y; 120 142 break; 121 143 default: 122 144 report_id = -1; ··· 223 275 als_state->scan.illum[CHANNEL_SCAN_INDEX_ILLUM] = sample_data; 224 276 ret = 0; 225 277 break; 226 - case HID_USAGE_SENSOR_LIGHT_COLOR_TEMPERATURE: 227 - als_state->scan.illum[CHANNEL_SCAN_INDEX_COLOR_TEMP] = sample_data; 228 - ret = 0; 229 - break; 230 - case HID_USAGE_SENSOR_LIGHT_CHROMATICITY_X: 231 - als_state->scan.illum[CHANNEL_SCAN_INDEX_CHROMATICITY_X] = sample_data; 232 - ret = 0; 233 - break; 234 - case HID_USAGE_SENSOR_LIGHT_CHROMATICITY_Y: 235 - als_state->scan.illum[CHANNEL_SCAN_INDEX_CHROMATICITY_Y] = sample_data; 236 - ret = 0; 237 - break; 238 278 case HID_USAGE_SENSOR_TIME_TIMESTAMP: 239 279 als_state->timestamp = hid_sensor_convert_timestamp(&als_state->common_attributes, 240 280 *(s64 *)raw_data); ··· 256 320 257 321 dev_dbg(&pdev->dev, "als %x:%x\n", st->als[i].index, 258 322 st->als[i].report_id); 259 - } 260 - 261 - ret = sensor_hub_input_get_attribute_info(hsdev, HID_INPUT_REPORT, 262 - usage_id, 263 - HID_USAGE_SENSOR_LIGHT_COLOR_TEMPERATURE, 264 - &st->als[CHANNEL_SCAN_INDEX_COLOR_TEMP]); 265 - if (ret < 0) 266 - return ret; 267 - als_adjust_channel_bit_mask(channels, CHANNEL_SCAN_INDEX_COLOR_TEMP, 268 - st->als[CHANNEL_SCAN_INDEX_COLOR_TEMP].size); 269 - 270 - dev_dbg(&pdev->dev, "als %x:%x\n", 271 - st->als[CHANNEL_SCAN_INDEX_COLOR_TEMP].index, 272 - st->als[CHANNEL_SCAN_INDEX_COLOR_TEMP].report_id); 273 - 274 - for (i = 0; i < 2; i++) { 275 - int next_scan_index = CHANNEL_SCAN_INDEX_CHROMATICITY_X + i; 276 - 277 - ret = sensor_hub_input_get_attribute_info(hsdev, 278 - HID_INPUT_REPORT, usage_id, 279 - HID_USAGE_SENSOR_LIGHT_CHROMATICITY_X + i, 280 - &st->als[next_scan_index]); 281 - if (ret < 0) 282 - return ret; 283 - 284 - als_adjust_channel_bit_mask(channels, 285 - CHANNEL_SCAN_INDEX_CHROMATICITY_X + i, 286 - st->als[next_scan_index].size); 287 - 288 - dev_dbg(&pdev->dev, "als %x:%x\n", 289 - st->als[next_scan_index].index, 290 - st->als[next_scan_index].report_id); 291 323 } 292 324 293 325 st->scale_precision = hid_sensor_format_scale(usage_id,

+1 -1

drivers/iio/magnetometer/tmag5273.c

··· 356 356 case IIO_CHAN_INFO_OFFSET: 357 357 switch (chan->type) { 358 358 case IIO_TEMP: 359 - *val = -266314; 359 + *val = -16005; 360 360 return IIO_VAL_INT; 361 361 default: 362 362 return -EINVAL;

+3

drivers/interconnect/core.c

··· 395 395 } 396 396 mutex_unlock(&icc_lock); 397 397 398 + if (!node) 399 + return ERR_PTR(-EINVAL); 400 + 398 401 if (IS_ERR(node)) 399 402 return ERR_CAST(node); 400 403

+1 -1

drivers/interconnect/qcom/icc-rpm.c

··· 307 307 308 308 if (qn->ib_coeff) { 309 309 agg_peak_rate = qn->max_peak[ctx] * 100; 310 - agg_peak_rate = div_u64(qn->max_peak[ctx], qn->ib_coeff); 310 + agg_peak_rate = div_u64(agg_peak_rate, qn->ib_coeff); 311 311 } else { 312 312 agg_peak_rate = qn->max_peak[ctx]; 313 313 }

+1

drivers/interconnect/qcom/sm8250.c

··· 1995 1995 .driver = { 1996 1996 .name = "qnoc-sm8250", 1997 1997 .of_match_table = qnoc_of_match, 1998 + .sync_state = icc_sync_state, 1998 1999 }, 1999 2000 }; 2000 2001 module_platform_driver(qnoc_driver);

+94 -40

drivers/nvmem/brcm_nvram.c

··· 17 17 18 18 #define NVRAM_MAGIC "FLSH" 19 19 20 + /** 21 + * struct brcm_nvram - driver state internal struct 22 + * 23 + * @dev: NVMEM device pointer 24 + * @nvmem_size: Size of the whole space available for NVRAM 25 + * @data: NVRAM data copy stored to avoid poking underlaying flash controller 26 + * @data_len: NVRAM data size 27 + * @padding_byte: Padding value used to fill remaining space 28 + * @cells: Array of discovered NVMEM cells 29 + * @ncells: Number of elements in cells 30 + */ 20 31 struct brcm_nvram { 21 32 struct device *dev; 22 - void __iomem *base; 33 + size_t nvmem_size; 34 + uint8_t *data; 35 + size_t data_len; 36 + uint8_t padding_byte; 23 37 struct nvmem_cell_info *cells; 24 38 int ncells; 25 39 }; ··· 50 36 size_t bytes) 51 37 { 52 38 struct brcm_nvram *priv = context; 53 - u8 *dst = val; 39 + size_t to_copy; 54 40 55 - while (bytes--) 56 - *dst++ = readb(priv->base + offset++); 41 + if (offset + bytes > priv->data_len) 42 + to_copy = max_t(ssize_t, (ssize_t)priv->data_len - offset, 0); 43 + else 44 + to_copy = bytes; 45 + 46 + memcpy(val, priv->data + offset, to_copy); 47 + 48 + memset((uint8_t *)val + to_copy, priv->padding_byte, bytes - to_copy); 49 + 50 + return 0; 51 + } 52 + 53 + static int brcm_nvram_copy_data(struct brcm_nvram *priv, struct platform_device *pdev) 54 + { 55 + struct resource *res; 56 + void __iomem *base; 57 + 58 + base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 59 + if (IS_ERR(base)) 60 + return PTR_ERR(base); 61 + 62 + priv->nvmem_size = resource_size(res); 63 + 64 + priv->padding_byte = readb(base + priv->nvmem_size - 1); 65 + for (priv->data_len = priv->nvmem_size; 66 + priv->data_len; 67 + priv->data_len--) { 68 + if (readb(base + priv->data_len - 1) != priv->padding_byte) 69 + break; 70 + } 71 + WARN(priv->data_len > SZ_128K, "Unexpected (big) NVRAM size: %zu B\n", priv->data_len); 72 + 73 + priv->data = devm_kzalloc(priv->dev, priv->data_len, GFP_KERNEL); 74 + if (!priv->data) 75 + return -ENOMEM; 76 + 77 + memcpy_fromio(priv->data, base, priv->data_len); 78 + 79 + bcm47xx_nvram_init_from_iomem(base, priv->data_len); 57 80 58 81 return 0; 59 82 } ··· 118 67 size_t len) 119 68 { 120 69 struct device *dev = priv->dev; 121 - char *var, *value, *eq; 70 + char *var, *value; 71 + uint8_t tmp; 122 72 int idx; 73 + int err = 0; 74 + 75 + tmp = priv->data[len - 1]; 76 + priv->data[len - 1] = '\0'; 123 77 124 78 priv->ncells = 0; 125 79 for (var = data + sizeof(struct brcm_nvram_header); ··· 134 78 } 135 79 136 80 priv->cells = devm_kcalloc(dev, priv->ncells, sizeof(*priv->cells), GFP_KERNEL); 137 - if (!priv->cells) 138 - return -ENOMEM; 81 + if (!priv->cells) { 82 + err = -ENOMEM; 83 + goto out; 84 + } 139 85 140 86 for (var = data + sizeof(struct brcm_nvram_header), idx = 0; 141 87 var < (char *)data + len && *var; 142 88 var = value + strlen(value) + 1, idx++) { 89 + char *eq, *name; 90 + 143 91 eq = strchr(var, '='); 144 92 if (!eq) 145 93 break; 146 94 *eq = '\0'; 95 + name = devm_kstrdup(dev, var, GFP_KERNEL); 96 + *eq = '='; 97 + if (!name) { 98 + err = -ENOMEM; 99 + goto out; 100 + } 147 101 value = eq + 1; 148 102 149 - priv->cells[idx].name = devm_kstrdup(dev, var, GFP_KERNEL); 150 - if (!priv->cells[idx].name) 151 - return -ENOMEM; 103 + priv->cells[idx].name = name; 152 104 priv->cells[idx].offset = value - (char *)data; 153 105 priv->cells[idx].bytes = strlen(value); 154 106 priv->cells[idx].np = of_get_child_by_name(dev->of_node, priv->cells[idx].name); 155 - if (!strcmp(var, "et0macaddr") || 156 - !strcmp(var, "et1macaddr") || 157 - !strcmp(var, "et2macaddr")) { 107 + if (!strcmp(name, "et0macaddr") || 108 + !strcmp(name, "et1macaddr") || 109 + !strcmp(name, "et2macaddr")) { 158 110 priv->cells[idx].raw_len = strlen(value); 159 111 priv->cells[idx].bytes = ETH_ALEN; 160 112 priv->cells[idx].read_post_process = brcm_nvram_read_post_process_macaddr; 161 113 } 162 114 } 163 115 164 - return 0; 116 + out: 117 + priv->data[len - 1] = tmp; 118 + return err; 165 119 } 166 120 167 121 static int brcm_nvram_parse(struct brcm_nvram *priv) 168 122 { 123 + struct brcm_nvram_header *header = (struct brcm_nvram_header *)priv->data; 169 124 struct device *dev = priv->dev; 170 - struct brcm_nvram_header header; 171 - uint8_t *data; 172 125 size_t len; 173 126 int err; 174 127 175 - memcpy_fromio(&header, priv->base, sizeof(header)); 176 - 177 - if (memcmp(header.magic, NVRAM_MAGIC, 4)) { 128 + if (memcmp(header->magic, NVRAM_MAGIC, 4)) { 178 129 dev_err(dev, "Invalid NVRAM magic\n"); 179 130 return -EINVAL; 180 131 } 181 132 182 - len = le32_to_cpu(header.len); 183 - 184 - data = kzalloc(len, GFP_KERNEL); 185 - if (!data) 186 - return -ENOMEM; 187 - 188 - memcpy_fromio(data, priv->base, len); 189 - data[len - 1] = '\0'; 190 - 191 - err = brcm_nvram_add_cells(priv, data, len); 192 - if (err) { 193 - dev_err(dev, "Failed to add cells: %d\n", err); 194 - return err; 133 + len = le32_to_cpu(header->len); 134 + if (len > priv->nvmem_size) { 135 + dev_err(dev, "NVRAM length (%zd) exceeds mapped size (%zd)\n", len, 136 + priv->nvmem_size); 137 + return -EINVAL; 195 138 } 196 139 197 - kfree(data); 140 + err = brcm_nvram_add_cells(priv, priv->data, len); 141 + if (err) 142 + dev_err(dev, "Failed to add cells: %d\n", err); 198 143 199 144 return 0; 200 145 } ··· 207 150 .reg_read = brcm_nvram_read, 208 151 }; 209 152 struct device *dev = &pdev->dev; 210 - struct resource *res; 211 153 struct brcm_nvram *priv; 212 154 int err; 213 155 ··· 215 159 return -ENOMEM; 216 160 priv->dev = dev; 217 161 218 - priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 219 - if (IS_ERR(priv->base)) 220 - return PTR_ERR(priv->base); 162 + err = brcm_nvram_copy_data(priv, pdev); 163 + if (err) 164 + return err; 221 165 222 166 err = brcm_nvram_parse(priv); 223 167 if (err) 224 168 return err; 225 169 226 - bcm47xx_nvram_init_from_iomem(priv->base, resource_size(res)); 227 - 228 170 config.dev = dev; 229 171 config.cells = priv->cells; 230 172 config.ncells = priv->ncells; 231 173 config.priv = priv; 232 - config.size = resource_size(res); 174 + config.size = priv->nvmem_size; 233 175 234 176 return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &config)); 235 177 }

+4 -2

fs/debugfs/file.c

··· 104 104 ~DEBUGFS_FSDATA_IS_REAL_FOPS_BIT); 105 105 refcount_set(&fsd->active_users, 1); 106 106 init_completion(&fsd->active_users_drained); 107 + INIT_LIST_HEAD(&fsd->cancellations); 108 + mutex_init(&fsd->cancellations_mtx); 109 + 107 110 if (cmpxchg(&dentry->d_fsdata, d_fsd, fsd) != d_fsd) { 111 + mutex_destroy(&fsd->cancellations_mtx); 108 112 kfree(fsd); 109 113 fsd = READ_ONCE(dentry->d_fsdata); 110 114 } 111 - INIT_LIST_HEAD(&fsd->cancellations); 112 - mutex_init(&fsd->cancellations_mtx); 113 115 } 114 116 115 117 /*

+2

include/linux/device.h

··· 1007 1007 mutex_unlock(&dev->mutex); 1008 1008 } 1009 1009 1010 + DEFINE_GUARD(device, struct device *, device_lock(_T), device_unlock(_T)) 1011 + 1010 1012 static inline void device_lock_assert(struct device *dev) 1011 1013 { 1012 1014 lockdep_assert_held(&dev->mutex);

-4

include/linux/hid-sensor-ids.h

··· 21 21 #define HID_USAGE_SENSOR_ALS 0x200041 22 22 #define HID_USAGE_SENSOR_DATA_LIGHT 0x2004d0 23 23 #define HID_USAGE_SENSOR_LIGHT_ILLUM 0x2004d1 24 - #define HID_USAGE_SENSOR_LIGHT_COLOR_TEMPERATURE 0x2004d2 25 - #define HID_USAGE_SENSOR_LIGHT_CHROMATICITY 0x2004d3 26 - #define HID_USAGE_SENSOR_LIGHT_CHROMATICITY_X 0x2004d4 27 - #define HID_USAGE_SENSOR_LIGHT_CHROMATICITY_Y 0x2004d5 28 24 29 25 /* PROX (200011) */ 30 26 #define HID_USAGE_SENSOR_PROX 0x200011