[MIPS] Convert to RTC-class ds1742 driver

The generic rtc-ds1742 driver can be used for RBTX4927 and JMR3927
(with __swizzle_addr trick). This patch also removes MIPS local
DS1742 stuff.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by Atsushi Nemoto and committed by Ralf Baechle a0574e04 148171b2

+86 -339
-4
arch/mips/Kconfig
··· 1895 1896 source "kernel/Kconfig.preempt" 1897 1898 - config RTC_DS1742 1899 - bool "DS1742 BRAM/RTC support" 1900 - depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 1901 - 1902 config MIPS_INSANE_LARGE 1903 bool "Support for large 64-bit configurations" 1904 depends on CPU_R10000 && 64BIT
··· 1895 1896 source "kernel/Kconfig.preempt" 1897 1898 config MIPS_INSANE_LARGE 1899 bool "Support for large 64-bit configurations" 1900 depends on CPU_R10000 && 64BIT
+22 -2
arch/mips/configs/jmr3927_defconfig
··· 148 CONFIG_PREEMPT_NONE=y 149 # CONFIG_PREEMPT_VOLUNTARY is not set 150 # CONFIG_PREEMPT is not set 151 - CONFIG_RTC_DS1742=y 152 # CONFIG_KEXEC is not set 153 CONFIG_LOCKDEP_SUPPORT=y 154 CONFIG_STACKTRACE_SUPPORT=y ··· 801 # 802 # Real Time Clock 803 # 804 - # CONFIG_RTC_CLASS is not set 805 806 # 807 # DMA Engine support
··· 148 CONFIG_PREEMPT_NONE=y 149 # CONFIG_PREEMPT_VOLUNTARY is not set 150 # CONFIG_PREEMPT is not set 151 # CONFIG_KEXEC is not set 152 CONFIG_LOCKDEP_SUPPORT=y 153 CONFIG_STACKTRACE_SUPPORT=y ··· 802 # 803 # Real Time Clock 804 # 805 + CONFIG_RTC_LIB=y 806 + CONFIG_RTC_CLASS=y 807 + CONFIG_RTC_HCTOSYS=y 808 + CONFIG_RTC_HCTOSYS_DEVICE="rtc0" 809 + # CONFIG_RTC_DEBUG is not set 810 + 811 + # 812 + # RTC interfaces 813 + # 814 + CONFIG_RTC_INTF_SYSFS=y 815 + CONFIG_RTC_INTF_PROC=y 816 + CONFIG_RTC_INTF_DEV=y 817 + # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 818 + 819 + # 820 + # RTC drivers 821 + # 822 + # CONFIG_RTC_DRV_DS1553 is not set 823 + CONFIG_RTC_DRV_DS1742=y 824 + # CONFIG_RTC_DRV_M48T86 is not set 825 + # CONFIG_RTC_DRV_TEST is not set 826 + # CONFIG_RTC_DRV_V3020 is not set 827 828 # 829 # DMA Engine support
+1 -1
arch/mips/jmr3927/common/Makefile
··· 2 # Makefile for the common code of TOSHIBA JMR-TX3927 board 3 # 4 5 - obj-y += prom.o puts.o rtc_ds1742.o
··· 2 # Makefile for the common code of TOSHIBA JMR-TX3927 board 3 # 4 5 + obj-y += prom.o puts.o
-171
arch/mips/jmr3927/common/rtc_ds1742.c
··· 1 - /* 2 - * Copyright 2001 MontaVista Software Inc. 3 - * Author: MontaVista Software, Inc. 4 - * ahennessy@mvista.com 5 - * 6 - * arch/mips/jmr3927/common/rtc_ds1742.c 7 - * Based on arch/mips/ddb5xxx/common/rtc_ds1386.c 8 - * low-level RTC hookups for s for Dallas 1742 chip. 9 - * 10 - * Copyright (C) 2000-2001 Toshiba Corporation 11 - * 12 - * This program is free software; you can redistribute it and/or modify it 13 - * under the terms of the GNU General Public License as published by the 14 - * Free Software Foundation; either version 2 of the License, or (at your 15 - * option) any later version. 16 - * 17 - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 18 - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 20 - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23 - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 24 - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 - * 28 - * You should have received a copy of the GNU General Public License along 29 - * with this program; if not, write to the Free Software Foundation, Inc., 30 - * 675 Mass Ave, Cambridge, MA 02139, USA. 31 - */ 32 - 33 - 34 - /* 35 - * This file exports a function, rtc_ds1386_init(), which expects an 36 - * uncached base address as the argument. It will set the two function 37 - * pointers expected by the MIPS generic timer code. 38 - */ 39 - 40 - #include <linux/bcd.h> 41 - #include <linux/types.h> 42 - #include <linux/time.h> 43 - #include <linux/rtc.h> 44 - #include <linux/ds1742rtc.h> 45 - 46 - #include <asm/time.h> 47 - #include <asm/addrspace.h> 48 - 49 - #include <asm/debug.h> 50 - 51 - #define EPOCH 2000 52 - 53 - static unsigned long rtc_base; 54 - 55 - static unsigned long 56 - rtc_ds1742_get_time(void) 57 - { 58 - unsigned int year, month, day, hour, minute, second; 59 - unsigned int century; 60 - unsigned long flags; 61 - 62 - spin_lock_irqsave(&rtc_lock, flags); 63 - rtc_write(RTC_READ, RTC_CONTROL); 64 - second = BCD2BIN(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK); 65 - minute = BCD2BIN(rtc_read(RTC_MINUTES)); 66 - hour = BCD2BIN(rtc_read(RTC_HOURS)); 67 - day = BCD2BIN(rtc_read(RTC_DATE)); 68 - month = BCD2BIN(rtc_read(RTC_MONTH)); 69 - year = BCD2BIN(rtc_read(RTC_YEAR)); 70 - century = BCD2BIN(rtc_read(RTC_CENTURY) & RTC_CENTURY_MASK); 71 - rtc_write(0, RTC_CONTROL); 72 - spin_unlock_irqrestore(&rtc_lock, flags); 73 - 74 - year += century * 100; 75 - 76 - return mktime(year, month, day, hour, minute, second); 77 - } 78 - extern void to_tm(unsigned long tim, struct rtc_time * tm); 79 - 80 - static int 81 - rtc_ds1742_set_time(unsigned long t) 82 - { 83 - struct rtc_time tm; 84 - u8 year, month, day, hour, minute, second; 85 - u8 cmos_year, cmos_month, cmos_day, cmos_hour, cmos_minute, cmos_second; 86 - int cmos_century; 87 - unsigned long flags; 88 - 89 - spin_lock_irqsave(&rtc_lock, flags); 90 - rtc_write(RTC_READ, RTC_CONTROL); 91 - cmos_second = (u8)(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK); 92 - cmos_minute = (u8)rtc_read(RTC_MINUTES); 93 - cmos_hour = (u8)rtc_read(RTC_HOURS); 94 - cmos_day = (u8)rtc_read(RTC_DATE); 95 - cmos_month = (u8)rtc_read(RTC_MONTH); 96 - cmos_year = (u8)rtc_read(RTC_YEAR); 97 - cmos_century = rtc_read(RTC_CENTURY) & RTC_CENTURY_MASK; 98 - 99 - rtc_write(RTC_WRITE, RTC_CONTROL); 100 - 101 - /* convert */ 102 - to_tm(t, &tm); 103 - 104 - /* check each field one by one */ 105 - year = BIN2BCD(tm.tm_year - EPOCH); 106 - if (year != cmos_year) { 107 - rtc_write(year,RTC_YEAR); 108 - } 109 - 110 - month = BIN2BCD(tm.tm_mon); 111 - if (month != (cmos_month & 0x1f)) { 112 - rtc_write((month & 0x1f) | (cmos_month & ~0x1f),RTC_MONTH); 113 - } 114 - 115 - day = BIN2BCD(tm.tm_mday); 116 - if (day != cmos_day) { 117 - 118 - rtc_write(day, RTC_DATE); 119 - } 120 - 121 - if (cmos_hour & 0x40) { 122 - /* 12 hour format */ 123 - hour = 0x40; 124 - if (tm.tm_hour > 12) { 125 - hour |= 0x20 | (BIN2BCD(hour-12) & 0x1f); 126 - } else { 127 - hour |= BIN2BCD(tm.tm_hour); 128 - } 129 - } else { 130 - /* 24 hour format */ 131 - hour = BIN2BCD(tm.tm_hour) & 0x3f; 132 - } 133 - if (hour != cmos_hour) rtc_write(hour, RTC_HOURS); 134 - 135 - minute = BIN2BCD(tm.tm_min); 136 - if (minute != cmos_minute) { 137 - rtc_write(minute, RTC_MINUTES); 138 - } 139 - 140 - second = BIN2BCD(tm.tm_sec); 141 - if (second != cmos_second) { 142 - rtc_write(second & RTC_SECONDS_MASK,RTC_SECONDS); 143 - } 144 - 145 - /* RTC_CENTURY and RTC_CONTROL share same address... */ 146 - rtc_write(cmos_century, RTC_CONTROL); 147 - spin_unlock_irqrestore(&rtc_lock, flags); 148 - 149 - return 0; 150 - } 151 - 152 - void 153 - rtc_ds1742_init(unsigned long base) 154 - { 155 - u8 cmos_second; 156 - 157 - /* remember the base */ 158 - rtc_base = base; 159 - db_assert((rtc_base & 0xe0000000) == KSEG1); 160 - 161 - /* set the function pointers */ 162 - rtc_mips_get_time = rtc_ds1742_get_time; 163 - rtc_mips_set_time = rtc_ds1742_set_time; 164 - 165 - /* clear oscillator stop bit */ 166 - rtc_write(RTC_READ, RTC_CONTROL); 167 - cmos_second = (u8)(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK); 168 - rtc_write(RTC_WRITE, RTC_CONTROL); 169 - rtc_write(cmos_second, RTC_SECONDS); /* clear msb */ 170 - rtc_write(0, RTC_CONTROL); 171 - }
···
+30 -9
arch/mips/jmr3927/rbhma3100/setup.c
··· 45 #include <linux/param.h> /* for HZ */ 46 #include <linux/delay.h> 47 #include <linux/pm.h> 48 #ifdef CONFIG_SERIAL_TXX9 49 #include <linux/tty.h> 50 #include <linux/serial.h> ··· 173 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; 174 } 175 176 - #define USE_RTC_DS1742 177 - #ifdef USE_RTC_DS1742 178 - extern void rtc_ds1742_init(unsigned long base); 179 - #endif 180 static void __init jmr3927_time_init(void) 181 { 182 clocksource_mips.read = jmr3927_hpt_read; 183 mips_hpt_frequency = JMR3927_TIMER_CLK; 184 - #ifdef USE_RTC_DS1742 185 - if (jmr3927_have_nvram()) { 186 - rtc_ds1742_init(JMR3927_IOC_NVRAMB_ADDR); 187 - } 188 - #endif 189 } 190 191 void __init plat_timer_setup(struct irqaction *irq) ··· 532 printk("TX3927 D-Cache WriteBack (CWF) .\n"); 533 } 534 }
··· 45 #include <linux/param.h> /* for HZ */ 46 #include <linux/delay.h> 47 #include <linux/pm.h> 48 + #include <linux/platform_device.h> 49 #ifdef CONFIG_SERIAL_TXX9 50 #include <linux/tty.h> 51 #include <linux/serial.h> ··· 172 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; 173 } 174 175 static void __init jmr3927_time_init(void) 176 { 177 clocksource_mips.read = jmr3927_hpt_read; 178 mips_hpt_frequency = JMR3927_TIMER_CLK; 179 } 180 181 void __init plat_timer_setup(struct irqaction *irq) ··· 540 printk("TX3927 D-Cache WriteBack (CWF) .\n"); 541 } 542 } 543 + 544 + /* This trick makes rtc-ds1742 driver usable as is. */ 545 + unsigned long __swizzle_addr_b(unsigned long port) 546 + { 547 + if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR) 548 + return port; 549 + port = (port & 0xffff0000) | (port & 0x7fff << 1); 550 + #ifdef __BIG_ENDIAN 551 + return port; 552 + #else 553 + return port | 1; 554 + #endif 555 + } 556 + EXPORT_SYMBOL(__swizzle_addr_b); 557 + 558 + static int __init jmr3927_rtc_init(void) 559 + { 560 + struct resource res = { 561 + .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE, 562 + .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1, 563 + .flags = IORESOURCE_MEM, 564 + }; 565 + struct platform_device *dev; 566 + if (!jmr3927_have_nvram()) 567 + return -ENODEV; 568 + dev = platform_device_register_simple("ds1742", -1, &res, 1); 569 + return IS_ERR(dev) ? PTR_ERR(dev) : 0; 570 + } 571 + device_initcall(jmr3927_rtc_init);
-3
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
··· 132 #include <asm/wbflush.h> 133 #include <linux/bootmem.h> 134 #include <linux/blkdev.h> 135 - #ifdef CONFIG_RTC_DS1742 136 - #include <linux/ds1742rtc.h> 137 - #endif 138 #ifdef CONFIG_TOSHIBA_FPCIB0 139 #include <asm/tx4927/smsc_fdc37m81x.h> 140 #endif
··· 132 #include <asm/wbflush.h> 133 #include <linux/bootmem.h> 134 #include <linux/blkdev.h> 135 #ifdef CONFIG_TOSHIBA_FPCIB0 136 #include <asm/tx4927/smsc_fdc37m81x.h> 137 #endif
+15 -61
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
··· 53 #include <linux/pci.h> 54 #include <linux/timex.h> 55 #include <linux/pm.h> 56 57 #include <asm/bootinfo.h> 58 #include <asm/page.h> ··· 65 #include <asm/time.h> 66 #include <linux/bootmem.h> 67 #include <linux/blkdev.h> 68 - #ifdef CONFIG_RTC_DS1742 69 - #include <linux/ds1742rtc.h> 70 - #endif 71 #ifdef CONFIG_TOSHIBA_FPCIB0 72 #include <asm/tx4927/smsc_fdc37m81x.h> 73 #endif ··· 1018 "+\n"); 1019 } 1020 1021 - #ifdef CONFIG_RTC_DS1742 1022 - extern unsigned long rtc_ds1742_get_time(void); 1023 - extern int rtc_ds1742_set_time(unsigned long); 1024 - extern void rtc_ds1742_wait(void); 1025 - #endif 1026 - 1027 void __init 1028 toshiba_rbtx4927_time_init(void) 1029 { 1030 - u32 c1; 1031 - u32 c2; 1032 - 1033 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "-\n"); 1034 1035 - #ifdef CONFIG_RTC_DS1742 1036 - 1037 - rtc_mips_get_time = rtc_ds1742_get_time; 1038 - rtc_mips_set_time = rtc_ds1742_set_time; 1039 - 1040 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, 1041 - ":rtc_ds1742_init()-\n"); 1042 - rtc_ds1742_init(0xbc010000); 1043 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, 1044 - ":rtc_ds1742_init()+\n"); 1045 - 1046 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, 1047 - ":Calibrate mips_hpt_frequency-\n"); 1048 - rtc_ds1742_wait(); 1049 - 1050 - /* get the count */ 1051 - c1 = read_c0_count(); 1052 - 1053 - /* wait for the seconds to change again */ 1054 - rtc_ds1742_wait(); 1055 - 1056 - /* get the count again */ 1057 - c2 = read_c0_count(); 1058 - 1059 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, 1060 - ":Calibrate mips_hpt_frequency+\n"); 1061 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, 1062 - ":c1=%12u\n", c1); 1063 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, 1064 - ":c2=%12u\n", c2); 1065 - 1066 - /* this diff is as close as we are going to get to counter ticks per sec */ 1067 - mips_hpt_frequency = abs(c2 - c1); 1068 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, 1069 - ":f1=%12u\n", mips_hpt_frequency); 1070 - 1071 - /* round to 1/10th of a MHz */ 1072 - mips_hpt_frequency /= (100 * 1000); 1073 - mips_hpt_frequency *= (100 * 1000); 1074 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, 1075 - ":f2=%12u\n", mips_hpt_frequency); 1076 - 1077 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_INFO, 1078 - ":mips_hpt_frequency=%uHz (%uMHz)\n", 1079 - mips_hpt_frequency, 1080 - mips_hpt_frequency / 1000000); 1081 - #else 1082 - mips_hpt_frequency = 100000000; 1083 - #endif 1084 1085 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "+\n"); 1086 ··· 1036 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP, 1037 "+\n"); 1038 }
··· 53 #include <linux/pci.h> 54 #include <linux/timex.h> 55 #include <linux/pm.h> 56 + #include <linux/platform_device.h> 57 58 #include <asm/bootinfo.h> 59 #include <asm/page.h> ··· 64 #include <asm/time.h> 65 #include <linux/bootmem.h> 66 #include <linux/blkdev.h> 67 #ifdef CONFIG_TOSHIBA_FPCIB0 68 #include <asm/tx4927/smsc_fdc37m81x.h> 69 #endif ··· 1020 "+\n"); 1021 } 1022 1023 void __init 1024 toshiba_rbtx4927_time_init(void) 1025 { 1026 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "-\n"); 1027 1028 + mips_hpt_frequency = tx4927_cpu_clock / 2; 1029 1030 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "+\n"); 1031 ··· 1095 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP, 1096 "+\n"); 1097 } 1098 + 1099 + static int __init toshiba_rbtx4927_rtc_init(void) 1100 + { 1101 + struct resource res = { 1102 + .start = 0x1c010000, 1103 + .end = 0x1c010000 + 0x800 - 1, 1104 + .flags = IORESOURCE_MEM, 1105 + }; 1106 + struct platform_device *dev = 1107 + platform_device_register_simple("ds1742", -1, &res, 1); 1108 + return IS_ERR(dev) ? PTR_ERR(dev) : 0; 1109 + } 1110 + device_initcall(toshiba_rbtx4927_rtc_init);
-13
include/asm-mips/ds1742.h
··· 1 - /* 2 - * This file is subject to the terms and conditions of the GNU General Public 3 - * License. See the file "COPYING" in the main directory of this archive 4 - * for more details. 5 - * 6 - * Copyright (C) 2006 by Ralf Baechle (ralf@linux-mips.org) 7 - */ 8 - #ifndef _ASM_DS1742_H 9 - #define _ASM_DS1742_H 10 - 11 - #include <ds1742.h> 12 - 13 - #endif /* _ASM_DS1742_H */
···
-6
include/asm-mips/jmr3927/jmr3927.h
··· 179 #define jmr3927_have_nvram() \ 180 ((jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_IDT_MASK) == JMR3927_IOC_IDT) 181 182 - /* NVRAM macro */ 183 - #define jmr3927_nvram_in(ofs) \ 184 - jmr3927_ioc_reg_in(JMR3927_IOC_NVRAMB_ADDR + ((ofs) << 1)) 185 - #define jmr3927_nvram_out(d, ofs) \ 186 - jmr3927_ioc_reg_out(d, JMR3927_IOC_NVRAMB_ADDR + ((ofs) << 1)) 187 - 188 /* LED macro */ 189 #define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR) 190 #define jmr3927_io_led_set(n/*0-3*/) jmr3927_isac_reg_out((n), JMR3927_ISAC_LED_ADDR)
··· 179 #define jmr3927_have_nvram() \ 180 ((jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_IDT_MASK) == JMR3927_IOC_IDT) 181 182 /* LED macro */ 183 #define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR) 184 #define jmr3927_io_led_set(n/*0-3*/) jmr3927_isac_reg_out((n), JMR3927_ISAC_LED_ADDR)
-16
include/asm-mips/mach-jmr3927/ds1742.h
··· 1 - /* 2 - * This file is subject to the terms and conditions of the GNU General Public 3 - * License. See the file "COPYING" in the main directory of this archive 4 - * for more details. 5 - * 6 - * Copyright (C) 2003, 06 by Ralf Baechle 7 - */ 8 - #ifndef __ASM_MACH_JMR3927_DS1742_H 9 - #define __ASM_MACH_JMR3927_DS1742_H 10 - 11 - #include <asm/jmr3927/jmr3927.h> 12 - 13 - #define rtc_read(reg) (jmr3927_nvram_in(reg)) 14 - #define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg))) 15 - 16 - #endif /* __ASM_MACH_JMR3927_DS1742_H */
···
+18
include/asm-mips/mach-jmr3927/mangle-port.h
···
··· 1 + #ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H 2 + #define __ASM_MACH_JMR3927_MANGLE_PORT_H 3 + 4 + extern unsigned long __swizzle_addr_b(unsigned long port); 5 + #define __swizzle_addr_w(port) (port) 6 + #define __swizzle_addr_l(port) (port) 7 + #define __swizzle_addr_q(port) (port) 8 + 9 + #define ioswabb(a,x) (x) 10 + #define __mem_ioswabb(a,x) (x) 11 + #define ioswabw(a,x) le16_to_cpu(x) 12 + #define __mem_ioswabw(a,x) (x) 13 + #define ioswabl(a,x) le32_to_cpu(x) 14 + #define __mem_ioswabl(a,x) (x) 15 + #define ioswabq(a,x) le64_to_cpu(x) 16 + #define __mem_ioswabq(a,x) (x) 17 + 18 + #endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */
-53
include/linux/ds1742rtc.h
··· 1 - /* 2 - * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM 3 - * 4 - * Copyright (C) 1999-2001 Toshiba Corporation 5 - * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) 6 - * 7 - * Permission is hereby granted to copy, modify and redistribute this code 8 - * in terms of the GNU Library General Public License, Version 2 or later, 9 - * at your option. 10 - */ 11 - #ifndef __LINUX_DS1742RTC_H 12 - #define __LINUX_DS1742RTC_H 13 - 14 - #include <asm/ds1742.h> 15 - 16 - #define RTC_BRAM_SIZE 0x800 17 - #define RTC_OFFSET 0x7f8 18 - 19 - /* 20 - * Register summary 21 - */ 22 - #define RTC_CONTROL (RTC_OFFSET + 0) 23 - #define RTC_CENTURY (RTC_OFFSET + 0) 24 - #define RTC_SECONDS (RTC_OFFSET + 1) 25 - #define RTC_MINUTES (RTC_OFFSET + 2) 26 - #define RTC_HOURS (RTC_OFFSET + 3) 27 - #define RTC_DAY (RTC_OFFSET + 4) 28 - #define RTC_DATE (RTC_OFFSET + 5) 29 - #define RTC_MONTH (RTC_OFFSET + 6) 30 - #define RTC_YEAR (RTC_OFFSET + 7) 31 - 32 - #define RTC_CENTURY_MASK 0x3f 33 - #define RTC_SECONDS_MASK 0x7f 34 - #define RTC_DAY_MASK 0x07 35 - 36 - /* 37 - * Bits in the Control/Century register 38 - */ 39 - #define RTC_WRITE 0x80 40 - #define RTC_READ 0x40 41 - 42 - /* 43 - * Bits in the Seconds register 44 - */ 45 - #define RTC_STOP 0x80 46 - 47 - /* 48 - * Bits in the Day register 49 - */ 50 - #define RTC_BATT_FLAG 0x80 51 - #define RTC_FREQ_TEST 0x40 52 - 53 - #endif /* __LINUX_DS1742RTC_H */
···