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Merge tag 'zynq-dt-for-v5.15' of https://github.com/Xilinx/linux-xlnx into arm/dt

ARM: dts: Zynq DT changes for v5.15

- Enable nand flash controller for ebaz4205 board

* tag 'zynq-dt-for-v5.15' of https://github.com/Xilinx/linux-xlnx:
ARM: dts: ebaz4205: enable NAND support
ARM: dts: zynq: add NAND flash controller node

Link: https://lore.kernel.org/r/f3dc69c8-8a22-e938-4ddf-b1052b8c1437@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+33
+21
arch/arm/boot/dts/zynq-7000.dtsi
··· 252 252 #size-cells = <0>; 253 253 }; 254 254 255 + smcc: memory-controller@e000e000 { 256 + compatible = "arm,pl353-smc-r2p1", "arm,primecell"; 257 + reg = <0xe000e000 0x0001000>; 258 + status = "disabled"; 259 + clock-names = "memclk", "apb_pclk"; 260 + clocks = <&clkc 11>, <&clkc 44>; 261 + ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */ 262 + 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */ 263 + 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */ 264 + #address-cells = <2>; 265 + #size-cells = <1>; 266 + 267 + nfc0: nand-controller@0,0 { 268 + compatible = "arm,pl353-nand-r2p1"; 269 + reg = <0 0 0x1000000>; 270 + status = "disabled"; 271 + #address-cells = <1>; 272 + #size-cells = <0>; 273 + }; 274 + }; 275 + 255 276 sdhci0: mmc@e0100000 { 256 277 compatible = "arasan,sdhci-8.9a"; 257 278 status = "disabled";
+12
arch/arm/boot/dts/zynq-ebaz4205.dts
··· 48 48 pinctrl-0 = <&pinctrl_gpio0_default>; 49 49 }; 50 50 51 + &nfc0 { 52 + status = "okay"; 53 + 54 + nand@0 { 55 + reg = <0>; 56 + }; 57 + }; 58 + 51 59 &pinctrl0 { 52 60 pinctrl_gpio0_default: gpio0-default { 53 61 mux { ··· 124 116 bias-disable; 125 117 }; 126 118 }; 119 + }; 120 + 121 + &smcc { 122 + status = "okay"; 127 123 }; 128 124 129 125 &sdhci0 {