mfd: da9063: Upgrade of register definitions to support production silicon

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

This patch updates the register definitions for DA9063 to support the
production silicon variant code ID (0x5). These changes are not backwards
compatible with the previous register definitions and can only be used
with the production variant of DA9063.

Signed-off-by: Opensource [Steve Twiss] <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

authored by

Opensource [Steve Twiss] and committed by

Lee Jones 12 years ago 9fc2b9ca 416dc642

+61 -57

1 changed file

expand all

include

linux

mfd

da9063

registers.h

+61 -57

include/linux/mfd/da9063/registers.h

··· 17 17 #define _DA9063_REG_H 18 18 19 19 #define DA9063_I2C_PAGE_SEL_SHIFT 1 20 - 21 20 #define DA9063_EVENT_REG_NUM 4 22 - #define DA9210_EVENT_REG_NUM 2 23 - #define DA9063_EXT_EVENT_REG_NUM (DA9063_EVENT_REG_NUM + \ 24 - DA9210_EVENT_REG_NUM) 25 21 26 22 /* Page selection I2C or SPI always in the begining of any page. */ 27 23 /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */ ··· 57 61 #define DA9063_REG_GPIO_10_11 0x1A 58 62 #define DA9063_REG_GPIO_12_13 0x1B 59 63 #define DA9063_REG_GPIO_14_15 0x1C 60 - #define DA9063_REG_GPIO_MODE_0_7 0x1D 61 - #define DA9063_REG_GPIO_MODE_8_15 0x1E 62 - #define DA9063_REG_GPIO_SWITCH_CONT 0x1F 64 + #define DA9063_REG_GPIO_MODE0_7 0x1D 65 + #define DA9063_REG_GPIO_MODE8_15 0x1E 66 + #define DA9063_REG_SWITCH_CONT 0x1F 63 67 64 68 /* Regulator Control Registers */ 65 69 #define DA9063_REG_BCORE2_CONT 0x20 ··· 79 83 #define DA9063_REG_LDO9_CONT 0x2E 80 84 #define DA9063_REG_LDO10_CONT 0x2F 81 85 #define DA9063_REG_LDO11_CONT 0x30 82 - #define DA9063_REG_VIB 0x31 86 + #define DA9063_REG_SUPPLIES 0x31 83 87 #define DA9063_REG_DVC_1 0x32 84 88 #define DA9063_REG_DVC_2 0x33 85 89 ··· 93 97 #define DA9063_REG_ADCIN1_RES 0x3A 94 98 #define DA9063_REG_ADCIN2_RES 0x3B 95 99 #define DA9063_REG_ADCIN3_RES 0x3C 96 - #define DA9063_REG_MON1_RES 0x3D 97 - #define DA9063_REG_MON2_RES 0x3E 98 - #define DA9063_REG_MON3_RES 0x3F 100 + #define DA9063_REG_MON_A8_RES 0x3D 101 + #define DA9063_REG_MON_A9_RES 0x3E 102 + #define DA9063_REG_MON_A10_RES 0x3F 99 103 100 104 /* RTC Calendar and Alarm Registers */ 101 105 #define DA9063_REG_COUNT_S 0x40 ··· 104 108 #define DA9063_REG_COUNT_D 0x43 105 109 #define DA9063_REG_COUNT_MO 0x44 106 110 #define DA9063_REG_COUNT_Y 0x45 107 - #define DA9063_REG_ALARM_MI 0x46 108 - #define DA9063_REG_ALARM_H 0x47 109 - #define DA9063_REG_ALARM_D 0x48 110 - #define DA9063_REG_ALARM_MO 0x49 111 - #define DA9063_REG_ALARM_Y 0x4A 112 - #define DA9063_REG_SECOND_A 0x4B 113 - #define DA9063_REG_SECOND_B 0x4C 114 - #define DA9063_REG_SECOND_C 0x4D 115 - #define DA9063_REG_SECOND_D 0x4E 111 + #define DA9063_REG_ALARM_S 0x46 112 + #define DA9063_REG_ALARM_MI 0x47 113 + #define DA9063_REG_ALARM_H 0x48 114 + #define DA9063_REG_ALARM_D 0x49 115 + #define DA9063_REG_ALARM_MO 0x4A 116 + #define DA9063_REG_ALARM_Y 0x4B 117 + #define DA9063_REG_SECOND_A 0x4C 118 + #define DA9063_REG_SECOND_B 0x4D 119 + #define DA9063_REG_SECOND_C 0x4E 120 + #define DA9063_REG_SECOND_D 0x4F 116 121 117 122 /* Sequencer Control Registers */ 118 123 #define DA9063_REG_SEQ 0x81 ··· 223 226 #define DA9063_REG_CONFIG_J 0x10F 224 227 #define DA9063_REG_CONFIG_K 0x110 225 228 #define DA9063_REG_CONFIG_L 0x111 226 - #define DA9063_REG_MON_REG_1 0x112 227 - #define DA9063_REG_MON_REG_2 0x113 228 - #define DA9063_REG_MON_REG_3 0x114 229 - #define DA9063_REG_MON_REG_4 0x115 230 - #define DA9063_REG_MON_REG_5 0x116 231 - #define DA9063_REG_MON_REG_6 0x117 232 - #define DA9063_REG_TRIM_CLDR 0x118 229 + #define DA9063_REG_CONFIG_M 0x112 230 + #define DA9063_REG_CONFIG_N 0x113 233 231 232 + #define DA9063_REG_MON_REG_1 0x114 233 + #define DA9063_REG_MON_REG_2 0x115 234 + #define DA9063_REG_MON_REG_3 0x116 235 + #define DA9063_REG_MON_REG_4 0x117 236 + #define DA9063_REG_MON_REG_5 0x11E 237 + #define DA9063_REG_MON_REG_6 0x11F 238 + #define DA9063_REG_TRIM_CLDR 0x120 234 239 /* General Purpose Registers */ 235 - #define DA9063_REG_GP_ID_0 0x119 236 - #define DA9063_REG_GP_ID_1 0x11A 237 - #define DA9063_REG_GP_ID_2 0x11B 238 - #define DA9063_REG_GP_ID_3 0x11C 239 - #define DA9063_REG_GP_ID_4 0x11D 240 - #define DA9063_REG_GP_ID_5 0x11E 241 - #define DA9063_REG_GP_ID_6 0x11F 242 - #define DA9063_REG_GP_ID_7 0x120 243 - #define DA9063_REG_GP_ID_8 0x121 244 - #define DA9063_REG_GP_ID_9 0x122 245 - #define DA9063_REG_GP_ID_10 0x123 246 - #define DA9063_REG_GP_ID_11 0x124 247 - #define DA9063_REG_GP_ID_12 0x125 248 - #define DA9063_REG_GP_ID_13 0x126 249 - #define DA9063_REG_GP_ID_14 0x127 250 - #define DA9063_REG_GP_ID_15 0x128 251 - #define DA9063_REG_GP_ID_16 0x129 252 - #define DA9063_REG_GP_ID_17 0x12A 253 - #define DA9063_REG_GP_ID_18 0x12B 254 - #define DA9063_REG_GP_ID_19 0x12C 240 + #define DA9063_REG_GP_ID_0 0x121 241 + #define DA9063_REG_GP_ID_1 0x122 242 + #define DA9063_REG_GP_ID_2 0x123 243 + #define DA9063_REG_GP_ID_3 0x124 244 + #define DA9063_REG_GP_ID_4 0x125 245 + #define DA9063_REG_GP_ID_5 0x126 246 + #define DA9063_REG_GP_ID_6 0x127 247 + #define DA9063_REG_GP_ID_7 0x128 248 + #define DA9063_REG_GP_ID_8 0x129 249 + #define DA9063_REG_GP_ID_9 0x12A 250 + #define DA9063_REG_GP_ID_10 0x12B 251 + #define DA9063_REG_GP_ID_11 0x12C 252 + #define DA9063_REG_GP_ID_12 0x12D 253 + #define DA9063_REG_GP_ID_13 0x12E 254 + #define DA9063_REG_GP_ID_14 0x12F 255 + #define DA9063_REG_GP_ID_15 0x130 256 + #define DA9063_REG_GP_ID_16 0x131 257 + #define DA9063_REG_GP_ID_17 0x132 258 + #define DA9063_REG_GP_ID_18 0x133 259 + #define DA9063_REG_GP_ID_19 0x134 255 260 256 261 /* Chip ID and variant */ 257 262 #define DA9063_REG_CHIP_ID 0x181 ··· 404 405 /* DA9063_REG_CONTROL_B (addr=0x0F) */ 405 406 #define DA9063_CHG_SEL 0x01 406 407 #define DA9063_WATCHDOG_PD 0x02 408 + #define DA9063_RESET_BLINKING 0x04 407 409 #define DA9063_NRES_MODE 0x08 408 410 #define DA9063_NONKEY_LOCK 0x10 411 + #define DA9063_BUCK_SLOWSTART 0x80 409 412 410 413 /* DA9063_REG_CONTROL_C (addr=0x10) */ 411 414 #define DA9063_DEBOUNCING_MASK 0x07 ··· 467 466 #define DA9063_GPADC_PAUSE 0x02 468 467 #define DA9063_PMIF_DIS 0x04 469 468 #define DA9063_HS2WIRE_DIS 0x08 469 + #define DA9063_CLDR_PAUSE 0x10 470 470 #define DA9063_BBAT_DIS 0x20 471 471 #define DA9063_OUT_32K_PAUSE 0x40 472 472 #define DA9063_PMCONT_DIS 0x80 ··· 662 660 #define DA9063_GPIO15_TYPE_GPO 0x04 663 661 #define DA9063_GPIO15_NO_WAKEUP 0x80 664 662 665 - /* DA9063_REG_GPIO_MODE_0_7 (addr=0x1D) */ 663 + /* DA9063_REG_GPIO_MODE0_7 (addr=0x1D) */ 666 664 #define DA9063_GPIO0_MODE 0x01 667 665 #define DA9063_GPIO1_MODE 0x02 668 666 #define DA9063_GPIO2_MODE 0x04 ··· 672 670 #define DA9063_GPIO6_MODE 0x40 673 671 #define DA9063_GPIO7_MODE 0x80 674 672 675 - /* DA9063_REG_GPIO_MODE_8_15 (addr=0x1E) */ 673 + /* DA9063_REG_GPIO_MODE8_15 (addr=0x1E) */ 676 674 #define DA9063_GPIO8_MODE 0x01 677 675 #define DA9063_GPIO9_MODE 0x02 678 676 #define DA9063_GPIO10_MODE 0x04 ··· 704 702 #define DA9063_SWITCH_SR_5MV 0x10 705 703 #define DA9063_SWITCH_SR_10MV 0x20 706 704 #define DA9063_SWITCH_SR_50MV 0x30 707 - #define DA9063_SWITCH_SR_DIS 0x40 705 + #define DA9063_CORE_SW_INTERNAL 0x40 708 706 #define DA9063_CP_EN_MODE 0x80 709 707 710 708 /* DA9063_REGL_Bxxxx_CONT common bits (addr=0x20-0x25) */ 711 709 #define DA9063_BUCK_EN 0x01 712 - #define DA9063_BUCK_GPI_MASK 0x06 710 + #define DA9063_BUCK_GPI_MASK 0x06 713 711 #define DA9063_BUCK_GPI_OFF 0x00 714 712 #define DA9063_BUCK_GPI_GPIO1 0x02 715 713 #define DA9063_BUCK_GPI_GPIO2 0x04 ··· 843 841 #define DA9063_COUNT_YEAR_MASK 0x3F 844 842 #define DA9063_MONITOR 0x40 845 843 846 - /* DA9063_REG_ALARM_MI (addr=0x46) */ 844 + /* DA9063_REG_ALARM_S (addr=0x46) */ 845 + #define DA9063_ALARM_S_MASK 0x3F 847 846 #define DA9063_ALARM_STATUS_ALARM 0x80 848 847 #define DA9063_ALARM_STATUS_TICK 0x40 848 + /* DA9063_REG_ALARM_MI (addr=0x47) */ 849 849 #define DA9063_ALARM_MIN_MASK 0x3F 850 850 851 - /* DA9063_REG_ALARM_H (addr=0x47) */ 851 + /* DA9063_REG_ALARM_H (addr=0x48) */ 852 852 #define DA9063_ALARM_HOUR_MASK 0x1F 853 853 854 - /* DA9063_REG_ALARM_D (addr=0x48) */ 854 + /* DA9063_REG_ALARM_D (addr=0x49) */ 855 855 #define DA9063_ALARM_DAY_MASK 0x1F 856 856 857 - /* DA9063_REG_ALARM_MO (addr=0x49) */ 857 + /* DA9063_REG_ALARM_MO (addr=0x4A) */ 858 858 #define DA9063_TICK_WAKE 0x20 859 859 #define DA9063_TICK_TYPE 0x10 860 860 #define DA9063_TICK_TYPE_SEC 0x00 861 861 #define DA9063_TICK_TYPE_MIN 0x10 862 862 #define DA9063_ALARM_MONTH_MASK 0x0F 863 863 864 - /* DA9063_REG_ALARM_Y (addr=0x4A) */ 864 + /* DA9063_REG_ALARM_Y (addr=0x4B) */ 865 865 #define DA9063_TICK_ON 0x80 866 866 #define DA9063_ALARM_ON 0x40 867 867 #define DA9063_ALARM_YEAR_MASK 0x3F ··· 910 906 911 907 /* DA9063_REG_Bxxxx_CFG common bits (addr=0x9D-0xA2) */ 912 908 #define DA9063_BUCK_FB_MASK 0x07 913 - #define DA9063_BUCK_PD_DIS_SHIFT 5 909 + #define DA9063_BUCK_PD_DIS_MASK 0x20 914 910 #define DA9063_BUCK_MODE_MASK 0xC0 915 911 #define DA9063_BUCK_MODE_MANUAL 0x00 916 912 #define DA9063_BUCK_MODE_SLEEP 0x40