drm/i915: Simplify vlv_wait_port_ready() arguments

Currently vlv_wait_port_ready() takes the display+dig_port,
but all it really needs is the encoder. The display can be
dug out from therein.

Signed-off-by: Ville Syrjälä <[e-mail]>
Link: https://patchwork.freedesktop.org/patch/msgid/[e-mail]
Reviewed-by: Jani Nikula <[e-mail]>

drivers/gpu/drm/i915/display/g4x_dp.c

···
 		if (display->platform.cherryview)
 			lane_mask = intel_dp_unused_lane_mask(pipe_config->lane_count);
 
-		vlv_wait_port_ready(display, dp_to_dig_port(intel_dp), lane_mask);
+		vlv_wait_port_ready(encoder, lane_mask);
 	}
 
 	intel_dp_set_power(intel_dp, DP_SET_POWER_D0);

drivers/gpu/drm/i915/display/g4x_hdmi.c

···
 				const struct intel_crtc_state *pipe_config,
 				const struct drm_connector_state *conn_state)
 {
-	struct intel_display *display = to_intel_display(encoder);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 
 	vlv_phy_pre_encoder_enable(encoder, pipe_config);
···
 
 	g4x_hdmi_enable_port(encoder, pipe_config);
 
-	vlv_wait_port_ready(display, dig_port, 0x0);
+	vlv_wait_port_ready(encoder, 0x0);
 }
 
 static void vlv_hdmi_pre_pll_enable(struct intel_atomic_state *state,
···
 				const struct intel_crtc_state *pipe_config,
 				const struct drm_connector_state *conn_state)
 {
-	struct intel_display *display = to_intel_display(encoder);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 
 	chv_phy_pre_encoder_enable(encoder, pipe_config);
···
 
 	g4x_hdmi_enable_port(encoder, pipe_config);
 
-	vlv_wait_port_ready(display, dig_port, 0x0);
+	vlv_wait_port_ready(encoder, 0x0);
 
 	/* Second common lane will stay alive on its own now */
 	chv_phy_release_cl2_override(encoder);

drivers/gpu/drm/i915/display/intel_dpio_phy.c

···
 	vlv_dpio_put(dev_priv);
 }
 
-void vlv_wait_port_ready(struct intel_display *display,
-			 struct intel_digital_port *dig_port,
+void vlv_wait_port_ready(struct intel_encoder *encoder,
 			 unsigned int expected_mask)
 {
+	struct intel_display *display = to_intel_display(encoder);
 	u32 port_mask;
 	i915_reg_t dpll_reg;
 
-	switch (dig_port->base.port) {
+	switch (encoder->port) {
 	default:
-		MISSING_CASE(dig_port->base.port);
+		MISSING_CASE(encoder->port);
 		fallthrough;
 	case PORT_B:
 		port_mask = DPLL_PORTB_READY_MASK;
···
 	if (intel_de_wait(display, dpll_reg, port_mask, expected_mask, 1000))
 		drm_WARN(display->drm, 1,
 			 "timed out waiting for [ENCODER:%d:%s] port ready: got 0x%x, expected 0x%x\n",
-			 dig_port->base.base.base.id, dig_port->base.base.name,
+			 encoder->base.base.id, encoder->base.name,
 			 intel_de_read(display, dpll_reg) & port_mask,
 			 expected_mask);
 }

drivers/gpu/drm/i915/display/intel_dpio_phy.h

···
 				const struct intel_crtc_state *crtc_state);
 void vlv_phy_reset_lanes(struct intel_encoder *encoder,
 			 const struct intel_crtc_state *old_crtc_state);
-void vlv_wait_port_ready(struct intel_display *display,
-			 struct intel_digital_port *dig_port,
+void vlv_wait_port_ready(struct intel_encoder *encoder,
 			 unsigned int expected_mask);
 #else
 static inline void bxt_port_to_phy_channel(struct intel_display *display, enum port port,
···
 				       const struct intel_crtc_state *old_crtc_state)
 {
 }
-static inline void vlv_wait_port_ready(struct intel_display *display,
-				       struct intel_digital_port *dig_port,
+static inline void vlv_wait_port_ready(struct intel_encoder *encoder,
 				       unsigned int expected_mask)
 {
 }