CRIS v32: Clean up nandflash.c for ARTPEC-3 and ETRAX FS.

Clean up issues noticed by Andrew Morton:

- Use a combined struct for allocating the mtd_info and nand_chip structs
instead of using anonymous memory as the example in
Documentation/DocBook/mtdnand.tmpl
- Use kzalloc instead of using kmalloc/memset(0)
- Make crisv32_device_ready static.

+24 -20
+12 -10
arch/cris/arch-v32/drivers/mach-a3/nandflash.c
··· 35 #define ALE_BIT 11 36 #define CE_BIT 12 37 38 /* Bitmask for control pins */ 39 #define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT)) 40 ··· 93 /* 94 * read device ready pin 95 */ 96 - int crisv32_device_ready(struct mtd_info *mtd) 97 { 98 reg_pio_r_din din = REG_RD(pio, regi_pio, r_din); 99 return din.rdy; ··· 107 void __iomem *read_cs; 108 void __iomem *write_cs; 109 110 struct nand_chip *this; 111 int err = 0; 112 ··· 135 REG_WR(pio, regi_pio, rw_oe, oe); 136 137 /* Allocate memory for MTD device structure and private data */ 138 - crisv32_mtd = kmalloc(sizeof(struct mtd_info) + 139 - sizeof(struct nand_chip), GFP_KERNEL); 140 - if (!crisv32_mtd) { 141 printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD " 142 "device structure.\n"); 143 err = -ENOMEM; ··· 147 rw_io_access0); 148 149 /* Get pointer to private data */ 150 - this = (struct nand_chip *) (&crisv32_mtd[1]); 151 - 152 - /* Initialize structures */ 153 - memset((char *) crisv32_mtd, 0, sizeof(struct mtd_info)); 154 - memset((char *) this, 0, sizeof(struct nand_chip)); 155 156 /* Link the private data with the MTD structure */ 157 crisv32_mtd->priv = this; ··· 174 return crisv32_mtd; 175 176 out_mtd: 177 - kfree(crisv32_mtd); 178 return NULL; 179 } 180
··· 35 #define ALE_BIT 11 36 #define CE_BIT 12 37 38 + struct mtd_info_wrapper { 39 + struct mtd_info info; 40 + struct nand_chip chip; 41 + }; 42 + 43 /* Bitmask for control pins */ 44 #define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT)) 45 ··· 88 /* 89 * read device ready pin 90 */ 91 + static int crisv32_device_ready(struct mtd_info *mtd) 92 { 93 reg_pio_r_din din = REG_RD(pio, regi_pio, r_din); 94 return din.rdy; ··· 102 void __iomem *read_cs; 103 void __iomem *write_cs; 104 105 + struct mtd_info_wrapper *wrapper; 106 struct nand_chip *this; 107 int err = 0; 108 ··· 129 REG_WR(pio, regi_pio, rw_oe, oe); 130 131 /* Allocate memory for MTD device structure and private data */ 132 + wrapper = kzalloc(sizeof(struct mtd_info_wrapper), GFP_KERNEL); 133 + if (!wrapper) { 134 printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD " 135 "device structure.\n"); 136 err = -ENOMEM; ··· 142 rw_io_access0); 143 144 /* Get pointer to private data */ 145 + this = &wrapper->chip; 146 + crisv32_mtd = &wrapper->info; 147 148 /* Link the private data with the MTD structure */ 149 crisv32_mtd->priv = this; ··· 172 return crisv32_mtd; 173 174 out_mtd: 175 + kfree(wrapper); 176 return NULL; 177 } 178
+12 -10
arch/cris/arch-v32/drivers/mach-fs/nandflash.c
··· 30 #define ALE_BIT 6 31 #define BY_BIT 7 32 33 /* Bitmask for control pins */ 34 #define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT)) 35 ··· 88 /* 89 * read device ready pin 90 */ 91 - int crisv32_device_ready(struct mtd_info *mtd) 92 { 93 reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din); 94 return ((din.data & (1 << BY_BIT)) >> BY_BIT); ··· 105 reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core, 106 rw_grp3_cfg); 107 reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe); 108 struct nand_chip *this; 109 int err = 0; 110 111 /* Allocate memory for MTD device structure and private data */ 112 - crisv32_mtd = kmalloc(sizeof(struct mtd_info) + 113 - sizeof(struct nand_chip), GFP_KERNEL); 114 - if (!crisv32_mtd) { 115 printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD " 116 "device structure.\n"); 117 err = -ENOMEM; ··· 128 } 129 130 /* Get pointer to private data */ 131 - this = (struct nand_chip *) (&crisv32_mtd[1]); 132 133 pa_oe.oe |= 1 << CE_BIT; 134 pa_oe.oe |= 1 << ALE_BIT; ··· 140 bif_cfg.gated_csp0 = regk_bif_core_rd; 141 bif_cfg.gated_csp1 = regk_bif_core_wr; 142 REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg); 143 - 144 - /* Initialize structures */ 145 - memset((char *) crisv32_mtd, 0, sizeof(struct mtd_info)); 146 - memset((char *) this, 0, sizeof(struct nand_chip)); 147 148 /* Link the private data with the MTD structure */ 149 crisv32_mtd->priv = this; ··· 168 iounmap((void *)read_cs); 169 iounmap((void *)write_cs); 170 out_mtd: 171 - kfree(crisv32_mtd); 172 return NULL; 173 } 174
··· 30 #define ALE_BIT 6 31 #define BY_BIT 7 32 33 + struct mtd_info_wrapper { 34 + struct mtd_info info; 35 + struct nand_chip chip; 36 + }; 37 + 38 /* Bitmask for control pins */ 39 #define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT)) 40 ··· 83 /* 84 * read device ready pin 85 */ 86 + static int crisv32_device_ready(struct mtd_info *mtd) 87 { 88 reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din); 89 return ((din.data & (1 << BY_BIT)) >> BY_BIT); ··· 100 reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core, 101 rw_grp3_cfg); 102 reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe); 103 + struct mtd_info_wrapper *wrapper; 104 struct nand_chip *this; 105 int err = 0; 106 107 /* Allocate memory for MTD device structure and private data */ 108 + wrapper = kzalloc(sizeof(struct mtd_info_wrapper), GFP_KERNEL); 109 + if (!wrapper) { 110 printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD " 111 "device structure.\n"); 112 err = -ENOMEM; ··· 123 } 124 125 /* Get pointer to private data */ 126 + this = &wrapper->chip; 127 + crisv32_mtd = &wrapper->info; 128 129 pa_oe.oe |= 1 << CE_BIT; 130 pa_oe.oe |= 1 << ALE_BIT; ··· 134 bif_cfg.gated_csp0 = regk_bif_core_rd; 135 bif_cfg.gated_csp1 = regk_bif_core_wr; 136 REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg); 137 138 /* Link the private data with the MTD structure */ 139 crisv32_mtd->priv = this; ··· 166 iounmap((void *)read_cs); 167 iounmap((void *)write_cs); 168 out_mtd: 169 + kfree(wrapper); 170 return NULL; 171 } 172