Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Input: tegra-kbc - require CONFIG_OF, remove platform data

Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver. Platform data is
therefore no longer required. Delete the header that defines it, and
rework the driver to parse the device tree directly into struct
tegra_kbc.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>

authored by

Stephen Warren and committed by
Dmitry Torokhov
9eee07d3 0b85bf78

+93 -166
+1 -1
drivers/input/keyboard/Kconfig
··· 420 420 421 421 config KEYBOARD_TEGRA 422 422 tristate "NVIDIA Tegra internal matrix keyboard controller support" 423 - depends on ARCH_TEGRA 423 + depends on ARCH_TEGRA && OF 424 424 select INPUT_MATRIXKMAP 425 425 help 426 426 Say Y here if you want to use a matrix keyboard connected directly
+92 -103
drivers/input/keyboard/tegra-kbc.c
··· 29 29 #include <linux/of.h> 30 30 #include <linux/clk.h> 31 31 #include <linux/slab.h> 32 - #include <linux/input/tegra_kbc.h> 32 + #include <linux/input/matrix_keypad.h> 33 33 #include <mach/clk.h> 34 + 35 + #define KBC_MAX_GPIO 24 36 + #define KBC_MAX_KPENT 8 37 + 38 + #define KBC_MAX_ROW 16 39 + #define KBC_MAX_COL 8 40 + #define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL) 34 41 35 42 #define KBC_MAX_DEBOUNCE_CNT 0x3ffu 36 43 ··· 74 67 75 68 #define KBC_ROW_SHIFT 3 76 69 70 + enum tegra_pin_type { 71 + PIN_CFG_IGNORE, 72 + PIN_CFG_COL, 73 + PIN_CFG_ROW, 74 + }; 75 + 76 + struct tegra_kbc_pin_cfg { 77 + enum tegra_pin_type type; 78 + unsigned char num; 79 + }; 80 + 77 81 struct tegra_kbc { 82 + struct device *dev; 83 + unsigned int debounce_cnt; 84 + unsigned int repeat_cnt; 85 + struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO]; 86 + const struct matrix_keymap_data *keymap_data; 87 + bool wakeup; 78 88 void __iomem *mmio; 79 89 struct input_dev *idev; 80 - unsigned int irq; 90 + int irq; 81 91 spinlock_t lock; 82 92 unsigned int repoll_dly; 83 93 unsigned long cp_dly_jiffies; ··· 102 78 bool use_fn_map; 103 79 bool use_ghost_filter; 104 80 bool keypress_caused_wake; 105 - const struct tegra_kbc_platform_data *pdata; 106 81 unsigned short keycode[KBC_MAX_KEY * 2]; 107 82 unsigned short current_keys[KBC_MAX_KPENT]; 108 83 unsigned int num_pressed_keys; ··· 309 286 310 287 static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter) 311 288 { 312 - const struct tegra_kbc_platform_data *pdata = kbc->pdata; 313 289 int i; 314 290 unsigned int rst_val; 315 291 316 292 /* Either mask all keys or none. */ 317 - rst_val = (filter && !pdata->wakeup) ? ~0 : 0; 293 + rst_val = (filter && !kbc->wakeup) ? ~0 : 0; 318 294 319 295 for (i = 0; i < KBC_MAX_ROW; i++) 320 296 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4); ··· 321 299 322 300 static void tegra_kbc_config_pins(struct tegra_kbc *kbc) 323 301 { 324 - const struct tegra_kbc_platform_data *pdata = kbc->pdata; 325 302 int i; 326 303 327 304 for (i = 0; i < KBC_MAX_GPIO; i++) { ··· 336 315 row_cfg &= ~r_mask; 337 316 col_cfg &= ~c_mask; 338 317 339 - switch (pdata->pin_cfg[i].type) { 318 + switch (kbc->pin_cfg[i].type) { 340 319 case PIN_CFG_ROW: 341 - row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft; 320 + row_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << r_shft; 342 321 break; 343 322 344 323 case PIN_CFG_COL: 345 - col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft; 324 + col_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << c_shft; 346 325 break; 347 326 348 327 case PIN_CFG_IGNORE: ··· 356 335 357 336 static int tegra_kbc_start(struct tegra_kbc *kbc) 358 337 { 359 - const struct tegra_kbc_platform_data *pdata = kbc->pdata; 360 338 unsigned int debounce_cnt; 361 339 u32 val = 0; 362 340 ··· 370 350 tegra_kbc_config_pins(kbc); 371 351 tegra_kbc_setup_wakekeys(kbc, false); 372 352 373 - writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0); 353 + writel(kbc->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0); 374 354 375 355 /* Keyboard debounce count is maximum of 12 bits. */ 376 - debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); 356 + debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); 377 357 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt); 378 358 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */ 379 359 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */ ··· 440 420 return tegra_kbc_stop(kbc); 441 421 } 442 422 443 - static bool 444 - tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata, 445 - struct device *dev, unsigned int *num_rows) 423 + static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc, 424 + unsigned int *num_rows) 446 425 { 447 426 int i; 448 427 449 428 *num_rows = 0; 450 429 451 430 for (i = 0; i < KBC_MAX_GPIO; i++) { 452 - const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i]; 431 + const struct tegra_kbc_pin_cfg *pin_cfg = &kbc->pin_cfg[i]; 453 432 454 433 switch (pin_cfg->type) { 455 434 case PIN_CFG_ROW: 456 435 if (pin_cfg->num >= KBC_MAX_ROW) { 457 - dev_err(dev, 436 + dev_err(kbc->dev, 458 437 "pin_cfg[%d]: invalid row number %d\n", 459 438 i, pin_cfg->num); 460 439 return false; ··· 463 444 464 445 case PIN_CFG_COL: 465 446 if (pin_cfg->num >= KBC_MAX_COL) { 466 - dev_err(dev, 447 + dev_err(kbc->dev, 467 448 "pin_cfg[%d]: invalid column number %d\n", 468 449 i, pin_cfg->num); 469 450 return false; ··· 474 455 break; 475 456 476 457 default: 477 - dev_err(dev, 458 + dev_err(kbc->dev, 478 459 "pin_cfg[%d]: invalid entry type %d\n", 479 460 pin_cfg->type, pin_cfg->num); 480 461 return false; ··· 484 465 return true; 485 466 } 486 467 487 - #ifdef CONFIG_OF 488 - static struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata( 489 - struct platform_device *pdev) 468 + static int tegra_kbc_parse_dt(struct tegra_kbc *kbc) 490 469 { 491 - struct tegra_kbc_platform_data *pdata; 492 - struct device_node *np = pdev->dev.of_node; 470 + struct device_node *np = kbc->dev->of_node; 493 471 u32 prop; 494 472 int i; 495 473 u32 num_rows = 0; ··· 496 480 int proplen; 497 481 int ret; 498 482 499 - if (!np) { 500 - dev_err(&pdev->dev, "device tree data is missing\n"); 501 - return ERR_PTR(-ENOENT); 502 - } 503 - 504 - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 505 - if (!pdata) 506 - return ERR_PTR(-ENOMEM); 507 - 508 483 if (!of_property_read_u32(np, "nvidia,debounce-delay-ms", &prop)) 509 - pdata->debounce_cnt = prop; 484 + kbc->debounce_cnt = prop; 510 485 511 486 if (!of_property_read_u32(np, "nvidia,repeat-delay-ms", &prop)) 512 - pdata->repeat_cnt = prop; 487 + kbc->repeat_cnt = prop; 513 488 514 489 if (of_find_property(np, "nvidia,needs-ghost-filter", NULL)) 515 - pdata->use_ghost_filter = true; 490 + kbc->use_ghost_filter = true; 516 491 517 492 if (of_find_property(np, "nvidia,wakeup-source", NULL)) 518 - pdata->wakeup = true; 493 + kbc->wakeup = true; 519 494 520 495 if (!of_get_property(np, "nvidia,kbc-row-pins", &proplen)) { 521 - dev_err(&pdev->dev, "property nvidia,kbc-row-pins not found\n"); 522 - return ERR_PTR(-ENOENT); 496 + dev_err(kbc->dev, "property nvidia,kbc-row-pins not found\n"); 497 + return -ENOENT; 523 498 } 524 499 num_rows = proplen / sizeof(u32); 525 500 526 501 if (!of_get_property(np, "nvidia,kbc-col-pins", &proplen)) { 527 - dev_err(&pdev->dev, "property nvidia,kbc-col-pins not found\n"); 528 - return ERR_PTR(-ENOENT); 502 + dev_err(kbc->dev, "property nvidia,kbc-col-pins not found\n"); 503 + return -ENOENT; 529 504 } 530 505 num_cols = proplen / sizeof(u32); 531 506 532 507 if (!of_get_property(np, "linux,keymap", &proplen)) { 533 - dev_err(&pdev->dev, "property linux,keymap not found\n"); 534 - return ERR_PTR(-ENOENT); 508 + dev_err(kbc->dev, "property linux,keymap not found\n"); 509 + return -ENOENT; 535 510 } 536 511 537 512 if (!num_rows || !num_cols || ((num_rows + num_cols) > KBC_MAX_GPIO)) { 538 - dev_err(&pdev->dev, 513 + dev_err(kbc->dev, 539 514 "keypad rows/columns not porperly specified\n"); 540 - return ERR_PTR(-EINVAL); 515 + return -EINVAL; 541 516 } 542 517 543 518 /* Set all pins as non-configured */ 544 519 for (i = 0; i < KBC_MAX_GPIO; i++) 545 - pdata->pin_cfg[i].type = PIN_CFG_IGNORE; 520 + kbc->pin_cfg[i].type = PIN_CFG_IGNORE; 546 521 547 522 ret = of_property_read_u32_array(np, "nvidia,kbc-row-pins", 548 523 rows_cfg, num_rows); 549 524 if (ret < 0) { 550 - dev_err(&pdev->dev, "Rows configurations are not proper\n"); 551 - return ERR_PTR(-EINVAL); 525 + dev_err(kbc->dev, "Rows configurations are not proper\n"); 526 + return -EINVAL; 552 527 } 553 528 554 529 ret = of_property_read_u32_array(np, "nvidia,kbc-col-pins", 555 530 cols_cfg, num_cols); 556 531 if (ret < 0) { 557 - dev_err(&pdev->dev, "Cols configurations are not proper\n"); 558 - return ERR_PTR(-EINVAL); 532 + dev_err(kbc->dev, "Cols configurations are not proper\n"); 533 + return -EINVAL; 559 534 } 560 535 561 536 for (i = 0; i < num_rows; i++) { 562 - pdata->pin_cfg[rows_cfg[i]].type = PIN_CFG_ROW; 563 - pdata->pin_cfg[rows_cfg[i]].num = i; 537 + kbc->pin_cfg[rows_cfg[i]].type = PIN_CFG_ROW; 538 + kbc->pin_cfg[rows_cfg[i]].num = i; 564 539 } 565 540 566 541 for (i = 0; i < num_cols; i++) { 567 - pdata->pin_cfg[cols_cfg[i]].type = PIN_CFG_COL; 568 - pdata->pin_cfg[cols_cfg[i]].num = i; 542 + kbc->pin_cfg[cols_cfg[i]].type = PIN_CFG_COL; 543 + kbc->pin_cfg[cols_cfg[i]].num = i; 569 544 } 570 545 571 - return pdata; 546 + return 0; 572 547 } 573 - #else 574 - static inline struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata( 575 - struct platform_device *pdev) 576 - { 577 - dev_err(&pdev->dev, "platform data is missing\n"); 578 - return ERR_PTR(-EINVAL); 579 - } 580 - #endif 581 548 582 549 static int tegra_kbc_probe(struct platform_device *pdev) 583 550 { 584 - const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data; 585 551 struct tegra_kbc *kbc; 586 - struct input_dev *input_dev; 587 552 struct resource *res; 588 - int irq; 589 553 int err; 590 554 int num_rows = 0; 591 555 unsigned int debounce_cnt; 592 556 unsigned int scan_time_rows; 593 557 unsigned int keymap_rows = KBC_MAX_KEY; 594 558 595 - if (!pdata) 596 - pdata = tegra_kbc_dt_parse_pdata(pdev); 559 + kbc = devm_kzalloc(&pdev->dev, sizeof(*kbc), GFP_KERNEL); 560 + if (!kbc) { 561 + dev_err(&pdev->dev, "failed to alloc memory for kbc\n"); 562 + return -ENOMEM; 563 + } 597 564 598 - if (IS_ERR(pdata)) 599 - return PTR_ERR(pdata); 565 + kbc->dev = &pdev->dev; 566 + spin_lock_init(&kbc->lock); 600 567 601 - if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows)) 568 + err = tegra_kbc_parse_dt(kbc); 569 + if (err) 570 + return err; 571 + 572 + if (!tegra_kbc_check_pin_cfg(kbc, &num_rows)) 602 573 return -EINVAL; 603 574 604 575 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ··· 594 591 return -ENXIO; 595 592 } 596 593 597 - irq = platform_get_irq(pdev, 0); 598 - if (irq < 0) { 594 + kbc->irq = platform_get_irq(pdev, 0); 595 + if (kbc->irq < 0) { 599 596 dev_err(&pdev->dev, "failed to get keyboard IRQ\n"); 600 597 return -ENXIO; 601 598 } 602 599 603 - kbc = devm_kzalloc(&pdev->dev, sizeof(*kbc), GFP_KERNEL); 604 - if (!kbc) { 605 - dev_err(&pdev->dev, "failed to alloc memory for kbc\n"); 606 - return -ENOMEM; 607 - } 608 - 609 - input_dev = devm_input_allocate_device(&pdev->dev); 610 - if (!input_dev) { 600 + kbc->idev = devm_input_allocate_device(&pdev->dev); 601 + if (!kbc->idev) { 611 602 dev_err(&pdev->dev, "failed to allocate input device\n"); 612 603 return -ENOMEM; 613 604 } 614 605 615 - kbc->pdata = pdata; 616 - kbc->idev = input_dev; 617 - kbc->irq = irq; 618 - spin_lock_init(&kbc->lock); 619 606 setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc); 620 607 621 608 kbc->mmio = devm_request_and_ioremap(&pdev->dev, res); ··· 626 633 * the rows. There is an additional delay before the row scanning 627 634 * starts. The repoll delay is computed in milliseconds. 628 635 */ 629 - debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); 636 + debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); 630 637 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows; 631 - kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt; 638 + kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + kbc->repeat_cnt; 632 639 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS); 633 640 634 - kbc->wakeup_key = pdata->wakeup_key; 635 - kbc->use_fn_map = pdata->use_fn_map; 636 - kbc->use_ghost_filter = pdata->use_ghost_filter; 641 + kbc->idev->name = pdev->name; 642 + kbc->idev->id.bustype = BUS_HOST; 643 + kbc->idev->dev.parent = &pdev->dev; 644 + kbc->idev->open = tegra_kbc_open; 645 + kbc->idev->close = tegra_kbc_close; 637 646 638 - input_dev->name = pdev->name; 639 - input_dev->id.bustype = BUS_HOST; 640 - input_dev->dev.parent = &pdev->dev; 641 - input_dev->open = tegra_kbc_open; 642 - input_dev->close = tegra_kbc_close; 643 - 644 - if (pdata->keymap_data && pdata->use_fn_map) 647 + if (kbc->keymap_data && kbc->use_fn_map) 645 648 keymap_rows *= 2; 646 649 647 - err = matrix_keypad_build_keymap(pdata->keymap_data, NULL, 650 + err = matrix_keypad_build_keymap(kbc->keymap_data, NULL, 648 651 keymap_rows, KBC_MAX_COL, 649 - kbc->keycode, input_dev); 652 + kbc->keycode, kbc->idev); 650 653 if (err) { 651 654 dev_err(&pdev->dev, "failed to setup keymap\n"); 652 655 return err; 653 656 } 654 657 655 - __set_bit(EV_REP, input_dev->evbit); 656 - input_set_capability(input_dev, EV_MSC, MSC_SCAN); 658 + __set_bit(EV_REP, kbc->idev->evbit); 659 + input_set_capability(kbc->idev, EV_MSC, MSC_SCAN); 657 660 658 - input_set_drvdata(input_dev, kbc); 661 + input_set_drvdata(kbc->idev, kbc); 659 662 660 663 err = devm_request_irq(&pdev->dev, kbc->irq, tegra_kbc_isr, 661 664 IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc); ··· 669 680 } 670 681 671 682 platform_set_drvdata(pdev, kbc); 672 - device_init_wakeup(&pdev->dev, pdata->wakeup); 683 + device_init_wakeup(&pdev->dev, kbc->wakeup); 673 684 674 685 return 0; 675 686 }
-62
include/linux/input/tegra_kbc.h
··· 1 - /* 2 - * Platform definitions for tegra-kbc keyboard input driver 3 - * 4 - * Copyright (c) 2010-2011, NVIDIA Corporation. 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, but WITHOUT 12 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 - * more details. 15 - * 16 - * You should have received a copy of the GNU General Public License along 17 - * with this program; if not, write to the Free Software Foundation, Inc., 18 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 19 - */ 20 - 21 - #ifndef ASMARM_ARCH_TEGRA_KBC_H 22 - #define ASMARM_ARCH_TEGRA_KBC_H 23 - 24 - #include <linux/types.h> 25 - #include <linux/input/matrix_keypad.h> 26 - 27 - #define KBC_MAX_GPIO 24 28 - #define KBC_MAX_KPENT 8 29 - 30 - #define KBC_MAX_ROW 16 31 - #define KBC_MAX_COL 8 32 - #define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL) 33 - 34 - enum tegra_pin_type { 35 - PIN_CFG_IGNORE, 36 - PIN_CFG_COL, 37 - PIN_CFG_ROW, 38 - }; 39 - 40 - struct tegra_kbc_pin_cfg { 41 - enum tegra_pin_type type; 42 - unsigned char num; 43 - }; 44 - 45 - struct tegra_kbc_wake_key { 46 - u8 row:4; 47 - u8 col:4; 48 - }; 49 - 50 - struct tegra_kbc_platform_data { 51 - unsigned int debounce_cnt; 52 - unsigned int repeat_cnt; 53 - 54 - struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO]; 55 - const struct matrix_keymap_data *keymap_data; 56 - 57 - u32 wakeup_key; 58 - bool wakeup; 59 - bool use_fn_map; 60 - bool use_ghost_filter; 61 - }; 62 - #endif