tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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mfd: wm8998: Fix defaults array based on testing

My automated test is back and now can check defaults against the actual
hardware. This patch updates the defaults array for the differences
detected and removes a couple of completely unused registers.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

authored by

Charles Keepax and committed by
Lee Jones 9edd83c7 516c95f0

+2 -10
+2 -10
drivers/mfd/wm8998-tables.c
··· 229 229 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ 230 230 { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ 231 231 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ 232 - { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ 233 - { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ 234 232 { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ 235 233 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ 236 234 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ ··· 245 247 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ 246 248 { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ 247 249 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ 248 - { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ 249 - { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ 250 250 { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ 251 251 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ 252 252 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ ··· 316 320 { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ 317 321 { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ 318 322 { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ 319 - { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ 323 + { 0x00000440, 0x002F }, /* R1088 - DRE Enable */ 320 324 { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ 321 325 { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ 322 326 { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ ··· 682 686 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ 683 687 { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ 684 688 { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ 685 - { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ 689 + { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */ 686 690 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ 687 691 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ 688 692 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ ··· 884 888 case ARIZONA_FLL1_CONTROL_5: 885 889 case ARIZONA_FLL1_CONTROL_6: 886 890 case ARIZONA_FLL1_CONTROL_7: 887 - case ARIZONA_FLL1_LOOP_FILTER_TEST_1: 888 - case ARIZONA_FLL1_NCO_TEST_0: 889 891 case ARIZONA_FLL1_SYNCHRONISER_1: 890 892 case ARIZONA_FLL1_SYNCHRONISER_2: 891 893 case ARIZONA_FLL1_SYNCHRONISER_3: ··· 900 906 case ARIZONA_FLL2_CONTROL_5: 901 907 case ARIZONA_FLL2_CONTROL_6: 902 908 case ARIZONA_FLL2_CONTROL_7: 903 - case ARIZONA_FLL2_LOOP_FILTER_TEST_1: 904 - case ARIZONA_FLL2_NCO_TEST_0: 905 909 case ARIZONA_FLL2_SYNCHRONISER_1: 906 910 case ARIZONA_FLL2_SYNCHRONISER_2: 907 911 case ARIZONA_FLL2_SYNCHRONISER_3: