Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

The video driver will be using the newly introduced
dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
control modes at runtime.
Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
Qualcomm SoC SC7180, SDM845, SM7150, SM8150 and SM8450.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
Link: https://lore.kernel.org/r/20250530-switch_gdsc_mode-v5-1-657c56313351@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Taniya Das and committed by
Bjorn Andersson
9ed3eccd 720b1e8f

+9 -9
+1 -1
drivers/clk/qcom/videocc-sc7180.c
··· 166 166 .pd = { 167 167 .name = "vcodec0_gdsc", 168 168 }, 169 - .flags = HW_CTRL, 169 + .flags = HW_CTRL_TRIGGER, 170 170 .pwrsts = PWRSTS_OFF_ON, 171 171 }; 172 172
+2 -2
drivers/clk/qcom/videocc-sdm845.c
··· 260 260 }, 261 261 .cxcs = (unsigned int []){ 0x890, 0x930 }, 262 262 .cxc_count = 2, 263 - .flags = HW_CTRL | POLL_CFG_GDSCR, 263 + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, 264 264 .pwrsts = PWRSTS_OFF_ON, 265 265 }; 266 266 ··· 271 271 }, 272 272 .cxcs = (unsigned int []){ 0x8d0, 0x950 }, 273 273 .cxc_count = 2, 274 - .flags = HW_CTRL | POLL_CFG_GDSCR, 274 + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, 275 275 .pwrsts = PWRSTS_OFF_ON, 276 276 }; 277 277
+2 -2
drivers/clk/qcom/videocc-sm7150.c
··· 271 271 }, 272 272 .cxcs = (unsigned int []){ 0x890, 0x9ec }, 273 273 .cxc_count = 2, 274 - .flags = HW_CTRL | POLL_CFG_GDSCR, 274 + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, 275 275 .pwrsts = PWRSTS_OFF_ON, 276 276 }; 277 277 ··· 282 282 }, 283 283 .cxcs = (unsigned int []){ 0x8d0, 0xa0c }, 284 284 .cxc_count = 2, 285 - .flags = HW_CTRL | POLL_CFG_GDSCR, 285 + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, 286 286 .pwrsts = PWRSTS_OFF_ON, 287 287 }; 288 288
+2 -2
drivers/clk/qcom/videocc-sm8150.c
··· 179 179 .pd = { 180 180 .name = "vcodec0_gdsc", 181 181 }, 182 - .flags = HW_CTRL, 182 + .flags = HW_CTRL_TRIGGER, 183 183 .pwrsts = PWRSTS_OFF_ON, 184 184 }; 185 185 ··· 188 188 .pd = { 189 189 .name = "vcodec1_gdsc", 190 190 }, 191 - .flags = HW_CTRL, 191 + .flags = HW_CTRL_TRIGGER, 192 192 .pwrsts = PWRSTS_OFF_ON, 193 193 }; 194 194 static struct clk_regmap *video_cc_sm8150_clocks[] = {
+2 -2
drivers/clk/qcom/videocc-sm8450.c
··· 348 348 }, 349 349 .pwrsts = PWRSTS_OFF_ON, 350 350 .parent = &video_cc_mvs0c_gdsc.pd, 351 - .flags = RETAIN_FF_ENABLE | HW_CTRL, 351 + .flags = HW_CTRL_TRIGGER | RETAIN_FF_ENABLE, 352 352 }; 353 353 354 354 static struct gdsc video_cc_mvs1c_gdsc = { ··· 373 373 }, 374 374 .pwrsts = PWRSTS_OFF_ON, 375 375 .parent = &video_cc_mvs1c_gdsc.pd, 376 - .flags = RETAIN_FF_ENABLE | HW_CTRL, 376 + .flags = HW_CTRL_TRIGGER | RETAIN_FF_ENABLE, 377 377 }; 378 378 379 379 static struct clk_regmap *video_cc_sm8450_clocks[] = {