clk: versaclock7: Convert to use maple tree register cache

The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]
Signed-off-by: Stephen Boyd <[e-mail]>

drivers/clk/clk-versaclock7.c

···
 	.ranges = vc7_range_cfg,
 	.num_ranges = ARRAY_SIZE(vc7_range_cfg),
 	.volatile_reg = vc7_volatile_reg,
-	.cache_type = REGCACHE_RBTREE,
+	.cache_type = REGCACHE_MAPLE,
 	.can_multi_write = true,
 	.reg_format_endian = REGMAP_ENDIAN_LITTLE,
 	.val_format_endian = REGMAP_ENDIAN_LITTLE,