Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (63 commits)
IB/qib: clean up properly if pci_set_consistent_dma_mask() fails
IB/qib: Allow driver to load if PCIe AER fails
IB/qib: Fix uninitialized pointer if CONFIG_PCI_MSI not set
IB/qib: Fix extra log level in qib_early_err()
RDMA/cxgb4: Remove unnecessary KERN_<level> use
RDMA/cxgb3: Remove unnecessary KERN_<level> use
IB/core: Add link layer type information to sysfs
IB/mlx4: Add VLAN support for IBoE
IB/core: Add VLAN support for IBoE
IB/mlx4: Add support for IBoE
mlx4_en: Change multicast promiscuous mode to support IBoE
mlx4_core: Update data structures and constants for IBoE
mlx4_core: Allow protocol drivers to find corresponding interfaces
IB/uverbs: Return link layer type to userspace for query port operation
IB/srp: Sync buffer before posting send
IB/srp: Use list_first_entry()
IB/srp: Reduce number of BUSY conditions
IB/srp: Eliminate two forward declarations
IB/mlx4: Signal node desc changes to SM by using FW to generate trap 144
IB: Replace EXTRA_CFLAGS with ccflags-y
...

+2678 -733
+11 -1
MAINTAINERS
··· 2973 2973 M: Sean Hefty <sean.hefty@intel.com> 2974 2974 M: Hal Rosenstock <hal.rosenstock@gmail.com> 2975 2975 L: linux-rdma@vger.kernel.org 2976 - W: http://www.openib.org/ 2976 + W: http://www.openfabrics.org/ 2977 2977 Q: http://patchwork.kernel.org/project/linux-rdma/list/ 2978 2978 T: git git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband.git 2979 2979 S: Supported ··· 5130 5130 W: http://www.kernel.dk 5131 5131 S: Maintained 5132 5132 F: drivers/scsi/sr* 5133 + 5134 + SCSI RDMA PROTOCOL (SRP) INITIATOR 5135 + M: David Dillow <dillowda@ornl.gov> 5136 + L: linux-rdma@vger.kernel.org 5137 + S: Supported 5138 + W: http://www.openfabrics.org 5139 + Q: http://patchwork.kernel.org/project/linux-rdma/list/ 5140 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/dad/srp-initiator.git 5141 + F: drivers/infiniband/ulp/srp/ 5142 + F: include/scsi/srp.h 5133 5143 5134 5144 SCSI SG DRIVER 5135 5145 M: Doug Gilbert <dgilbert@interlog.com>
+17 -12
drivers/infiniband/core/agent.c
··· 59 59 struct ib_agent_port_private *entry; 60 60 61 61 list_for_each_entry(entry, &ib_agent_port_list, port_list) { 62 - if (entry->agent[0]->device == device && 63 - entry->agent[0]->port_num == port_num) 62 + if (entry->agent[1]->device == device && 63 + entry->agent[1]->port_num == port_num) 64 64 return entry; 65 65 } 66 66 return NULL; ··· 155 155 goto error1; 156 156 } 157 157 158 - /* Obtain send only MAD agent for SMI QP */ 159 - port_priv->agent[0] = ib_register_mad_agent(device, port_num, 160 - IB_QPT_SMI, NULL, 0, 161 - &agent_send_handler, 162 - NULL, NULL); 163 - if (IS_ERR(port_priv->agent[0])) { 164 - ret = PTR_ERR(port_priv->agent[0]); 165 - goto error2; 158 + if (rdma_port_get_link_layer(device, port_num) == IB_LINK_LAYER_INFINIBAND) { 159 + /* Obtain send only MAD agent for SMI QP */ 160 + port_priv->agent[0] = ib_register_mad_agent(device, port_num, 161 + IB_QPT_SMI, NULL, 0, 162 + &agent_send_handler, 163 + NULL, NULL); 164 + if (IS_ERR(port_priv->agent[0])) { 165 + ret = PTR_ERR(port_priv->agent[0]); 166 + goto error2; 167 + } 166 168 } 167 169 168 170 /* Obtain send only MAD agent for GSI QP */ ··· 184 182 return 0; 185 183 186 184 error3: 187 - ib_unregister_mad_agent(port_priv->agent[0]); 185 + if (port_priv->agent[0]) 186 + ib_unregister_mad_agent(port_priv->agent[0]); 188 187 error2: 189 188 kfree(port_priv); 190 189 error1: ··· 208 205 spin_unlock_irqrestore(&ib_agent_port_list_lock, flags); 209 206 210 207 ib_unregister_mad_agent(port_priv->agent[1]); 211 - ib_unregister_mad_agent(port_priv->agent[0]); 208 + if (port_priv->agent[0]) 209 + ib_unregister_mad_agent(port_priv->agent[0]); 210 + 212 211 kfree(port_priv); 213 212 return 0; 214 213 }
+294 -19
drivers/infiniband/core/cma.c
··· 59 59 #define CMA_CM_RESPONSE_TIMEOUT 20 60 60 #define CMA_MAX_CM_RETRIES 15 61 61 #define CMA_CM_MRA_SETTING (IB_CM_MRA_FLAG_DELAY | 24) 62 + #define CMA_IBOE_PACKET_LIFETIME 18 62 63 63 64 static void cma_add_one(struct ib_device *device); 64 65 static void cma_remove_one(struct ib_device *device); ··· 158 157 struct list_head list; 159 158 void *context; 160 159 struct sockaddr_storage addr; 160 + struct kref mcref; 161 161 }; 162 162 163 163 struct cma_work { ··· 173 171 struct work_struct work; 174 172 struct rdma_id_private *id; 175 173 struct rdma_cm_event event; 174 + }; 175 + 176 + struct iboe_mcast_work { 177 + struct work_struct work; 178 + struct rdma_id_private *id; 179 + struct cma_multicast *mc; 176 180 }; 177 181 178 182 union cma_ip_addr { ··· 289 281 atomic_inc(&cma_dev->refcount); 290 282 id_priv->cma_dev = cma_dev; 291 283 id_priv->id.device = cma_dev->device; 284 + id_priv->id.route.addr.dev_addr.transport = 285 + rdma_node_get_transport(cma_dev->device->node_type); 292 286 list_add_tail(&id_priv->list, &cma_dev->id_list); 293 287 } 294 288 ··· 298 288 { 299 289 if (atomic_dec_and_test(&cma_dev->refcount)) 300 290 complete(&cma_dev->comp); 291 + } 292 + 293 + static inline void release_mc(struct kref *kref) 294 + { 295 + struct cma_multicast *mc = container_of(kref, struct cma_multicast, mcref); 296 + 297 + kfree(mc->multicast.ib); 298 + kfree(mc); 301 299 } 302 300 303 301 static void cma_detach_from_dev(struct rdma_id_private *id_priv) ··· 341 323 return ret; 342 324 } 343 325 326 + static int find_gid_port(struct ib_device *device, union ib_gid *gid, u8 port_num) 327 + { 328 + int i; 329 + int err; 330 + struct ib_port_attr props; 331 + union ib_gid tmp; 332 + 333 + err = ib_query_port(device, port_num, &props); 334 + if (err) 335 + return 1; 336 + 337 + for (i = 0; i < props.gid_tbl_len; ++i) { 338 + err = ib_query_gid(device, port_num, i, &tmp); 339 + if (err) 340 + return 1; 341 + if (!memcmp(&tmp, gid, sizeof tmp)) 342 + return 0; 343 + } 344 + 345 + return -EAGAIN; 346 + } 347 + 344 348 static int cma_acquire_dev(struct rdma_id_private *id_priv) 345 349 { 346 350 struct rdma_dev_addr *dev_addr = &id_priv->id.route.addr.dev_addr; 347 351 struct cma_device *cma_dev; 348 - union ib_gid gid; 352 + union ib_gid gid, iboe_gid; 349 353 int ret = -ENODEV; 354 + u8 port; 355 + enum rdma_link_layer dev_ll = dev_addr->dev_type == ARPHRD_INFINIBAND ? 356 + IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 350 357 351 - rdma_addr_get_sgid(dev_addr, &gid); 358 + iboe_addr_get_sgid(dev_addr, &iboe_gid); 359 + memcpy(&gid, dev_addr->src_dev_addr + 360 + rdma_addr_gid_offset(dev_addr), sizeof gid); 352 361 list_for_each_entry(cma_dev, &dev_list, list) { 353 - ret = ib_find_cached_gid(cma_dev->device, &gid, 354 - &id_priv->id.port_num, NULL); 355 - if (!ret) { 356 - cma_attach_to_dev(id_priv, cma_dev); 357 - break; 362 + for (port = 1; port <= cma_dev->device->phys_port_cnt; ++port) { 363 + if (rdma_port_get_link_layer(cma_dev->device, port) == dev_ll) { 364 + if (rdma_node_get_transport(cma_dev->device->node_type) == RDMA_TRANSPORT_IB && 365 + rdma_port_get_link_layer(cma_dev->device, port) == IB_LINK_LAYER_ETHERNET) 366 + ret = find_gid_port(cma_dev->device, &iboe_gid, port); 367 + else 368 + ret = find_gid_port(cma_dev->device, &gid, port); 369 + 370 + if (!ret) { 371 + id_priv->id.port_num = port; 372 + goto out; 373 + } else if (ret == 1) 374 + break; 375 + } 358 376 } 359 377 } 378 + 379 + out: 380 + if (!ret) 381 + cma_attach_to_dev(id_priv, cma_dev); 382 + 360 383 return ret; 361 384 } 362 385 ··· 615 556 { 616 557 struct rdma_dev_addr *dev_addr = &id_priv->id.route.addr.dev_addr; 617 558 int ret; 559 + u16 pkey; 560 + 561 + if (rdma_port_get_link_layer(id_priv->id.device, id_priv->id.port_num) == 562 + IB_LINK_LAYER_INFINIBAND) 563 + pkey = ib_addr_get_pkey(dev_addr); 564 + else 565 + pkey = 0xffff; 618 566 619 567 ret = ib_find_cached_pkey(id_priv->id.device, id_priv->id.port_num, 620 - ib_addr_get_pkey(dev_addr), 621 - &qp_attr->pkey_index); 568 + pkey, &qp_attr->pkey_index); 622 569 if (ret) 623 570 return ret; 624 571 ··· 802 737 803 738 static void cma_cancel_route(struct rdma_id_private *id_priv) 804 739 { 805 - switch (rdma_node_get_transport(id_priv->id.device->node_type)) { 806 - case RDMA_TRANSPORT_IB: 740 + switch (rdma_port_get_link_layer(id_priv->id.device, id_priv->id.port_num)) { 741 + case IB_LINK_LAYER_INFINIBAND: 807 742 if (id_priv->query) 808 743 ib_sa_cancel_query(id_priv->query_id, id_priv->query); 809 744 break; ··· 881 816 mc = container_of(id_priv->mc_list.next, 882 817 struct cma_multicast, list); 883 818 list_del(&mc->list); 884 - ib_sa_free_multicast(mc->multicast.ib); 885 - kfree(mc); 819 + switch (rdma_port_get_link_layer(id_priv->cma_dev->device, id_priv->id.port_num)) { 820 + case IB_LINK_LAYER_INFINIBAND: 821 + ib_sa_free_multicast(mc->multicast.ib); 822 + kfree(mc); 823 + break; 824 + case IB_LINK_LAYER_ETHERNET: 825 + kref_put(&mc->mcref, release_mc); 826 + break; 827 + default: 828 + break; 829 + } 886 830 } 887 831 } 888 832 ··· 907 833 mutex_lock(&lock); 908 834 if (id_priv->cma_dev) { 909 835 mutex_unlock(&lock); 910 - switch (rdma_node_get_transport(id->device->node_type)) { 836 + switch (rdma_node_get_transport(id_priv->id.device->node_type)) { 911 837 case RDMA_TRANSPORT_IB: 912 838 if (id_priv->cm_id.ib && !IS_ERR(id_priv->cm_id.ib)) 913 839 ib_destroy_cm_id(id_priv->cm_id.ib); ··· 1782 1708 return 0; 1783 1709 } 1784 1710 1711 + static int cma_resolve_iboe_route(struct rdma_id_private *id_priv) 1712 + { 1713 + struct rdma_route *route = &id_priv->id.route; 1714 + struct rdma_addr *addr = &route->addr; 1715 + struct cma_work *work; 1716 + int ret; 1717 + struct sockaddr_in *src_addr = (struct sockaddr_in *)&route->addr.src_addr; 1718 + struct sockaddr_in *dst_addr = (struct sockaddr_in *)&route->addr.dst_addr; 1719 + struct net_device *ndev = NULL; 1720 + u16 vid; 1721 + 1722 + if (src_addr->sin_family != dst_addr->sin_family) 1723 + return -EINVAL; 1724 + 1725 + work = kzalloc(sizeof *work, GFP_KERNEL); 1726 + if (!work) 1727 + return -ENOMEM; 1728 + 1729 + work->id = id_priv; 1730 + INIT_WORK(&work->work, cma_work_handler); 1731 + 1732 + route->path_rec = kzalloc(sizeof *route->path_rec, GFP_KERNEL); 1733 + if (!route->path_rec) { 1734 + ret = -ENOMEM; 1735 + goto err1; 1736 + } 1737 + 1738 + route->num_paths = 1; 1739 + 1740 + if (addr->dev_addr.bound_dev_if) 1741 + ndev = dev_get_by_index(&init_net, addr->dev_addr.bound_dev_if); 1742 + if (!ndev) { 1743 + ret = -ENODEV; 1744 + goto err2; 1745 + } 1746 + 1747 + vid = rdma_vlan_dev_vlan_id(ndev); 1748 + 1749 + iboe_mac_vlan_to_ll(&route->path_rec->sgid, addr->dev_addr.src_dev_addr, vid); 1750 + iboe_mac_vlan_to_ll(&route->path_rec->dgid, addr->dev_addr.dst_dev_addr, vid); 1751 + 1752 + route->path_rec->hop_limit = 1; 1753 + route->path_rec->reversible = 1; 1754 + route->path_rec->pkey = cpu_to_be16(0xffff); 1755 + route->path_rec->mtu_selector = IB_SA_EQ; 1756 + route->path_rec->sl = id_priv->tos >> 5; 1757 + 1758 + route->path_rec->mtu = iboe_get_mtu(ndev->mtu); 1759 + route->path_rec->rate_selector = IB_SA_EQ; 1760 + route->path_rec->rate = iboe_get_rate(ndev); 1761 + dev_put(ndev); 1762 + route->path_rec->packet_life_time_selector = IB_SA_EQ; 1763 + route->path_rec->packet_life_time = CMA_IBOE_PACKET_LIFETIME; 1764 + if (!route->path_rec->mtu) { 1765 + ret = -EINVAL; 1766 + goto err2; 1767 + } 1768 + 1769 + work->old_state = CMA_ROUTE_QUERY; 1770 + work->new_state = CMA_ROUTE_RESOLVED; 1771 + work->event.event = RDMA_CM_EVENT_ROUTE_RESOLVED; 1772 + work->event.status = 0; 1773 + 1774 + queue_work(cma_wq, &work->work); 1775 + 1776 + return 0; 1777 + 1778 + err2: 1779 + kfree(route->path_rec); 1780 + route->path_rec = NULL; 1781 + err1: 1782 + kfree(work); 1783 + return ret; 1784 + } 1785 + 1785 1786 int rdma_resolve_route(struct rdma_cm_id *id, int timeout_ms) 1786 1787 { 1787 1788 struct rdma_id_private *id_priv; ··· 1869 1720 atomic_inc(&id_priv->refcount); 1870 1721 switch (rdma_node_get_transport(id->device->node_type)) { 1871 1722 case RDMA_TRANSPORT_IB: 1872 - ret = cma_resolve_ib_route(id_priv, timeout_ms); 1723 + switch (rdma_port_get_link_layer(id->device, id->port_num)) { 1724 + case IB_LINK_LAYER_INFINIBAND: 1725 + ret = cma_resolve_ib_route(id_priv, timeout_ms); 1726 + break; 1727 + case IB_LINK_LAYER_ETHERNET: 1728 + ret = cma_resolve_iboe_route(id_priv); 1729 + break; 1730 + default: 1731 + ret = -ENOSYS; 1732 + } 1873 1733 break; 1874 1734 case RDMA_TRANSPORT_IWARP: 1875 1735 ret = cma_resolve_iw_route(id_priv, timeout_ms); ··· 1931 1773 goto out; 1932 1774 1933 1775 id_priv->id.route.addr.dev_addr.dev_type = 1934 - (rdma_node_get_transport(cma_dev->device->node_type) == RDMA_TRANSPORT_IB) ? 1776 + (rdma_port_get_link_layer(cma_dev->device, p) == IB_LINK_LAYER_INFINIBAND) ? 1935 1777 ARPHRD_INFINIBAND : ARPHRD_ETHER; 1936 1778 1937 1779 rdma_addr_set_sgid(&id_priv->id.route.addr.dev_addr, &gid); ··· 2916 2758 return 0; 2917 2759 } 2918 2760 2761 + static void iboe_mcast_work_handler(struct work_struct *work) 2762 + { 2763 + struct iboe_mcast_work *mw = container_of(work, struct iboe_mcast_work, work); 2764 + struct cma_multicast *mc = mw->mc; 2765 + struct ib_sa_multicast *m = mc->multicast.ib; 2766 + 2767 + mc->multicast.ib->context = mc; 2768 + cma_ib_mc_handler(0, m); 2769 + kref_put(&mc->mcref, release_mc); 2770 + kfree(mw); 2771 + } 2772 + 2773 + static void cma_iboe_set_mgid(struct sockaddr *addr, union ib_gid *mgid) 2774 + { 2775 + struct sockaddr_in *sin = (struct sockaddr_in *)addr; 2776 + struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)addr; 2777 + 2778 + if (cma_any_addr(addr)) { 2779 + memset(mgid, 0, sizeof *mgid); 2780 + } else if (addr->sa_family == AF_INET6) { 2781 + memcpy(mgid, &sin6->sin6_addr, sizeof *mgid); 2782 + } else { 2783 + mgid->raw[0] = 0xff; 2784 + mgid->raw[1] = 0x0e; 2785 + mgid->raw[2] = 0; 2786 + mgid->raw[3] = 0; 2787 + mgid->raw[4] = 0; 2788 + mgid->raw[5] = 0; 2789 + mgid->raw[6] = 0; 2790 + mgid->raw[7] = 0; 2791 + mgid->raw[8] = 0; 2792 + mgid->raw[9] = 0; 2793 + mgid->raw[10] = 0xff; 2794 + mgid->raw[11] = 0xff; 2795 + *(__be32 *)(&mgid->raw[12]) = sin->sin_addr.s_addr; 2796 + } 2797 + } 2798 + 2799 + static int cma_iboe_join_multicast(struct rdma_id_private *id_priv, 2800 + struct cma_multicast *mc) 2801 + { 2802 + struct iboe_mcast_work *work; 2803 + struct rdma_dev_addr *dev_addr = &id_priv->id.route.addr.dev_addr; 2804 + int err; 2805 + struct sockaddr *addr = (struct sockaddr *)&mc->addr; 2806 + struct net_device *ndev = NULL; 2807 + 2808 + if (cma_zero_addr((struct sockaddr *)&mc->addr)) 2809 + return -EINVAL; 2810 + 2811 + work = kzalloc(sizeof *work, GFP_KERNEL); 2812 + if (!work) 2813 + return -ENOMEM; 2814 + 2815 + mc->multicast.ib = kzalloc(sizeof(struct ib_sa_multicast), GFP_KERNEL); 2816 + if (!mc->multicast.ib) { 2817 + err = -ENOMEM; 2818 + goto out1; 2819 + } 2820 + 2821 + cma_iboe_set_mgid(addr, &mc->multicast.ib->rec.mgid); 2822 + 2823 + mc->multicast.ib->rec.pkey = cpu_to_be16(0xffff); 2824 + if (id_priv->id.ps == RDMA_PS_UDP) 2825 + mc->multicast.ib->rec.qkey = cpu_to_be32(RDMA_UDP_QKEY); 2826 + 2827 + if (dev_addr->bound_dev_if) 2828 + ndev = dev_get_by_index(&init_net, dev_addr->bound_dev_if); 2829 + if (!ndev) { 2830 + err = -ENODEV; 2831 + goto out2; 2832 + } 2833 + mc->multicast.ib->rec.rate = iboe_get_rate(ndev); 2834 + mc->multicast.ib->rec.hop_limit = 1; 2835 + mc->multicast.ib->rec.mtu = iboe_get_mtu(ndev->mtu); 2836 + dev_put(ndev); 2837 + if (!mc->multicast.ib->rec.mtu) { 2838 + err = -EINVAL; 2839 + goto out2; 2840 + } 2841 + iboe_addr_get_sgid(dev_addr, &mc->multicast.ib->rec.port_gid); 2842 + work->id = id_priv; 2843 + work->mc = mc; 2844 + INIT_WORK(&work->work, iboe_mcast_work_handler); 2845 + kref_get(&mc->mcref); 2846 + queue_work(cma_wq, &work->work); 2847 + 2848 + return 0; 2849 + 2850 + out2: 2851 + kfree(mc->multicast.ib); 2852 + out1: 2853 + kfree(work); 2854 + return err; 2855 + } 2856 + 2919 2857 int rdma_join_multicast(struct rdma_cm_id *id, struct sockaddr *addr, 2920 2858 void *context) 2921 2859 { ··· 3038 2784 3039 2785 switch (rdma_node_get_transport(id->device->node_type)) { 3040 2786 case RDMA_TRANSPORT_IB: 3041 - ret = cma_join_ib_multicast(id_priv, mc); 2787 + switch (rdma_port_get_link_layer(id->device, id->port_num)) { 2788 + case IB_LINK_LAYER_INFINIBAND: 2789 + ret = cma_join_ib_multicast(id_priv, mc); 2790 + break; 2791 + case IB_LINK_LAYER_ETHERNET: 2792 + kref_init(&mc->mcref); 2793 + ret = cma_iboe_join_multicast(id_priv, mc); 2794 + break; 2795 + default: 2796 + ret = -EINVAL; 2797 + } 3042 2798 break; 3043 2799 default: 3044 2800 ret = -ENOSYS; ··· 3081 2817 ib_detach_mcast(id->qp, 3082 2818 &mc->multicast.ib->rec.mgid, 3083 2819 mc->multicast.ib->rec.mlid); 3084 - ib_sa_free_multicast(mc->multicast.ib); 3085 - kfree(mc); 2820 + if (rdma_node_get_transport(id_priv->cma_dev->device->node_type) == RDMA_TRANSPORT_IB) { 2821 + switch (rdma_port_get_link_layer(id->device, id->port_num)) { 2822 + case IB_LINK_LAYER_INFINIBAND: 2823 + ib_sa_free_multicast(mc->multicast.ib); 2824 + kfree(mc); 2825 + break; 2826 + case IB_LINK_LAYER_ETHERNET: 2827 + kref_put(&mc->mcref, release_mc); 2828 + break; 2829 + default: 2830 + break; 2831 + } 2832 + } 3086 2833 return; 3087 2834 } 3088 2835 }
+4
drivers/infiniband/core/iwcm.c
··· 506 506 qp = cm_id->device->iwcm->get_qp(cm_id->device, iw_param->qpn); 507 507 if (!qp) { 508 508 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 509 + clear_bit(IWCM_F_CONNECT_WAIT, &cm_id_priv->flags); 510 + wake_up_all(&cm_id_priv->connect_wait); 509 511 return -EINVAL; 510 512 } 511 513 cm_id->device->iwcm->add_ref(qp); ··· 567 565 qp = cm_id->device->iwcm->get_qp(cm_id->device, iw_param->qpn); 568 566 if (!qp) { 569 567 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 568 + clear_bit(IWCM_F_CONNECT_WAIT, &cm_id_priv->flags); 569 + wake_up_all(&cm_id_priv->connect_wait); 570 570 return -EINVAL; 571 571 } 572 572 cm_id->device->iwcm->add_ref(qp);
+23 -4
drivers/infiniband/core/mad.c
··· 2598 2598 struct ib_mad_private *recv; 2599 2599 struct ib_mad_list_head *mad_list; 2600 2600 2601 + if (!qp_info->qp) 2602 + return; 2603 + 2601 2604 while (!list_empty(&qp_info->recv_queue.list)) { 2602 2605 2603 2606 mad_list = list_entry(qp_info->recv_queue.list.next, ··· 2642 2639 2643 2640 for (i = 0; i < IB_MAD_QPS_CORE; i++) { 2644 2641 qp = port_priv->qp_info[i].qp; 2642 + if (!qp) 2643 + continue; 2644 + 2645 2645 /* 2646 2646 * PKey index for QP1 is irrelevant but 2647 2647 * one is needed for the Reset to Init transition ··· 2686 2680 } 2687 2681 2688 2682 for (i = 0; i < IB_MAD_QPS_CORE; i++) { 2683 + if (!port_priv->qp_info[i].qp) 2684 + continue; 2685 + 2689 2686 ret = ib_mad_post_receive_mads(&port_priv->qp_info[i], NULL); 2690 2687 if (ret) { 2691 2688 printk(KERN_ERR PFX "Couldn't post receive WRs\n"); ··· 2767 2758 2768 2759 static void destroy_mad_qp(struct ib_mad_qp_info *qp_info) 2769 2760 { 2761 + if (!qp_info->qp) 2762 + return; 2763 + 2770 2764 ib_destroy_qp(qp_info->qp); 2771 2765 kfree(qp_info->snoop_table); 2772 2766 } ··· 2785 2773 struct ib_mad_port_private *port_priv; 2786 2774 unsigned long flags; 2787 2775 char name[sizeof "ib_mad123"]; 2776 + int has_smi; 2788 2777 2789 2778 /* Create new device info */ 2790 2779 port_priv = kzalloc(sizeof *port_priv, GFP_KERNEL); ··· 2801 2788 init_mad_qp(port_priv, &port_priv->qp_info[0]); 2802 2789 init_mad_qp(port_priv, &port_priv->qp_info[1]); 2803 2790 2804 - cq_size = (mad_sendq_size + mad_recvq_size) * 2; 2791 + cq_size = mad_sendq_size + mad_recvq_size; 2792 + has_smi = rdma_port_get_link_layer(device, port_num) == IB_LINK_LAYER_INFINIBAND; 2793 + if (has_smi) 2794 + cq_size *= 2; 2795 + 2805 2796 port_priv->cq = ib_create_cq(port_priv->device, 2806 2797 ib_mad_thread_completion_handler, 2807 2798 NULL, port_priv, cq_size, 0); ··· 2829 2812 goto error5; 2830 2813 } 2831 2814 2832 - ret = create_mad_qp(&port_priv->qp_info[0], IB_QPT_SMI); 2833 - if (ret) 2834 - goto error6; 2815 + if (has_smi) { 2816 + ret = create_mad_qp(&port_priv->qp_info[0], IB_QPT_SMI); 2817 + if (ret) 2818 + goto error6; 2819 + } 2835 2820 ret = create_mad_qp(&port_priv->qp_info[1], IB_QPT_GSI); 2836 2821 if (ret) 2837 2822 goto error7;
+20 -3
drivers/infiniband/core/multicast.c
··· 774 774 int index; 775 775 776 776 dev = container_of(handler, struct mcast_device, event_handler); 777 + if (rdma_port_get_link_layer(dev->device, event->element.port_num) != 778 + IB_LINK_LAYER_INFINIBAND) 779 + return; 780 + 777 781 index = event->element.port_num - dev->start_port; 778 782 779 783 switch (event->event) { ··· 800 796 struct mcast_device *dev; 801 797 struct mcast_port *port; 802 798 int i; 799 + int count = 0; 803 800 804 801 if (rdma_node_get_transport(device->node_type) != RDMA_TRANSPORT_IB) 805 802 return; ··· 818 813 } 819 814 820 815 for (i = 0; i <= dev->end_port - dev->start_port; i++) { 816 + if (rdma_port_get_link_layer(device, dev->start_port + i) != 817 + IB_LINK_LAYER_INFINIBAND) 818 + continue; 821 819 port = &dev->port[i]; 822 820 port->dev = dev; 823 821 port->port_num = dev->start_port + i; ··· 828 820 port->table = RB_ROOT; 829 821 init_completion(&port->comp); 830 822 atomic_set(&port->refcount, 1); 823 + ++count; 824 + } 825 + 826 + if (!count) { 827 + kfree(dev); 828 + return; 831 829 } 832 830 833 831 dev->device = device; ··· 857 843 flush_workqueue(mcast_wq); 858 844 859 845 for (i = 0; i <= dev->end_port - dev->start_port; i++) { 860 - port = &dev->port[i]; 861 - deref_port(port); 862 - wait_for_completion(&port->comp); 846 + if (rdma_port_get_link_layer(device, dev->start_port + i) == 847 + IB_LINK_LAYER_INFINIBAND) { 848 + port = &dev->port[i]; 849 + deref_port(port); 850 + wait_for_completion(&port->comp); 851 + } 863 852 } 864 853 865 854 kfree(dev);
+22 -8
drivers/infiniband/core/sa_query.c
··· 416 416 struct ib_sa_port *port = 417 417 &sa_dev->port[event->element.port_num - sa_dev->start_port]; 418 418 419 + if (rdma_port_get_link_layer(handler->device, port->port_num) != IB_LINK_LAYER_INFINIBAND) 420 + return; 421 + 419 422 spin_lock_irqsave(&port->ah_lock, flags); 420 423 if (port->sm_ah) 421 424 kref_put(&port->sm_ah->ref, free_sm_ah); ··· 496 493 { 497 494 int ret; 498 495 u16 gid_index; 496 + int force_grh; 499 497 500 498 memset(ah_attr, 0, sizeof *ah_attr); 501 499 ah_attr->dlid = be16_to_cpu(rec->dlid); ··· 506 502 ah_attr->port_num = port_num; 507 503 ah_attr->static_rate = rec->rate; 508 504 509 - if (rec->hop_limit > 1) { 505 + force_grh = rdma_port_get_link_layer(device, port_num) == IB_LINK_LAYER_ETHERNET; 506 + 507 + if (rec->hop_limit > 1 || force_grh) { 510 508 ah_attr->ah_flags = IB_AH_GRH; 511 509 ah_attr->grh.dgid = rec->dgid; 512 510 ··· 1013 1007 e = device->phys_port_cnt; 1014 1008 } 1015 1009 1016 - sa_dev = kmalloc(sizeof *sa_dev + 1010 + sa_dev = kzalloc(sizeof *sa_dev + 1017 1011 (e - s + 1) * sizeof (struct ib_sa_port), 1018 1012 GFP_KERNEL); 1019 1013 if (!sa_dev) ··· 1023 1017 sa_dev->end_port = e; 1024 1018 1025 1019 for (i = 0; i <= e - s; ++i) { 1020 + spin_lock_init(&sa_dev->port[i].ah_lock); 1021 + if (rdma_port_get_link_layer(device, i + 1) != IB_LINK_LAYER_INFINIBAND) 1022 + continue; 1023 + 1026 1024 sa_dev->port[i].sm_ah = NULL; 1027 1025 sa_dev->port[i].port_num = i + s; 1028 - spin_lock_init(&sa_dev->port[i].ah_lock); 1029 1026 1030 1027 sa_dev->port[i].agent = 1031 1028 ib_register_mad_agent(device, i + s, IB_QPT_GSI, ··· 1054 1045 goto err; 1055 1046 1056 1047 for (i = 0; i <= e - s; ++i) 1057 - update_sm_ah(&sa_dev->port[i].update_task); 1048 + if (rdma_port_get_link_layer(device, i + 1) == IB_LINK_LAYER_INFINIBAND) 1049 + update_sm_ah(&sa_dev->port[i].update_task); 1058 1050 1059 1051 return; 1060 1052 1061 1053 err: 1062 1054 while (--i >= 0) 1063 - ib_unregister_mad_agent(sa_dev->port[i].agent); 1055 + if (rdma_port_get_link_layer(device, i + 1) == IB_LINK_LAYER_INFINIBAND) 1056 + ib_unregister_mad_agent(sa_dev->port[i].agent); 1064 1057 1065 1058 kfree(sa_dev); 1066 1059 ··· 1082 1071 flush_scheduled_work(); 1083 1072 1084 1073 for (i = 0; i <= sa_dev->end_port - sa_dev->start_port; ++i) { 1085 - ib_unregister_mad_agent(sa_dev->port[i].agent); 1086 - if (sa_dev->port[i].sm_ah) 1087 - kref_put(&sa_dev->port[i].sm_ah->ref, free_sm_ah); 1074 + if (rdma_port_get_link_layer(device, i + 1) == IB_LINK_LAYER_INFINIBAND) { 1075 + ib_unregister_mad_agent(sa_dev->port[i].agent); 1076 + if (sa_dev->port[i].sm_ah) 1077 + kref_put(&sa_dev->port[i].sm_ah->ref, free_sm_ah); 1078 + } 1079 + 1088 1080 } 1089 1081 1090 1082 kfree(sa_dev);
+15
drivers/infiniband/core/sysfs.c
··· 222 222 } 223 223 } 224 224 225 + static ssize_t link_layer_show(struct ib_port *p, struct port_attribute *unused, 226 + char *buf) 227 + { 228 + switch (rdma_port_get_link_layer(p->ibdev, p->port_num)) { 229 + case IB_LINK_LAYER_INFINIBAND: 230 + return sprintf(buf, "%s\n", "InfiniBand"); 231 + case IB_LINK_LAYER_ETHERNET: 232 + return sprintf(buf, "%s\n", "Ethernet"); 233 + default: 234 + return sprintf(buf, "%s\n", "Unknown"); 235 + } 236 + } 237 + 225 238 static PORT_ATTR_RO(state); 226 239 static PORT_ATTR_RO(lid); 227 240 static PORT_ATTR_RO(lid_mask_count); ··· 243 230 static PORT_ATTR_RO(cap_mask); 244 231 static PORT_ATTR_RO(rate); 245 232 static PORT_ATTR_RO(phys_state); 233 + static PORT_ATTR_RO(link_layer); 246 234 247 235 static struct attribute *port_default_attrs[] = { 248 236 &port_attr_state.attr, ··· 254 240 &port_attr_cap_mask.attr, 255 241 &port_attr_rate.attr, 256 242 &port_attr_phys_state.attr, 243 + &port_attr_link_layer.attr, 257 244 NULL 258 245 }; 259 246
+80 -12
drivers/infiniband/core/ucma.c
··· 40 40 #include <linux/in6.h> 41 41 #include <linux/miscdevice.h> 42 42 #include <linux/slab.h> 43 + #include <linux/sysctl.h> 43 44 44 45 #include <rdma/rdma_user_cm.h> 45 46 #include <rdma/ib_marshall.h> ··· 51 50 MODULE_DESCRIPTION("RDMA Userspace Connection Manager Access"); 52 51 MODULE_LICENSE("Dual BSD/GPL"); 53 52 54 - enum { 55 - UCMA_MAX_BACKLOG = 128 53 + static unsigned int max_backlog = 1024; 54 + 55 + static struct ctl_table_header *ucma_ctl_table_hdr; 56 + static ctl_table ucma_ctl_table[] = { 57 + { 58 + .procname = "max_backlog", 59 + .data = &max_backlog, 60 + .maxlen = sizeof max_backlog, 61 + .mode = 0644, 62 + .proc_handler = proc_dointvec, 63 + }, 64 + { } 65 + }; 66 + 67 + static struct ctl_path ucma_ctl_path[] = { 68 + { .procname = "net" }, 69 + { .procname = "rdma_ucm" }, 70 + { } 56 71 }; 57 72 58 73 struct ucma_file { ··· 600 583 } 601 584 } 602 585 586 + static void ucma_copy_iboe_route(struct rdma_ucm_query_route_resp *resp, 587 + struct rdma_route *route) 588 + { 589 + struct rdma_dev_addr *dev_addr; 590 + struct net_device *dev; 591 + u16 vid = 0; 592 + 593 + resp->num_paths = route->num_paths; 594 + switch (route->num_paths) { 595 + case 0: 596 + dev_addr = &route->addr.dev_addr; 597 + dev = dev_get_by_index(&init_net, dev_addr->bound_dev_if); 598 + if (dev) { 599 + vid = rdma_vlan_dev_vlan_id(dev); 600 + dev_put(dev); 601 + } 602 + 603 + iboe_mac_vlan_to_ll((union ib_gid *) &resp->ib_route[0].dgid, 604 + dev_addr->dst_dev_addr, vid); 605 + iboe_addr_get_sgid(dev_addr, 606 + (union ib_gid *) &resp->ib_route[0].sgid); 607 + resp->ib_route[0].pkey = cpu_to_be16(0xffff); 608 + break; 609 + case 2: 610 + ib_copy_path_rec_to_user(&resp->ib_route[1], 611 + &route->path_rec[1]); 612 + /* fall through */ 613 + case 1: 614 + ib_copy_path_rec_to_user(&resp->ib_route[0], 615 + &route->path_rec[0]); 616 + break; 617 + default: 618 + break; 619 + } 620 + } 621 + 603 622 static ssize_t ucma_query_route(struct ucma_file *file, 604 623 const char __user *inbuf, 605 624 int in_len, int out_len) ··· 670 617 671 618 resp.node_guid = (__force __u64) ctx->cm_id->device->node_guid; 672 619 resp.port_num = ctx->cm_id->port_num; 673 - switch (rdma_node_get_transport(ctx->cm_id->device->node_type)) { 674 - case RDMA_TRANSPORT_IB: 675 - ucma_copy_ib_route(&resp, &ctx->cm_id->route); 676 - break; 677 - default: 678 - break; 620 + if (rdma_node_get_transport(ctx->cm_id->device->node_type) == RDMA_TRANSPORT_IB) { 621 + switch (rdma_port_get_link_layer(ctx->cm_id->device, ctx->cm_id->port_num)) { 622 + case IB_LINK_LAYER_INFINIBAND: 623 + ucma_copy_ib_route(&resp, &ctx->cm_id->route); 624 + break; 625 + case IB_LINK_LAYER_ETHERNET: 626 + ucma_copy_iboe_route(&resp, &ctx->cm_id->route); 627 + break; 628 + default: 629 + break; 630 + } 679 631 } 680 632 681 633 out: ··· 744 686 if (IS_ERR(ctx)) 745 687 return PTR_ERR(ctx); 746 688 747 - ctx->backlog = cmd.backlog > 0 && cmd.backlog < UCMA_MAX_BACKLOG ? 748 - cmd.backlog : UCMA_MAX_BACKLOG; 689 + ctx->backlog = cmd.backlog > 0 && cmd.backlog < max_backlog ? 690 + cmd.backlog : max_backlog; 749 691 ret = rdma_listen(ctx->cm_id, ctx->backlog); 750 692 ucma_put_ctx(ctx); 751 693 return ret; ··· 1337 1279 ret = device_create_file(ucma_misc.this_device, &dev_attr_abi_version); 1338 1280 if (ret) { 1339 1281 printk(KERN_ERR "rdma_ucm: couldn't create abi_version attr\n"); 1340 - goto err; 1282 + goto err1; 1283 + } 1284 + 1285 + ucma_ctl_table_hdr = register_sysctl_paths(ucma_ctl_path, ucma_ctl_table); 1286 + if (!ucma_ctl_table_hdr) { 1287 + printk(KERN_ERR "rdma_ucm: couldn't register sysctl paths\n"); 1288 + ret = -ENOMEM; 1289 + goto err2; 1341 1290 } 1342 1291 return 0; 1343 - err: 1292 + err2: 1293 + device_remove_file(ucma_misc.this_device, &dev_attr_abi_version); 1294 + err1: 1344 1295 misc_deregister(&ucma_misc); 1345 1296 return ret; 1346 1297 } 1347 1298 1348 1299 static void __exit ucma_cleanup(void) 1349 1300 { 1301 + unregister_sysctl_table(ucma_ctl_table_hdr); 1350 1302 device_remove_file(ucma_misc.this_device, &dev_attr_abi_version); 1351 1303 misc_deregister(&ucma_misc); 1352 1304 idr_destroy(&ctx_idr);
+111 -27
drivers/infiniband/core/ud_header.c
··· 33 33 34 34 #include <linux/errno.h> 35 35 #include <linux/string.h> 36 + #include <linux/if_ether.h> 36 37 37 38 #include <rdma/ib_pack.h> 38 39 ··· 77 76 .size_bits = 11 }, 78 77 { STRUCT_FIELD(lrh, source_lid), 79 78 .offset_words = 1, 79 + .offset_bits = 16, 80 + .size_bits = 16 } 81 + }; 82 + 83 + static const struct ib_field eth_table[] = { 84 + { STRUCT_FIELD(eth, dmac_h), 85 + .offset_words = 0, 86 + .offset_bits = 0, 87 + .size_bits = 32 }, 88 + { STRUCT_FIELD(eth, dmac_l), 89 + .offset_words = 1, 90 + .offset_bits = 0, 91 + .size_bits = 16 }, 92 + { STRUCT_FIELD(eth, smac_h), 93 + .offset_words = 1, 94 + .offset_bits = 16, 95 + .size_bits = 16 }, 96 + { STRUCT_FIELD(eth, smac_l), 97 + .offset_words = 2, 98 + .offset_bits = 0, 99 + .size_bits = 32 }, 100 + { STRUCT_FIELD(eth, type), 101 + .offset_words = 3, 102 + .offset_bits = 0, 103 + .size_bits = 16 } 104 + }; 105 + 106 + static const struct ib_field vlan_table[] = { 107 + { STRUCT_FIELD(vlan, tag), 108 + .offset_words = 0, 109 + .offset_bits = 0, 110 + .size_bits = 16 }, 111 + { STRUCT_FIELD(vlan, type), 112 + .offset_words = 0, 80 113 .offset_bits = 16, 81 114 .size_bits = 16 } 82 115 }; ··· 215 180 /** 216 181 * ib_ud_header_init - Initialize UD header structure 217 182 * @payload_bytes:Length of packet payload 183 + * @lrh_present: specify if LRH is present 184 + * @eth_present: specify if Eth header is present 185 + * @vlan_present: packet is tagged vlan 218 186 * @grh_present:GRH flag (if non-zero, GRH will be included) 219 - * @immediate_present: specify if immediate data should be used 187 + * @immediate_present: specify if immediate data is present 220 188 * @header:Structure to initialize 221 - * 222 - * ib_ud_header_init() initializes the lrh.link_version, lrh.link_next_header, 223 - * lrh.packet_length, grh.ip_version, grh.payload_length, 224 - * grh.next_header, bth.opcode, bth.pad_count and 225 - * bth.transport_header_version fields of a &struct ib_ud_header given 226 - * the payload length and whether a GRH will be included. 227 189 */ 228 190 void ib_ud_header_init(int payload_bytes, 191 + int lrh_present, 192 + int eth_present, 193 + int vlan_present, 229 194 int grh_present, 230 195 int immediate_present, 231 196 struct ib_ud_header *header) 232 197 { 233 - u16 packet_length; 234 - 235 198 memset(header, 0, sizeof *header); 236 199 237 - header->lrh.link_version = 0; 238 - header->lrh.link_next_header = 239 - grh_present ? IB_LNH_IBA_GLOBAL : IB_LNH_IBA_LOCAL; 240 - packet_length = (IB_LRH_BYTES + 241 - IB_BTH_BYTES + 242 - IB_DETH_BYTES + 243 - payload_bytes + 244 - 4 + /* ICRC */ 245 - 3) / 4; /* round up */ 200 + if (lrh_present) { 201 + u16 packet_length; 246 202 247 - header->grh_present = grh_present; 203 + header->lrh.link_version = 0; 204 + header->lrh.link_next_header = 205 + grh_present ? IB_LNH_IBA_GLOBAL : IB_LNH_IBA_LOCAL; 206 + packet_length = (IB_LRH_BYTES + 207 + IB_BTH_BYTES + 208 + IB_DETH_BYTES + 209 + (grh_present ? IB_GRH_BYTES : 0) + 210 + payload_bytes + 211 + 4 + /* ICRC */ 212 + 3) / 4; /* round up */ 213 + header->lrh.packet_length = cpu_to_be16(packet_length); 214 + } 215 + 216 + if (vlan_present) 217 + header->eth.type = cpu_to_be16(ETH_P_8021Q); 218 + 248 219 if (grh_present) { 249 - packet_length += IB_GRH_BYTES / 4; 250 220 header->grh.ip_version = 6; 251 221 header->grh.payload_length = 252 222 cpu_to_be16((IB_BTH_BYTES + ··· 262 222 header->grh.next_header = 0x1b; 263 223 } 264 224 265 - header->lrh.packet_length = cpu_to_be16(packet_length); 266 - 267 - header->immediate_present = immediate_present; 268 225 if (immediate_present) 269 226 header->bth.opcode = IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE; 270 227 else 271 228 header->bth.opcode = IB_OPCODE_UD_SEND_ONLY; 272 229 header->bth.pad_count = (4 - payload_bytes) & 3; 273 230 header->bth.transport_header_version = 0; 231 + 232 + header->lrh_present = lrh_present; 233 + header->eth_present = eth_present; 234 + header->vlan_present = vlan_present; 235 + header->grh_present = grh_present; 236 + header->immediate_present = immediate_present; 274 237 } 275 238 EXPORT_SYMBOL(ib_ud_header_init); 239 + 240 + /** 241 + * ib_lrh_header_pack - Pack LRH header struct into wire format 242 + * @lrh:unpacked LRH header struct 243 + * @buf:Buffer to pack into 244 + * 245 + * ib_lrh_header_pack() packs the LRH header structure @lrh into 246 + * wire format in the buffer @buf. 247 + */ 248 + int ib_lrh_header_pack(struct ib_unpacked_lrh *lrh, void *buf) 249 + { 250 + ib_pack(lrh_table, ARRAY_SIZE(lrh_table), lrh, buf); 251 + return 0; 252 + } 253 + EXPORT_SYMBOL(ib_lrh_header_pack); 254 + 255 + /** 256 + * ib_lrh_header_unpack - Unpack LRH structure from wire format 257 + * @lrh:unpacked LRH header struct 258 + * @buf:Buffer to pack into 259 + * 260 + * ib_lrh_header_unpack() unpacks the LRH header structure from 261 + * wire format (in buf) into @lrh. 262 + */ 263 + int ib_lrh_header_unpack(void *buf, struct ib_unpacked_lrh *lrh) 264 + { 265 + ib_unpack(lrh_table, ARRAY_SIZE(lrh_table), buf, lrh); 266 + return 0; 267 + } 268 + EXPORT_SYMBOL(ib_lrh_header_unpack); 276 269 277 270 /** 278 271 * ib_ud_header_pack - Pack UD header struct into wire format ··· 320 247 { 321 248 int len = 0; 322 249 323 - ib_pack(lrh_table, ARRAY_SIZE(lrh_table), 324 - &header->lrh, buf); 325 - len += IB_LRH_BYTES; 326 - 250 + if (header->lrh_present) { 251 + ib_pack(lrh_table, ARRAY_SIZE(lrh_table), 252 + &header->lrh, buf + len); 253 + len += IB_LRH_BYTES; 254 + } 255 + if (header->eth_present) { 256 + ib_pack(eth_table, ARRAY_SIZE(eth_table), 257 + &header->eth, buf + len); 258 + len += IB_ETH_BYTES; 259 + } 260 + if (header->vlan_present) { 261 + ib_pack(vlan_table, ARRAY_SIZE(vlan_table), 262 + &header->vlan, buf + len); 263 + len += IB_VLAN_BYTES; 264 + } 327 265 if (header->grh_present) { 328 266 ib_pack(grh_table, ARRAY_SIZE(grh_table), 329 267 &header->grh, buf + len);
+1 -1
drivers/infiniband/core/user_mad.c
··· 1022 1022 1023 1023 port->ib_dev = device; 1024 1024 port->port_num = port_num; 1025 - init_MUTEX(&port->sm_sem); 1025 + sema_init(&port->sm_sem, 1); 1026 1026 mutex_init(&port->file_mutex); 1027 1027 INIT_LIST_HEAD(&port->file_list); 1028 1028
+2
drivers/infiniband/core/uverbs_cmd.c
··· 460 460 resp.active_width = attr.active_width; 461 461 resp.active_speed = attr.active_speed; 462 462 resp.phys_state = attr.phys_state; 463 + resp.link_layer = rdma_port_get_link_layer(file->device->ib_dev, 464 + cmd.port_num); 463 465 464 466 if (copy_to_user((void __user *) (unsigned long) cmd.response, 465 467 &resp, sizeof resp))
+16
drivers/infiniband/core/verbs.c
··· 94 94 } 95 95 EXPORT_SYMBOL(rdma_node_get_transport); 96 96 97 + enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num) 98 + { 99 + if (device->get_link_layer) 100 + return device->get_link_layer(device, port_num); 101 + 102 + switch (rdma_node_get_transport(device->node_type)) { 103 + case RDMA_TRANSPORT_IB: 104 + return IB_LINK_LAYER_INFINIBAND; 105 + case RDMA_TRANSPORT_IWARP: 106 + return IB_LINK_LAYER_ETHERNET; 107 + default: 108 + return IB_LINK_LAYER_UNSPECIFIED; 109 + } 110 + } 111 + EXPORT_SYMBOL(rdma_port_get_link_layer); 112 + 97 113 /* Protection domains */ 98 114 99 115 struct ib_pd *ib_alloc_pd(struct ib_device *device)
+1 -3
drivers/infiniband/hw/amso1100/Kbuild
··· 1 - ifdef CONFIG_INFINIBAND_AMSO1100_DEBUG 2 - EXTRA_CFLAGS += -DDEBUG 3 - endif 1 + ccflags-$(CONFIG_INFINIBAND_AMSO1100_DEBUG) := -DDEBUG 4 2 5 3 obj-$(CONFIG_INFINIBAND_AMSO1100) += iw_c2.o 6 4
+2 -2
drivers/infiniband/hw/amso1100/c2_intr.c
··· 62 62 static void handle_mq(struct c2_dev *c2dev, u32 mq_index) 63 63 { 64 64 if (c2dev->qptr_array[mq_index] == NULL) { 65 - pr_debug(KERN_INFO "handle_mq: stray activity for mq_index=%d\n", 66 - mq_index); 65 + pr_debug("handle_mq: stray activity for mq_index=%d\n", 66 + mq_index); 67 67 return; 68 68 } 69 69
+2 -4
drivers/infiniband/hw/cxgb3/Makefile
··· 1 - EXTRA_CFLAGS += -Idrivers/net/cxgb3 1 + ccflags-y := -Idrivers/net/cxgb3 2 2 3 3 obj-$(CONFIG_INFINIBAND_CXGB3) += iw_cxgb3.o 4 4 5 5 iw_cxgb3-y := iwch_cm.o iwch_ev.o iwch_cq.o iwch_qp.o iwch_mem.o \ 6 6 iwch_provider.o iwch.o cxio_hal.o cxio_resource.o 7 7 8 - ifdef CONFIG_INFINIBAND_CXGB3_DEBUG 9 - EXTRA_CFLAGS += -DDEBUG 10 - endif 8 + ccflags-$(CONFIG_INFINIBAND_CXGB3_DEBUG) += -DDEBUG
+1
drivers/infiniband/hw/cxgb3/cxio_hal.c
··· 160 160 struct rdma_cq_setup setup; 161 161 int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe); 162 162 163 + size += 1; /* one extra page for storing cq-in-err state */ 163 164 cq->cqid = cxio_hal_get_cqid(rdev_p->rscp); 164 165 if (!cq->cqid) 165 166 return -ENOMEM;
+16
drivers/infiniband/hw/cxgb3/cxio_wr.h
··· 728 728 #define CQ_VLD_ENTRY(ptr,size_log2,cqe) (Q_GENBIT(ptr,size_log2) == \ 729 729 CQE_GENBIT(*cqe)) 730 730 731 + struct t3_cq_status_page { 732 + u32 cq_err; 733 + }; 734 + 735 + static inline int cxio_cq_in_error(struct t3_cq *cq) 736 + { 737 + return ((struct t3_cq_status_page *) 738 + &cq->queue[1 << cq->size_log2])->cq_err; 739 + } 740 + 741 + static inline void cxio_set_cq_in_error(struct t3_cq *cq) 742 + { 743 + ((struct t3_cq_status_page *) 744 + &cq->queue[1 << cq->size_log2])->cq_err = 1; 745 + } 746 + 731 747 static inline void cxio_set_wq_in_error(struct t3_wq *wq) 732 748 { 733 749 wq->queue->wq_in_err.err |= 1;
+2 -2
drivers/infiniband/hw/cxgb3/iwch_cm.c
··· 1093 1093 PDBG("%s ep %p credits %u\n", __func__, ep, credits); 1094 1094 1095 1095 if (credits == 0) { 1096 - PDBG(KERN_ERR "%s 0 credit ack ep %p state %u\n", 1097 - __func__, ep, state_read(&ep->com)); 1096 + PDBG("%s 0 credit ack ep %p state %u\n", 1097 + __func__, ep, state_read(&ep->com)); 1098 1098 return CPL_RET_BUF_DONE; 1099 1099 } 1100 1100
+9 -8
drivers/infiniband/hw/cxgb3/iwch_ev.c
··· 76 76 atomic_inc(&qhp->refcnt); 77 77 spin_unlock(&rnicp->lock); 78 78 79 + if (qhp->attr.state == IWCH_QP_STATE_RTS) { 80 + attrs.next_state = IWCH_QP_STATE_TERMINATE; 81 + iwch_modify_qp(qhp->rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, 82 + &attrs, 1); 83 + if (send_term) 84 + iwch_post_terminate(qhp, rsp_msg); 85 + } 86 + 79 87 event.event = ib_event; 80 88 event.device = chp->ibcq.device; 81 89 if (ib_event == IB_EVENT_CQ_ERR) ··· 94 86 if (qhp->ibqp.event_handler) 95 87 (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context); 96 88 97 - if (qhp->attr.state == IWCH_QP_STATE_RTS) { 98 - attrs.next_state = IWCH_QP_STATE_TERMINATE; 99 - iwch_modify_qp(qhp->rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, 100 - &attrs, 1); 101 - if (send_term) 102 - iwch_post_terminate(qhp, rsp_msg); 103 - } 89 + (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); 104 90 105 91 if (atomic_dec_and_test(&qhp->refcnt)) 106 92 wake_up(&qhp->wait); ··· 181 179 case TPT_ERR_BOUND: 182 180 case TPT_ERR_INVALIDATE_SHARED_MR: 183 181 case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: 184 - (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); 185 182 post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_ACCESS_ERR, 1); 186 183 break; 187 184
+19 -5
drivers/infiniband/hw/cxgb3/iwch_provider.c
··· 154 154 struct iwch_create_cq_resp uresp; 155 155 struct iwch_create_cq_req ureq; 156 156 struct iwch_ucontext *ucontext = NULL; 157 + static int warned; 158 + size_t resplen; 157 159 158 160 PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); 159 161 rhp = to_iwch_dev(ibdev); ··· 219 217 uresp.key = ucontext->key; 220 218 ucontext->key += PAGE_SIZE; 221 219 spin_unlock(&ucontext->mmap_lock); 222 - if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) { 220 + mm->key = uresp.key; 221 + mm->addr = virt_to_phys(chp->cq.queue); 222 + if (udata->outlen < sizeof uresp) { 223 + if (!warned++) 224 + printk(KERN_WARNING MOD "Warning - " 225 + "downlevel libcxgb3 (non-fatal).\n"); 226 + mm->len = PAGE_ALIGN((1UL << uresp.size_log2) * 227 + sizeof(struct t3_cqe)); 228 + resplen = sizeof(struct iwch_create_cq_resp_v0); 229 + } else { 230 + mm->len = PAGE_ALIGN(((1UL << uresp.size_log2) + 1) * 231 + sizeof(struct t3_cqe)); 232 + uresp.memsize = mm->len; 233 + resplen = sizeof uresp; 234 + } 235 + if (ib_copy_to_udata(udata, &uresp, resplen)) { 223 236 kfree(mm); 224 237 iwch_destroy_cq(&chp->ibcq); 225 238 return ERR_PTR(-EFAULT); 226 239 } 227 - mm->key = uresp.key; 228 - mm->addr = virt_to_phys(chp->cq.queue); 229 - mm->len = PAGE_ALIGN((1UL << uresp.size_log2) * 230 - sizeof (struct t3_cqe)); 231 240 insert_mmap(ucontext, mm); 232 241 } 233 242 PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n", ··· 1427 1414 dev->ibdev.post_send = iwch_post_send; 1428 1415 dev->ibdev.post_recv = iwch_post_receive; 1429 1416 dev->ibdev.get_protocol_stats = iwch_get_mib; 1417 + dev->ibdev.uverbs_abi_ver = IWCH_UVERBS_ABI_VERSION; 1430 1418 1431 1419 dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); 1432 1420 if (!dev->ibdev.iwcm)
+18 -7
drivers/infiniband/hw/cxgb3/iwch_qp.c
··· 802 802 /* 803 803 * Assumes qhp lock is held. 804 804 */ 805 - static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag) 805 + static void __flush_qp(struct iwch_qp *qhp, struct iwch_cq *rchp, 806 + struct iwch_cq *schp, unsigned long *flag) 806 807 { 807 - struct iwch_cq *rchp, *schp; 808 808 int count; 809 809 int flushed; 810 810 811 - rchp = get_chp(qhp->rhp, qhp->attr.rcq); 812 - schp = get_chp(qhp->rhp, qhp->attr.scq); 813 811 814 812 PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); 815 813 /* take a ref on the qhp since we must release the lock */ ··· 845 847 846 848 static void flush_qp(struct iwch_qp *qhp, unsigned long *flag) 847 849 { 848 - if (qhp->ibqp.uobject) 850 + struct iwch_cq *rchp, *schp; 851 + 852 + rchp = get_chp(qhp->rhp, qhp->attr.rcq); 853 + schp = get_chp(qhp->rhp, qhp->attr.scq); 854 + 855 + if (qhp->ibqp.uobject) { 849 856 cxio_set_wq_in_error(&qhp->wq); 850 - else 851 - __flush_qp(qhp, flag); 857 + cxio_set_cq_in_error(&rchp->cq); 858 + (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 859 + if (schp != rchp) { 860 + cxio_set_cq_in_error(&schp->cq); 861 + (*schp->ibcq.comp_handler)(&schp->ibcq, 862 + schp->ibcq.cq_context); 863 + } 864 + return; 865 + } 866 + __flush_qp(qhp, rchp, schp, flag); 852 867 } 853 868 854 869
+8
drivers/infiniband/hw/cxgb3/iwch_user.h
··· 45 45 __u64 user_rptr_addr; 46 46 }; 47 47 48 + struct iwch_create_cq_resp_v0 { 49 + __u64 key; 50 + __u32 cqid; 51 + __u32 size_log2; 52 + }; 53 + 48 54 struct iwch_create_cq_resp { 49 55 __u64 key; 50 56 __u32 cqid; 51 57 __u32 size_log2; 58 + __u32 memsize; 59 + __u32 reserved; 52 60 }; 53 61 54 62 struct iwch_create_qp_resp {
+1 -1
drivers/infiniband/hw/cxgb4/Makefile
··· 1 - EXTRA_CFLAGS += -Idrivers/net/cxgb4 1 + ccflags-y := -Idrivers/net/cxgb4 2 2 3 3 obj-$(CONFIG_INFINIBAND_CXGB4) += iw_cxgb4.o 4 4
+82 -96
drivers/infiniband/hw/cxgb4/cm.c
··· 117 117 module_param(rcv_win, int, 0644); 118 118 MODULE_PARM_DESC(rcv_win, "TCP receive window in bytes (default=256KB)"); 119 119 120 - static int snd_win = 32 * 1024; 120 + static int snd_win = 128 * 1024; 121 121 module_param(snd_win, int, 0644); 122 - MODULE_PARM_DESC(snd_win, "TCP send window in bytes (default=32KB)"); 122 + MODULE_PARM_DESC(snd_win, "TCP send window in bytes (default=128KB)"); 123 123 124 124 static struct workqueue_struct *workq; 125 125 ··· 172 172 error = cxgb4_l2t_send(rdev->lldi.ports[0], skb, l2e); 173 173 if (error < 0) 174 174 kfree_skb(skb); 175 - return error; 175 + return error < 0 ? error : 0; 176 176 } 177 177 178 178 int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb) ··· 187 187 error = cxgb4_ofld_send(rdev->lldi.ports[0], skb); 188 188 if (error < 0) 189 189 kfree_skb(skb); 190 - return error; 190 + return error < 0 ? error : 0; 191 191 } 192 192 193 193 static void release_tid(struct c4iw_rdev *rdev, u32 hwtid, struct sk_buff *skb) ··· 219 219 220 220 static enum c4iw_ep_state state_read(struct c4iw_ep_common *epc) 221 221 { 222 - unsigned long flags; 223 222 enum c4iw_ep_state state; 224 223 225 - spin_lock_irqsave(&epc->lock, flags); 224 + mutex_lock(&epc->mutex); 226 225 state = epc->state; 227 - spin_unlock_irqrestore(&epc->lock, flags); 226 + mutex_unlock(&epc->mutex); 228 227 return state; 229 228 } 230 229 ··· 234 235 235 236 static void state_set(struct c4iw_ep_common *epc, enum c4iw_ep_state new) 236 237 { 237 - unsigned long flags; 238 - 239 - spin_lock_irqsave(&epc->lock, flags); 238 + mutex_lock(&epc->mutex); 240 239 PDBG("%s - %s -> %s\n", __func__, states[epc->state], states[new]); 241 240 __state_set(epc, new); 242 - spin_unlock_irqrestore(&epc->lock, flags); 241 + mutex_unlock(&epc->mutex); 243 242 return; 244 243 } 245 244 ··· 248 251 epc = kzalloc(size, gfp); 249 252 if (epc) { 250 253 kref_init(&epc->kref); 251 - spin_lock_init(&epc->lock); 252 - init_waitqueue_head(&epc->waitq); 254 + mutex_init(&epc->mutex); 255 + c4iw_init_wr_wait(&epc->wr_wait); 253 256 } 254 257 PDBG("%s alloc ep %p\n", __func__, epc); 255 258 return epc; ··· 1128 1131 { 1129 1132 struct c4iw_ep *ep; 1130 1133 struct cpl_abort_rpl_rss *rpl = cplhdr(skb); 1131 - unsigned long flags; 1132 1134 int release = 0; 1133 1135 unsigned int tid = GET_TID(rpl); 1134 1136 struct tid_info *t = dev->rdev.lldi.tids; ··· 1135 1139 ep = lookup_tid(t, tid); 1136 1140 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); 1137 1141 BUG_ON(!ep); 1138 - spin_lock_irqsave(&ep->com.lock, flags); 1142 + mutex_lock(&ep->com.mutex); 1139 1143 switch (ep->com.state) { 1140 1144 case ABORTING: 1141 1145 __state_set(&ep->com, DEAD); ··· 1146 1150 __func__, ep, ep->com.state); 1147 1151 break; 1148 1152 } 1149 - spin_unlock_irqrestore(&ep->com.lock, flags); 1153 + mutex_unlock(&ep->com.mutex); 1150 1154 1151 1155 if (release) 1152 1156 release_ep_resources(ep); ··· 1209 1213 } 1210 1214 PDBG("%s ep %p status %d error %d\n", __func__, ep, 1211 1215 rpl->status, status2errno(rpl->status)); 1212 - ep->com.rpl_err = status2errno(rpl->status); 1213 - ep->com.rpl_done = 1; 1214 - wake_up(&ep->com.waitq); 1216 + ep->com.wr_wait.ret = status2errno(rpl->status); 1217 + ep->com.wr_wait.done = 1; 1218 + wake_up(&ep->com.wr_wait.wait); 1215 1219 1216 1220 return 0; 1217 1221 } ··· 1245 1249 struct c4iw_listen_ep *ep = lookup_stid(t, stid); 1246 1250 1247 1251 PDBG("%s ep %p\n", __func__, ep); 1248 - ep->com.rpl_err = status2errno(rpl->status); 1249 - ep->com.rpl_done = 1; 1250 - wake_up(&ep->com.waitq); 1252 + ep->com.wr_wait.ret = status2errno(rpl->status); 1253 + ep->com.wr_wait.done = 1; 1254 + wake_up(&ep->com.wr_wait.wait); 1251 1255 return 0; 1252 1256 } 1253 1257 ··· 1474 1478 struct cpl_peer_close *hdr = cplhdr(skb); 1475 1479 struct c4iw_ep *ep; 1476 1480 struct c4iw_qp_attributes attrs; 1477 - unsigned long flags; 1478 1481 int disconnect = 1; 1479 1482 int release = 0; 1480 1483 int closing = 0; ··· 1484 1489 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); 1485 1490 dst_confirm(ep->dst); 1486 1491 1487 - spin_lock_irqsave(&ep->com.lock, flags); 1492 + mutex_lock(&ep->com.mutex); 1488 1493 switch (ep->com.state) { 1489 1494 case MPA_REQ_WAIT: 1490 1495 __state_set(&ep->com, CLOSING); ··· 1502 1507 * in rdma connection migration (see c4iw_accept_cr()). 1503 1508 */ 1504 1509 __state_set(&ep->com, CLOSING); 1505 - ep->com.rpl_done = 1; 1506 - ep->com.rpl_err = -ECONNRESET; 1510 + ep->com.wr_wait.done = 1; 1511 + ep->com.wr_wait.ret = -ECONNRESET; 1507 1512 PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); 1508 - wake_up(&ep->com.waitq); 1513 + wake_up(&ep->com.wr_wait.wait); 1509 1514 break; 1510 1515 case MPA_REP_SENT: 1511 1516 __state_set(&ep->com, CLOSING); 1512 - ep->com.rpl_done = 1; 1513 - ep->com.rpl_err = -ECONNRESET; 1517 + ep->com.wr_wait.done = 1; 1518 + ep->com.wr_wait.ret = -ECONNRESET; 1514 1519 PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); 1515 - wake_up(&ep->com.waitq); 1520 + wake_up(&ep->com.wr_wait.wait); 1516 1521 break; 1517 1522 case FPDU_MODE: 1518 1523 start_ep_timer(ep); ··· 1545 1550 default: 1546 1551 BUG_ON(1); 1547 1552 } 1548 - spin_unlock_irqrestore(&ep->com.lock, flags); 1553 + mutex_unlock(&ep->com.mutex); 1549 1554 if (closing) { 1550 1555 attrs.next_state = C4IW_QP_STATE_CLOSING; 1551 1556 c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, ··· 1576 1581 struct c4iw_qp_attributes attrs; 1577 1582 int ret; 1578 1583 int release = 0; 1579 - unsigned long flags; 1580 1584 struct tid_info *t = dev->rdev.lldi.tids; 1581 1585 unsigned int tid = GET_TID(req); 1582 1586 ··· 1585 1591 ep->hwtid); 1586 1592 return 0; 1587 1593 } 1588 - spin_lock_irqsave(&ep->com.lock, flags); 1589 1594 PDBG("%s ep %p tid %u state %u\n", __func__, ep, ep->hwtid, 1590 1595 ep->com.state); 1596 + 1597 + /* 1598 + * Wake up any threads in rdma_init() or rdma_fini(). 1599 + */ 1600 + ep->com.wr_wait.done = 1; 1601 + ep->com.wr_wait.ret = -ECONNRESET; 1602 + wake_up(&ep->com.wr_wait.wait); 1603 + 1604 + mutex_lock(&ep->com.mutex); 1591 1605 switch (ep->com.state) { 1592 1606 case CONNECTING: 1593 1607 break; ··· 1607 1605 connect_reply_upcall(ep, -ECONNRESET); 1608 1606 break; 1609 1607 case MPA_REP_SENT: 1610 - ep->com.rpl_done = 1; 1611 - ep->com.rpl_err = -ECONNRESET; 1612 - PDBG("waking up ep %p\n", ep); 1613 - wake_up(&ep->com.waitq); 1614 1608 break; 1615 1609 case MPA_REQ_RCVD: 1616 - 1617 - /* 1618 - * We're gonna mark this puppy DEAD, but keep 1619 - * the reference on it until the ULP accepts or 1620 - * rejects the CR. Also wake up anyone waiting 1621 - * in rdma connection migration (see c4iw_accept_cr()). 1622 - */ 1623 - ep->com.rpl_done = 1; 1624 - ep->com.rpl_err = -ECONNRESET; 1625 - PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); 1626 - wake_up(&ep->com.waitq); 1627 1610 break; 1628 1611 case MORIBUND: 1629 1612 case CLOSING: ··· 1631 1644 break; 1632 1645 case DEAD: 1633 1646 PDBG("%s PEER_ABORT IN DEAD STATE!!!!\n", __func__); 1634 - spin_unlock_irqrestore(&ep->com.lock, flags); 1647 + mutex_unlock(&ep->com.mutex); 1635 1648 return 0; 1636 1649 default: 1637 1650 BUG_ON(1); ··· 1642 1655 __state_set(&ep->com, DEAD); 1643 1656 release = 1; 1644 1657 } 1645 - spin_unlock_irqrestore(&ep->com.lock, flags); 1658 + mutex_unlock(&ep->com.mutex); 1646 1659 1647 1660 rpl_skb = get_skb(skb, sizeof(*rpl), GFP_KERNEL); 1648 1661 if (!rpl_skb) { ··· 1668 1681 struct c4iw_ep *ep; 1669 1682 struct c4iw_qp_attributes attrs; 1670 1683 struct cpl_close_con_rpl *rpl = cplhdr(skb); 1671 - unsigned long flags; 1672 1684 int release = 0; 1673 1685 struct tid_info *t = dev->rdev.lldi.tids; 1674 1686 unsigned int tid = GET_TID(rpl); ··· 1678 1692 BUG_ON(!ep); 1679 1693 1680 1694 /* The cm_id may be null if we failed to connect */ 1681 - spin_lock_irqsave(&ep->com.lock, flags); 1695 + mutex_lock(&ep->com.mutex); 1682 1696 switch (ep->com.state) { 1683 1697 case CLOSING: 1684 1698 __state_set(&ep->com, MORIBUND); ··· 1703 1717 BUG_ON(1); 1704 1718 break; 1705 1719 } 1706 - spin_unlock_irqrestore(&ep->com.lock, flags); 1720 + mutex_unlock(&ep->com.mutex); 1707 1721 if (release) 1708 1722 release_ep_resources(ep); 1709 1723 return 0; ··· 1711 1725 1712 1726 static int terminate(struct c4iw_dev *dev, struct sk_buff *skb) 1713 1727 { 1714 - struct c4iw_ep *ep; 1715 - struct cpl_rdma_terminate *term = cplhdr(skb); 1728 + struct cpl_rdma_terminate *rpl = cplhdr(skb); 1716 1729 struct tid_info *t = dev->rdev.lldi.tids; 1717 - unsigned int tid = GET_TID(term); 1730 + unsigned int tid = GET_TID(rpl); 1731 + struct c4iw_ep *ep; 1732 + struct c4iw_qp_attributes attrs; 1718 1733 1719 1734 ep = lookup_tid(t, tid); 1735 + BUG_ON(!ep); 1720 1736 1721 - if (state_read(&ep->com) != FPDU_MODE) 1722 - return 0; 1737 + if (ep->com.qp) { 1738 + printk(KERN_WARNING MOD "TERM received tid %u qpid %u\n", tid, 1739 + ep->com.qp->wq.sq.qid); 1740 + attrs.next_state = C4IW_QP_STATE_TERMINATE; 1741 + c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, 1742 + C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); 1743 + } else 1744 + printk(KERN_WARNING MOD "TERM received tid %u no qp\n", tid); 1723 1745 1724 - PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); 1725 - skb_pull(skb, sizeof *term); 1726 - PDBG("%s saving %d bytes of term msg\n", __func__, skb->len); 1727 - skb_copy_from_linear_data(skb, ep->com.qp->attr.terminate_buffer, 1728 - skb->len); 1729 - ep->com.qp->attr.terminate_msg_len = skb->len; 1730 - ep->com.qp->attr.is_terminate_local = 0; 1731 1746 return 0; 1732 1747 } 1733 1748 ··· 1749 1762 ep = lookup_tid(t, tid); 1750 1763 PDBG("%s ep %p tid %u credits %u\n", __func__, ep, ep->hwtid, credits); 1751 1764 if (credits == 0) { 1752 - PDBG(KERN_ERR "%s 0 credit ack ep %p tid %u state %u\n", 1753 - __func__, ep, ep->hwtid, state_read(&ep->com)); 1765 + PDBG("%s 0 credit ack ep %p tid %u state %u\n", 1766 + __func__, ep, ep->hwtid, state_read(&ep->com)); 1754 1767 return 0; 1755 1768 } 1756 1769 ··· 2029 2042 } 2030 2043 2031 2044 state_set(&ep->com, LISTEN); 2045 + c4iw_init_wr_wait(&ep->com.wr_wait); 2032 2046 err = cxgb4_create_server(ep->com.dev->rdev.lldi.ports[0], ep->stid, 2033 2047 ep->com.local_addr.sin_addr.s_addr, 2034 2048 ep->com.local_addr.sin_port, ··· 2038 2050 goto fail3; 2039 2051 2040 2052 /* wait for pass_open_rpl */ 2041 - wait_event_timeout(ep->com.waitq, ep->com.rpl_done, C4IW_WR_TO); 2042 - if (ep->com.rpl_done) 2043 - err = ep->com.rpl_err; 2044 - else { 2045 - printk(KERN_ERR MOD "Device %s not responding!\n", 2046 - pci_name(ep->com.dev->rdev.lldi.pdev)); 2047 - ep->com.dev->rdev.flags = T4_FATAL_ERROR; 2048 - err = -EIO; 2049 - } 2053 + err = c4iw_wait_for_reply(&ep->com.dev->rdev, &ep->com.wr_wait, 0, 0, 2054 + __func__); 2050 2055 if (!err) { 2051 2056 cm_id->provider_data = ep; 2052 2057 goto out; ··· 2063 2082 2064 2083 might_sleep(); 2065 2084 state_set(&ep->com, DEAD); 2066 - ep->com.rpl_done = 0; 2067 - ep->com.rpl_err = 0; 2085 + c4iw_init_wr_wait(&ep->com.wr_wait); 2068 2086 err = listen_stop(ep); 2069 2087 if (err) 2070 2088 goto done; 2071 - wait_event_timeout(ep->com.waitq, ep->com.rpl_done, C4IW_WR_TO); 2072 - if (ep->com.rpl_done) 2073 - err = ep->com.rpl_err; 2074 - else { 2075 - printk(KERN_ERR MOD "Device %s not responding!\n", 2076 - pci_name(ep->com.dev->rdev.lldi.pdev)); 2077 - ep->com.dev->rdev.flags = T4_FATAL_ERROR; 2078 - err = -EIO; 2079 - } 2089 + err = c4iw_wait_for_reply(&ep->com.dev->rdev, &ep->com.wr_wait, 0, 0, 2090 + __func__); 2080 2091 cxgb4_free_stid(ep->com.dev->rdev.lldi.tids, ep->stid, PF_INET); 2081 2092 done: 2082 2093 cm_id->rem_ref(cm_id); ··· 2079 2106 int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp) 2080 2107 { 2081 2108 int ret = 0; 2082 - unsigned long flags; 2083 2109 int close = 0; 2084 2110 int fatal = 0; 2085 2111 struct c4iw_rdev *rdev; 2086 2112 2087 - spin_lock_irqsave(&ep->com.lock, flags); 2113 + mutex_lock(&ep->com.mutex); 2088 2114 2089 2115 PDBG("%s ep %p state %s, abrupt %d\n", __func__, ep, 2090 2116 states[ep->com.state], abrupt); ··· 2130 2158 break; 2131 2159 } 2132 2160 2133 - spin_unlock_irqrestore(&ep->com.lock, flags); 2161 + mutex_unlock(&ep->com.mutex); 2134 2162 if (close) { 2135 2163 if (abrupt) 2136 2164 ret = abort_connection(ep, NULL, gfp); ··· 2142 2170 if (fatal) 2143 2171 release_ep_resources(ep); 2144 2172 return ret; 2173 + } 2174 + 2175 + static int async_event(struct c4iw_dev *dev, struct sk_buff *skb) 2176 + { 2177 + struct cpl_fw6_msg *rpl = cplhdr(skb); 2178 + c4iw_ev_dispatch(dev, (struct t4_cqe *)&rpl->data[0]); 2179 + return 0; 2145 2180 } 2146 2181 2147 2182 /* ··· 2169 2190 [CPL_ABORT_REQ_RSS] = peer_abort, 2170 2191 [CPL_CLOSE_CON_RPL] = close_con_rpl, 2171 2192 [CPL_RDMA_TERMINATE] = terminate, 2172 - [CPL_FW4_ACK] = fw4_ack 2193 + [CPL_FW4_ACK] = fw4_ack, 2194 + [CPL_FW6_MSG] = async_event 2173 2195 }; 2174 2196 2175 2197 static void process_timeout(struct c4iw_ep *ep) ··· 2178 2198 struct c4iw_qp_attributes attrs; 2179 2199 int abort = 1; 2180 2200 2181 - spin_lock_irq(&ep->com.lock); 2201 + mutex_lock(&ep->com.mutex); 2182 2202 PDBG("%s ep %p tid %u state %d\n", __func__, ep, ep->hwtid, 2183 2203 ep->com.state); 2184 2204 switch (ep->com.state) { ··· 2205 2225 WARN_ON(1); 2206 2226 abort = 0; 2207 2227 } 2208 - spin_unlock_irq(&ep->com.lock); 2228 + mutex_unlock(&ep->com.mutex); 2209 2229 if (abort) 2210 2230 abort_connection(ep, NULL, GFP_KERNEL); 2211 2231 c4iw_put_ep(&ep->com); ··· 2289 2309 printk(KERN_ERR MOD "Unexpected SET_TCB_RPL status %u " 2290 2310 "for tid %u\n", rpl->status, GET_TID(rpl)); 2291 2311 } 2312 + kfree_skb(skb); 2292 2313 return 0; 2293 2314 } 2294 2315 ··· 2304 2323 switch (rpl->type) { 2305 2324 case 1: 2306 2325 ret = (int)((be64_to_cpu(rpl->data[0]) >> 8) & 0xff); 2307 - wr_waitp = (__force struct c4iw_wr_wait *)rpl->data[1]; 2326 + wr_waitp = (struct c4iw_wr_wait *)(__force unsigned long) rpl->data[1]; 2308 2327 PDBG("%s wr_waitp %p ret %u\n", __func__, wr_waitp, ret); 2309 2328 if (wr_waitp) { 2310 - wr_waitp->ret = ret; 2329 + if (ret) 2330 + wr_waitp->ret = -ret; 2331 + else 2332 + wr_waitp->ret = 0; 2311 2333 wr_waitp->done = 1; 2312 2334 wake_up(&wr_waitp->wait); 2313 2335 } 2336 + kfree_skb(skb); 2314 2337 break; 2315 2338 case 2: 2316 - c4iw_ev_dispatch(dev, (struct t4_cqe *)&rpl->data[0]); 2339 + sched(dev, skb); 2317 2340 break; 2318 2341 default: 2319 2342 printk(KERN_ERR MOD "%s unexpected fw6 msg type %u\n", __func__, 2320 2343 rpl->type); 2344 + kfree_skb(skb); 2321 2345 break; 2322 2346 } 2323 2347 return 0;
+10 -18
drivers/infiniband/hw/cxgb4/cq.c
··· 55 55 V_FW_RI_RES_WR_NRES(1) | 56 56 FW_WR_COMPL(1)); 57 57 res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); 58 - res_wr->cookie = (u64)&wr_wait; 58 + res_wr->cookie = (unsigned long) &wr_wait; 59 59 res = res_wr->res; 60 60 res->u.cq.restype = FW_RI_RES_TYPE_CQ; 61 61 res->u.cq.op = FW_RI_RES_OP_RESET; ··· 64 64 c4iw_init_wr_wait(&wr_wait); 65 65 ret = c4iw_ofld_send(rdev, skb); 66 66 if (!ret) { 67 - wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); 68 - if (!wr_wait.done) { 69 - printk(KERN_ERR MOD "Device %s not responding!\n", 70 - pci_name(rdev->lldi.pdev)); 71 - rdev->flags = T4_FATAL_ERROR; 72 - ret = -EIO; 73 - } else 74 - ret = wr_wait.ret; 67 + ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); 75 68 } 76 69 77 70 kfree(cq->sw_queue); ··· 125 132 V_FW_RI_RES_WR_NRES(1) | 126 133 FW_WR_COMPL(1)); 127 134 res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); 128 - res_wr->cookie = (u64)&wr_wait; 135 + res_wr->cookie = (unsigned long) &wr_wait; 129 136 res = res_wr->res; 130 137 res->u.cq.restype = FW_RI_RES_TYPE_CQ; 131 138 res->u.cq.op = FW_RI_RES_OP_WRITE; ··· 150 157 if (ret) 151 158 goto err4; 152 159 PDBG("%s wait_event wr_wait %p\n", __func__, &wr_wait); 153 - wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); 154 - if (!wr_wait.done) { 155 - printk(KERN_ERR MOD "Device %s not responding!\n", 156 - pci_name(rdev->lldi.pdev)); 157 - rdev->flags = T4_FATAL_ERROR; 158 - ret = -EIO; 159 - } else 160 - ret = wr_wait.ret; 160 + ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); 161 161 if (ret) 162 162 goto err4; 163 163 ··· 462 476 goto proc_cqe; 463 477 } 464 478 479 + if (CQE_OPCODE(hw_cqe) == FW_RI_TERMINATE) { 480 + ret = -EAGAIN; 481 + goto skip_cqe; 482 + } 483 + 465 484 /* 466 485 * RECV completion. 467 486 */ ··· 687 696 case T4_ERR_MSN_RANGE: 688 697 case T4_ERR_IRD_OVERFLOW: 689 698 case T4_ERR_OPCODE: 699 + case T4_ERR_INTERNAL_ERR: 690 700 wc->status = IB_WC_FATAL_ERR; 691 701 break; 692 702 case T4_ERR_SWFLUSH:
+117 -86
drivers/infiniband/hw/cxgb4/device.c
··· 49 49 50 50 static struct dentry *c4iw_debugfs_root; 51 51 52 - struct debugfs_qp_data { 52 + struct c4iw_debugfs_data { 53 53 struct c4iw_dev *devp; 54 54 char *buf; 55 55 int bufsize; 56 56 int pos; 57 57 }; 58 58 59 - static int count_qps(int id, void *p, void *data) 59 + static int count_idrs(int id, void *p, void *data) 60 60 { 61 - struct c4iw_qp *qp = p; 62 61 int *countp = data; 63 - 64 - if (id != qp->wq.sq.qid) 65 - return 0; 66 62 67 63 *countp = *countp + 1; 68 64 return 0; 69 65 } 70 66 71 - static int dump_qps(int id, void *p, void *data) 67 + static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count, 68 + loff_t *ppos) 69 + { 70 + struct c4iw_debugfs_data *d = file->private_data; 71 + 72 + return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos); 73 + } 74 + 75 + static int dump_qp(int id, void *p, void *data) 72 76 { 73 77 struct c4iw_qp *qp = p; 74 - struct debugfs_qp_data *qpd = data; 78 + struct c4iw_debugfs_data *qpd = data; 75 79 int space; 76 80 int cc; 77 81 ··· 105 101 106 102 static int qp_release(struct inode *inode, struct file *file) 107 103 { 108 - struct debugfs_qp_data *qpd = file->private_data; 104 + struct c4iw_debugfs_data *qpd = file->private_data; 109 105 if (!qpd) { 110 106 printk(KERN_INFO "%s null qpd?\n", __func__); 111 107 return 0; ··· 117 113 118 114 static int qp_open(struct inode *inode, struct file *file) 119 115 { 120 - struct debugfs_qp_data *qpd; 116 + struct c4iw_debugfs_data *qpd; 121 117 int ret = 0; 122 118 int count = 1; 123 119 ··· 130 126 qpd->pos = 0; 131 127 132 128 spin_lock_irq(&qpd->devp->lock); 133 - idr_for_each(&qpd->devp->qpidr, count_qps, &count); 129 + idr_for_each(&qpd->devp->qpidr, count_idrs, &count); 134 130 spin_unlock_irq(&qpd->devp->lock); 135 131 136 132 qpd->bufsize = count * 128; ··· 141 137 } 142 138 143 139 spin_lock_irq(&qpd->devp->lock); 144 - idr_for_each(&qpd->devp->qpidr, dump_qps, qpd); 140 + idr_for_each(&qpd->devp->qpidr, dump_qp, qpd); 145 141 spin_unlock_irq(&qpd->devp->lock); 146 142 147 143 qpd->buf[qpd->pos++] = 0; ··· 153 149 return ret; 154 150 } 155 151 156 - static ssize_t qp_read(struct file *file, char __user *buf, size_t count, 157 - loff_t *ppos) 158 - { 159 - struct debugfs_qp_data *qpd = file->private_data; 160 - loff_t pos = *ppos; 161 - loff_t avail = qpd->pos; 162 - 163 - if (pos < 0) 164 - return -EINVAL; 165 - if (pos >= avail) 166 - return 0; 167 - if (count > avail - pos) 168 - count = avail - pos; 169 - 170 - while (count) { 171 - size_t len = 0; 172 - 173 - len = min((int)count, (int)qpd->pos - (int)pos); 174 - if (copy_to_user(buf, qpd->buf + pos, len)) 175 - return -EFAULT; 176 - if (len == 0) 177 - return -EINVAL; 178 - 179 - buf += len; 180 - pos += len; 181 - count -= len; 182 - } 183 - count = pos - *ppos; 184 - *ppos = pos; 185 - return count; 186 - } 187 - 188 152 static const struct file_operations qp_debugfs_fops = { 189 153 .owner = THIS_MODULE, 190 154 .open = qp_open, 191 155 .release = qp_release, 192 - .read = qp_read, 156 + .read = debugfs_read, 157 + .llseek = default_llseek, 158 + }; 159 + 160 + static int dump_stag(int id, void *p, void *data) 161 + { 162 + struct c4iw_debugfs_data *stagd = data; 163 + int space; 164 + int cc; 165 + 166 + space = stagd->bufsize - stagd->pos - 1; 167 + if (space == 0) 168 + return 1; 169 + 170 + cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8); 171 + if (cc < space) 172 + stagd->pos += cc; 173 + return 0; 174 + } 175 + 176 + static int stag_release(struct inode *inode, struct file *file) 177 + { 178 + struct c4iw_debugfs_data *stagd = file->private_data; 179 + if (!stagd) { 180 + printk(KERN_INFO "%s null stagd?\n", __func__); 181 + return 0; 182 + } 183 + kfree(stagd->buf); 184 + kfree(stagd); 185 + return 0; 186 + } 187 + 188 + static int stag_open(struct inode *inode, struct file *file) 189 + { 190 + struct c4iw_debugfs_data *stagd; 191 + int ret = 0; 192 + int count = 1; 193 + 194 + stagd = kmalloc(sizeof *stagd, GFP_KERNEL); 195 + if (!stagd) { 196 + ret = -ENOMEM; 197 + goto out; 198 + } 199 + stagd->devp = inode->i_private; 200 + stagd->pos = 0; 201 + 202 + spin_lock_irq(&stagd->devp->lock); 203 + idr_for_each(&stagd->devp->mmidr, count_idrs, &count); 204 + spin_unlock_irq(&stagd->devp->lock); 205 + 206 + stagd->bufsize = count * sizeof("0x12345678\n"); 207 + stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL); 208 + if (!stagd->buf) { 209 + ret = -ENOMEM; 210 + goto err1; 211 + } 212 + 213 + spin_lock_irq(&stagd->devp->lock); 214 + idr_for_each(&stagd->devp->mmidr, dump_stag, stagd); 215 + spin_unlock_irq(&stagd->devp->lock); 216 + 217 + stagd->buf[stagd->pos++] = 0; 218 + file->private_data = stagd; 219 + goto out; 220 + err1: 221 + kfree(stagd); 222 + out: 223 + return ret; 224 + } 225 + 226 + static const struct file_operations stag_debugfs_fops = { 227 + .owner = THIS_MODULE, 228 + .open = stag_open, 229 + .release = stag_release, 230 + .read = debugfs_read, 231 + .llseek = default_llseek, 193 232 }; 194 233 195 234 static int setup_debugfs(struct c4iw_dev *devp) ··· 244 197 245 198 de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root, 246 199 (void *)devp, &qp_debugfs_fops); 200 + if (de && de->d_inode) 201 + de->d_inode->i_size = 4096; 202 + 203 + de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root, 204 + (void *)devp, &stag_debugfs_fops); 247 205 if (de && de->d_inode) 248 206 de->d_inode->i_size = 4096; 249 207 return 0; ··· 342 290 printk(KERN_ERR MOD "error %d initializing rqt pool\n", err); 343 291 goto err3; 344 292 } 293 + err = c4iw_ocqp_pool_create(rdev); 294 + if (err) { 295 + printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err); 296 + goto err4; 297 + } 345 298 return 0; 299 + err4: 300 + c4iw_rqtpool_destroy(rdev); 346 301 err3: 347 302 c4iw_pblpool_destroy(rdev); 348 303 err2: ··· 376 317 idr_destroy(&dev->cqidr); 377 318 idr_destroy(&dev->qpidr); 378 319 idr_destroy(&dev->mmidr); 320 + iounmap(dev->rdev.oc_mw_kva); 379 321 ib_dealloc_device(&dev->ibdev); 380 322 } 381 323 ··· 391 331 return NULL; 392 332 } 393 333 devp->rdev.lldi = *infop; 334 + 335 + devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) + 336 + (pci_resource_len(devp->rdev.lldi.pdev, 2) - 337 + roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size)); 338 + devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa, 339 + devp->rdev.lldi.vr->ocq.size); 340 + 341 + printk(KERN_INFO MOD "ocq memory: " 342 + "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n", 343 + devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size, 344 + devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva); 394 345 395 346 mutex_lock(&dev_mutex); 396 347 ··· 454 383 return dev; 455 384 } 456 385 457 - static struct sk_buff *t4_pktgl_to_skb(const struct pkt_gl *gl, 458 - unsigned int skb_len, 459 - unsigned int pull_len) 460 - { 461 - struct sk_buff *skb; 462 - struct skb_shared_info *ssi; 463 - 464 - if (gl->tot_len <= 512) { 465 - skb = alloc_skb(gl->tot_len, GFP_ATOMIC); 466 - if (unlikely(!skb)) 467 - goto out; 468 - __skb_put(skb, gl->tot_len); 469 - skb_copy_to_linear_data(skb, gl->va, gl->tot_len); 470 - } else { 471 - skb = alloc_skb(skb_len, GFP_ATOMIC); 472 - if (unlikely(!skb)) 473 - goto out; 474 - __skb_put(skb, pull_len); 475 - skb_copy_to_linear_data(skb, gl->va, pull_len); 476 - 477 - ssi = skb_shinfo(skb); 478 - ssi->frags[0].page = gl->frags[0].page; 479 - ssi->frags[0].page_offset = gl->frags[0].page_offset + pull_len; 480 - ssi->frags[0].size = gl->frags[0].size - pull_len; 481 - if (gl->nfrags > 1) 482 - memcpy(&ssi->frags[1], &gl->frags[1], 483 - (gl->nfrags - 1) * sizeof(skb_frag_t)); 484 - ssi->nr_frags = gl->nfrags; 485 - 486 - skb->len = gl->tot_len; 487 - skb->data_len = skb->len - pull_len; 488 - skb->truesize += skb->data_len; 489 - 490 - /* Get a reference for the last page, we don't own it */ 491 - get_page(gl->frags[gl->nfrags - 1].page); 492 - } 493 - out: 494 - return skb; 495 - } 496 - 497 386 static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, 498 387 const struct pkt_gl *gl) 499 388 { ··· 478 447 c4iw_ev_handler(dev, qid); 479 448 return 0; 480 449 } else { 481 - skb = t4_pktgl_to_skb(gl, 128, 128); 450 + skb = cxgb4_pktgl_to_skb(gl, 128, 128); 482 451 if (unlikely(!skb)) 483 452 goto nomem; 484 453 }
+1 -1
drivers/infiniband/hw/cxgb4/ev.c
··· 60 60 if (qhp->attr.state == C4IW_QP_STATE_RTS) { 61 61 attrs.next_state = C4IW_QP_STATE_TERMINATE; 62 62 c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, 63 - &attrs, 1); 63 + &attrs, 0); 64 64 } 65 65 66 66 event.event = ib_event;
+49 -19
drivers/infiniband/hw/cxgb4/iw_cxgb4.h
··· 46 46 #include <linux/timer.h> 47 47 #include <linux/io.h> 48 48 #include <linux/kfifo.h> 49 + #include <linux/mutex.h> 49 50 50 51 #include <asm/byteorder.h> 51 52 ··· 78 77 static inline void *cplhdr(struct sk_buff *skb) 79 78 { 80 79 return skb->data; 81 - } 82 - 83 - #define C4IW_WR_TO (10*HZ) 84 - 85 - struct c4iw_wr_wait { 86 - wait_queue_head_t wait; 87 - int done; 88 - int ret; 89 - }; 90 - 91 - static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp) 92 - { 93 - wr_waitp->ret = 0; 94 - wr_waitp->done = 0; 95 - init_waitqueue_head(&wr_waitp->wait); 96 80 } 97 81 98 82 struct c4iw_resource { ··· 113 127 struct c4iw_dev_ucontext uctx; 114 128 struct gen_pool *pbl_pool; 115 129 struct gen_pool *rqt_pool; 130 + struct gen_pool *ocqp_pool; 116 131 u32 flags; 117 132 struct cxgb4_lld_info lldi; 133 + unsigned long oc_mw_pa; 134 + void __iomem *oc_mw_kva; 118 135 }; 119 136 120 137 static inline int c4iw_fatal_error(struct c4iw_rdev *rdev) ··· 129 140 { 130 141 return min((int)T4_MAX_NUM_STAG, (int)(rdev->lldi.vr->stag.size >> 5)); 131 142 } 143 + 144 + #define C4IW_WR_TO (10*HZ) 145 + 146 + struct c4iw_wr_wait { 147 + wait_queue_head_t wait; 148 + int done; 149 + int ret; 150 + }; 151 + 152 + static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp) 153 + { 154 + wr_waitp->ret = 0; 155 + wr_waitp->done = 0; 156 + init_waitqueue_head(&wr_waitp->wait); 157 + } 158 + 159 + static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev, 160 + struct c4iw_wr_wait *wr_waitp, 161 + u32 hwtid, u32 qpid, 162 + const char *func) 163 + { 164 + unsigned to = C4IW_WR_TO; 165 + do { 166 + 167 + wait_event_timeout(wr_waitp->wait, wr_waitp->done, to); 168 + if (!wr_waitp->done) { 169 + printk(KERN_ERR MOD "%s - Device %s not responding - " 170 + "tid %u qpid %u\n", func, 171 + pci_name(rdev->lldi.pdev), hwtid, qpid); 172 + to = to << 2; 173 + } 174 + } while (!wr_waitp->done); 175 + if (wr_waitp->ret) 176 + printk(KERN_WARNING MOD "%s: FW reply %d tid %u qpid %u\n", 177 + pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid); 178 + return wr_waitp->ret; 179 + } 180 + 132 181 133 182 struct c4iw_dev { 134 183 struct ib_device ibdev; ··· 354 327 struct c4iw_qp_attributes attr; 355 328 struct t4_wq wq; 356 329 spinlock_t lock; 330 + struct mutex mutex; 357 331 atomic_t refcnt; 358 332 wait_queue_head_t wait; 359 333 struct timer_list timer; ··· 607 579 struct c4iw_dev *dev; 608 580 enum c4iw_ep_state state; 609 581 struct kref kref; 610 - spinlock_t lock; 582 + struct mutex mutex; 611 583 struct sockaddr_in local_addr; 612 584 struct sockaddr_in remote_addr; 613 - wait_queue_head_t waitq; 614 - int rpl_done; 615 - int rpl_err; 585 + struct c4iw_wr_wait wr_wait; 616 586 unsigned long flags; 617 587 }; 618 588 ··· 680 654 int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev); 681 655 int c4iw_pblpool_create(struct c4iw_rdev *rdev); 682 656 int c4iw_rqtpool_create(struct c4iw_rdev *rdev); 657 + int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev); 683 658 void c4iw_pblpool_destroy(struct c4iw_rdev *rdev); 684 659 void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev); 660 + void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev); 685 661 void c4iw_destroy_resource(struct c4iw_resource *rscp); 686 662 int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev); 687 663 int c4iw_register_device(struct c4iw_dev *dev); ··· 749 721 void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size); 750 722 u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size); 751 723 void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size); 724 + u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size); 725 + void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size); 752 726 int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb); 753 727 void c4iw_flush_hw_cq(struct t4_cq *cq); 754 728 void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count);
+2 -9
drivers/infiniband/hw/cxgb4/mem.c
··· 71 71 if (i == (num_wqe-1)) { 72 72 req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) | 73 73 FW_WR_COMPL(1)); 74 - req->wr.wr_lo = (__force __be64)&wr_wait; 74 + req->wr.wr_lo = (__force __be64)(unsigned long) &wr_wait; 75 75 } else 76 76 req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR)); 77 77 req->wr.wr_mid = cpu_to_be32( ··· 103 103 len -= C4IW_MAX_INLINE_SIZE; 104 104 } 105 105 106 - wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); 107 - if (!wr_wait.done) { 108 - printk(KERN_ERR MOD "Device %s not responding!\n", 109 - pci_name(rdev->lldi.pdev)); 110 - rdev->flags = T4_FATAL_ERROR; 111 - ret = -EIO; 112 - } else 113 - ret = wr_wait.ret; 106 + ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); 114 107 return ret; 115 108 } 116 109
+32 -12
drivers/infiniband/hw/cxgb4/provider.c
··· 54 54 55 55 #include "iw_cxgb4.h" 56 56 57 - static int fastreg_support; 57 + static int fastreg_support = 1; 58 58 module_param(fastreg_support, int, 0644); 59 - MODULE_PARM_DESC(fastreg_support, "Advertise fastreg support (default=0)"); 59 + MODULE_PARM_DESC(fastreg_support, "Advertise fastreg support (default=1)"); 60 60 61 61 static int c4iw_modify_port(struct ib_device *ibdev, 62 62 u8 port, int port_modify_mask, ··· 149 149 addr = mm->addr; 150 150 kfree(mm); 151 151 152 - if ((addr >= pci_resource_start(rdev->lldi.pdev, 2)) && 153 - (addr < (pci_resource_start(rdev->lldi.pdev, 2) + 154 - pci_resource_len(rdev->lldi.pdev, 2)))) { 152 + if ((addr >= pci_resource_start(rdev->lldi.pdev, 0)) && 153 + (addr < (pci_resource_start(rdev->lldi.pdev, 0) + 154 + pci_resource_len(rdev->lldi.pdev, 0)))) { 155 155 156 156 /* 157 - * Map T4 DB register. 157 + * MA_SYNC register... 158 158 */ 159 - if (vma->vm_flags & VM_READ) 160 - return -EPERM; 161 - 162 159 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 163 - vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND; 164 - vma->vm_flags &= ~VM_MAYREAD; 160 + ret = io_remap_pfn_range(vma, vma->vm_start, 161 + addr >> PAGE_SHIFT, 162 + len, vma->vm_page_prot); 163 + } else if ((addr >= pci_resource_start(rdev->lldi.pdev, 2)) && 164 + (addr < (pci_resource_start(rdev->lldi.pdev, 2) + 165 + pci_resource_len(rdev->lldi.pdev, 2)))) { 166 + 167 + /* 168 + * Map user DB or OCQP memory... 169 + */ 170 + if (addr >= rdev->oc_mw_pa) 171 + vma->vm_page_prot = t4_pgprot_wc(vma->vm_page_prot); 172 + else 173 + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 165 174 ret = io_remap_pfn_range(vma, vma->vm_start, 166 175 addr >> PAGE_SHIFT, 167 176 len, vma->vm_page_prot); ··· 391 382 static int c4iw_get_mib(struct ib_device *ibdev, 392 383 union rdma_protocol_stats *stats) 393 384 { 394 - return -ENOSYS; 385 + struct tp_tcp_stats v4, v6; 386 + struct c4iw_dev *c4iw_dev = to_c4iw_dev(ibdev); 387 + 388 + cxgb4_get_tcp_stats(c4iw_dev->rdev.lldi.pdev, &v4, &v6); 389 + memset(stats, 0, sizeof *stats); 390 + stats->iw.tcpInSegs = v4.tcpInSegs + v6.tcpInSegs; 391 + stats->iw.tcpOutSegs = v4.tcpOutSegs + v6.tcpOutSegs; 392 + stats->iw.tcpRetransSegs = v4.tcpRetransSegs + v6.tcpRetransSegs; 393 + stats->iw.tcpOutRsts = v4.tcpOutRsts + v6.tcpOutSegs; 394 + 395 + return 0; 395 396 } 396 397 397 398 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); ··· 491 472 dev->ibdev.post_send = c4iw_post_send; 492 473 dev->ibdev.post_recv = c4iw_post_receive; 493 474 dev->ibdev.get_protocol_stats = c4iw_get_mib; 475 + dev->ibdev.uverbs_abi_ver = C4IW_UVERBS_ABI_VERSION; 494 476 495 477 dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); 496 478 if (!dev->ibdev.iwcm)
+162 -121
drivers/infiniband/hw/cxgb4/qp.c
··· 31 31 */ 32 32 #include "iw_cxgb4.h" 33 33 34 + static int ocqp_support; 35 + module_param(ocqp_support, int, 0644); 36 + MODULE_PARM_DESC(ocqp_support, "Support on-chip SQs (default=0)"); 37 + 38 + static void set_state(struct c4iw_qp *qhp, enum c4iw_qp_state state) 39 + { 40 + unsigned long flag; 41 + spin_lock_irqsave(&qhp->lock, flag); 42 + qhp->attr.state = state; 43 + spin_unlock_irqrestore(&qhp->lock, flag); 44 + } 45 + 46 + static void dealloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) 47 + { 48 + c4iw_ocqp_pool_free(rdev, sq->dma_addr, sq->memsize); 49 + } 50 + 51 + static void dealloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) 52 + { 53 + dma_free_coherent(&(rdev->lldi.pdev->dev), sq->memsize, sq->queue, 54 + pci_unmap_addr(sq, mapping)); 55 + } 56 + 57 + static void dealloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) 58 + { 59 + if (t4_sq_onchip(sq)) 60 + dealloc_oc_sq(rdev, sq); 61 + else 62 + dealloc_host_sq(rdev, sq); 63 + } 64 + 65 + static int alloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) 66 + { 67 + if (!ocqp_support || !t4_ocqp_supported()) 68 + return -ENOSYS; 69 + sq->dma_addr = c4iw_ocqp_pool_alloc(rdev, sq->memsize); 70 + if (!sq->dma_addr) 71 + return -ENOMEM; 72 + sq->phys_addr = rdev->oc_mw_pa + sq->dma_addr - 73 + rdev->lldi.vr->ocq.start; 74 + sq->queue = (__force union t4_wr *)(rdev->oc_mw_kva + sq->dma_addr - 75 + rdev->lldi.vr->ocq.start); 76 + sq->flags |= T4_SQ_ONCHIP; 77 + return 0; 78 + } 79 + 80 + static int alloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) 81 + { 82 + sq->queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), sq->memsize, 83 + &(sq->dma_addr), GFP_KERNEL); 84 + if (!sq->queue) 85 + return -ENOMEM; 86 + sq->phys_addr = virt_to_phys(sq->queue); 87 + pci_unmap_addr_set(sq, mapping, sq->dma_addr); 88 + return 0; 89 + } 90 + 34 91 static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, 35 92 struct c4iw_dev_ucontext *uctx) 36 93 { ··· 98 41 dma_free_coherent(&(rdev->lldi.pdev->dev), 99 42 wq->rq.memsize, wq->rq.queue, 100 43 dma_unmap_addr(&wq->rq, mapping)); 101 - dma_free_coherent(&(rdev->lldi.pdev->dev), 102 - wq->sq.memsize, wq->sq.queue, 103 - dma_unmap_addr(&wq->sq, mapping)); 44 + dealloc_sq(rdev, &wq->sq); 104 45 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); 105 46 kfree(wq->rq.sw_rq); 106 47 kfree(wq->sq.sw_sq); ··· 148 93 if (!wq->rq.rqt_hwaddr) 149 94 goto err4; 150 95 151 - wq->sq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), 152 - wq->sq.memsize, &(wq->sq.dma_addr), 153 - GFP_KERNEL); 154 - if (!wq->sq.queue) 155 - goto err5; 96 + if (user) { 97 + if (alloc_oc_sq(rdev, &wq->sq) && alloc_host_sq(rdev, &wq->sq)) 98 + goto err5; 99 + } else 100 + if (alloc_host_sq(rdev, &wq->sq)) 101 + goto err5; 156 102 memset(wq->sq.queue, 0, wq->sq.memsize); 157 103 dma_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); 158 104 ··· 200 144 V_FW_RI_RES_WR_NRES(2) | 201 145 FW_WR_COMPL(1)); 202 146 res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); 203 - res_wr->cookie = (u64)&wr_wait; 147 + res_wr->cookie = (unsigned long) &wr_wait; 204 148 res = res_wr->res; 205 149 res->u.sqrq.restype = FW_RI_RES_TYPE_SQ; 206 150 res->u.sqrq.op = FW_RI_RES_OP_WRITE; ··· 214 158 V_FW_RI_RES_WR_HOSTFCMODE(0) | /* no host cidx updates */ 215 159 V_FW_RI_RES_WR_CPRIO(0) | /* don't keep in chip cache */ 216 160 V_FW_RI_RES_WR_PCIECHN(0) | /* set by uP at ri_init time */ 161 + t4_sq_onchip(&wq->sq) ? F_FW_RI_RES_WR_ONCHIP : 0 | 217 162 V_FW_RI_RES_WR_IQID(scq->cqid)); 218 163 res->u.sqrq.dcaen_to_eqsize = cpu_to_be32( 219 164 V_FW_RI_RES_WR_DCAEN(0) | ··· 255 198 ret = c4iw_ofld_send(rdev, skb); 256 199 if (ret) 257 200 goto err7; 258 - wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); 259 - if (!wr_wait.done) { 260 - printk(KERN_ERR MOD "Device %s not responding!\n", 261 - pci_name(rdev->lldi.pdev)); 262 - rdev->flags = T4_FATAL_ERROR; 263 - ret = -EIO; 264 - } else 265 - ret = wr_wait.ret; 201 + ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, wq->sq.qid, __func__); 266 202 if (ret) 267 203 goto err7; 268 204 ··· 269 219 wq->rq.memsize, wq->rq.queue, 270 220 dma_unmap_addr(&wq->rq, mapping)); 271 221 err6: 272 - dma_free_coherent(&(rdev->lldi.pdev->dev), 273 - wq->sq.memsize, wq->sq.queue, 274 - dma_unmap_addr(&wq->sq, mapping)); 222 + dealloc_sq(rdev, &wq->sq); 275 223 err5: 276 224 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); 277 225 err4: ··· 311 263 rem -= len; 312 264 } 313 265 } 266 + len = roundup(plen + sizeof *immdp, 16) - (plen + sizeof *immdp); 267 + if (len) 268 + memset(dstp, 0, len); 314 269 immdp->op = FW_RI_DATA_IMMD; 315 270 immdp->r1 = 0; 316 271 immdp->r2 = 0; ··· 343 292 if (++flitp == queue_end) 344 293 flitp = queue_start; 345 294 } 295 + *flitp = (__force __be64)0; 346 296 isglp->op = FW_RI_DATA_ISGL; 347 297 isglp->r1 = 0; 348 298 isglp->nsge = cpu_to_be16(num_sge); ··· 505 453 return 0; 506 454 } 507 455 508 - static int build_fastreg(union t4_wr *wqe, struct ib_send_wr *wr, u8 *len16) 456 + static int build_fastreg(struct t4_sq *sq, union t4_wr *wqe, 457 + struct ib_send_wr *wr, u8 *len16) 509 458 { 510 459 511 460 struct fw_ri_immd *imdp; 512 461 __be64 *p; 513 462 int i; 514 463 int pbllen = roundup(wr->wr.fast_reg.page_list_len * sizeof(u64), 32); 464 + int rem; 515 465 516 466 if (wr->wr.fast_reg.page_list_len > T4_MAX_FR_DEPTH) 517 467 return -EINVAL; ··· 528 474 wqe->fr.va_hi = cpu_to_be32(wr->wr.fast_reg.iova_start >> 32); 529 475 wqe->fr.va_lo_fbo = cpu_to_be32(wr->wr.fast_reg.iova_start & 530 476 0xffffffff); 531 - if (pbllen > T4_MAX_FR_IMMD) { 532 - struct c4iw_fr_page_list *c4pl = 533 - to_c4iw_fr_page_list(wr->wr.fast_reg.page_list); 534 - struct fw_ri_dsgl *sglp; 535 - 536 - sglp = (struct fw_ri_dsgl *)(&wqe->fr + 1); 537 - sglp->op = FW_RI_DATA_DSGL; 538 - sglp->r1 = 0; 539 - sglp->nsge = cpu_to_be16(1); 540 - sglp->addr0 = cpu_to_be64(c4pl->dma_addr); 541 - sglp->len0 = cpu_to_be32(pbllen); 542 - 543 - *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *sglp, 16); 544 - } else { 545 - imdp = (struct fw_ri_immd *)(&wqe->fr + 1); 546 - imdp->op = FW_RI_DATA_IMMD; 547 - imdp->r1 = 0; 548 - imdp->r2 = 0; 549 - imdp->immdlen = cpu_to_be32(pbllen); 550 - p = (__be64 *)(imdp + 1); 551 - for (i = 0; i < wr->wr.fast_reg.page_list_len; i++, p++) 552 - *p = cpu_to_be64( 553 - (u64)wr->wr.fast_reg.page_list->page_list[i]); 554 - *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *imdp + pbllen, 555 - 16); 477 + WARN_ON(pbllen > T4_MAX_FR_IMMD); 478 + imdp = (struct fw_ri_immd *)(&wqe->fr + 1); 479 + imdp->op = FW_RI_DATA_IMMD; 480 + imdp->r1 = 0; 481 + imdp->r2 = 0; 482 + imdp->immdlen = cpu_to_be32(pbllen); 483 + p = (__be64 *)(imdp + 1); 484 + rem = pbllen; 485 + for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) { 486 + *p = cpu_to_be64((u64)wr->wr.fast_reg.page_list->page_list[i]); 487 + rem -= sizeof *p; 488 + if (++p == (__be64 *)&sq->queue[sq->size]) 489 + p = (__be64 *)sq->queue; 556 490 } 491 + BUG_ON(rem < 0); 492 + while (rem) { 493 + *p = 0; 494 + rem -= sizeof *p; 495 + if (++p == (__be64 *)&sq->queue[sq->size]) 496 + p = (__be64 *)sq->queue; 497 + } 498 + *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *imdp + pbllen, 16); 557 499 return 0; 558 500 } 559 501 ··· 637 587 fw_opcode = FW_RI_RDMA_READ_WR; 638 588 swsqe->opcode = FW_RI_READ_REQ; 639 589 if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) 640 - fw_flags |= FW_RI_RDMA_READ_INVALIDATE; 590 + fw_flags = FW_RI_RDMA_READ_INVALIDATE; 641 591 else 642 592 fw_flags = 0; 643 593 err = build_rdma_read(wqe, wr, &len16); ··· 650 600 case IB_WR_FAST_REG_MR: 651 601 fw_opcode = FW_RI_FR_NSMR_WR; 652 602 swsqe->opcode = FW_RI_FAST_REGISTER; 653 - err = build_fastreg(wqe, wr, &len16); 603 + err = build_fastreg(&qhp->wq.sq, wqe, wr, &len16); 654 604 break; 655 605 case IB_WR_LOCAL_INV: 656 606 if (wr->send_flags & IB_SEND_FENCE) ··· 955 905 * Assumes qhp lock is held. 956 906 */ 957 907 static void __flush_qp(struct c4iw_qp *qhp, struct c4iw_cq *rchp, 958 - struct c4iw_cq *schp, unsigned long *flag) 908 + struct c4iw_cq *schp) 959 909 { 960 910 int count; 961 911 int flushed; 912 + unsigned long flag; 962 913 963 914 PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); 964 - /* take a ref on the qhp since we must release the lock */ 965 - atomic_inc(&qhp->refcnt); 966 - spin_unlock_irqrestore(&qhp->lock, *flag); 967 915 968 916 /* locking hierarchy: cq lock first, then qp lock. */ 969 - spin_lock_irqsave(&rchp->lock, *flag); 917 + spin_lock_irqsave(&rchp->lock, flag); 970 918 spin_lock(&qhp->lock); 971 919 c4iw_flush_hw_cq(&rchp->cq); 972 920 c4iw_count_rcqes(&rchp->cq, &qhp->wq, &count); 973 921 flushed = c4iw_flush_rq(&qhp->wq, &rchp->cq, count); 974 922 spin_unlock(&qhp->lock); 975 - spin_unlock_irqrestore(&rchp->lock, *flag); 923 + spin_unlock_irqrestore(&rchp->lock, flag); 976 924 if (flushed) 977 925 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 978 926 979 927 /* locking hierarchy: cq lock first, then qp lock. */ 980 - spin_lock_irqsave(&schp->lock, *flag); 928 + spin_lock_irqsave(&schp->lock, flag); 981 929 spin_lock(&qhp->lock); 982 930 c4iw_flush_hw_cq(&schp->cq); 983 931 c4iw_count_scqes(&schp->cq, &qhp->wq, &count); 984 932 flushed = c4iw_flush_sq(&qhp->wq, &schp->cq, count); 985 933 spin_unlock(&qhp->lock); 986 - spin_unlock_irqrestore(&schp->lock, *flag); 934 + spin_unlock_irqrestore(&schp->lock, flag); 987 935 if (flushed) 988 936 (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); 989 - 990 - /* deref */ 991 - if (atomic_dec_and_test(&qhp->refcnt)) 992 - wake_up(&qhp->wait); 993 - 994 - spin_lock_irqsave(&qhp->lock, *flag); 995 937 } 996 938 997 - static void flush_qp(struct c4iw_qp *qhp, unsigned long *flag) 939 + static void flush_qp(struct c4iw_qp *qhp) 998 940 { 999 941 struct c4iw_cq *rchp, *schp; 1000 942 ··· 1000 958 t4_set_cq_in_error(&schp->cq); 1001 959 return; 1002 960 } 1003 - __flush_qp(qhp, rchp, schp, flag); 961 + __flush_qp(qhp, rchp, schp); 1004 962 } 1005 963 1006 964 static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, ··· 1008 966 { 1009 967 struct fw_ri_wr *wqe; 1010 968 int ret; 1011 - struct c4iw_wr_wait wr_wait; 1012 969 struct sk_buff *skb; 1013 970 1014 971 PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, ··· 1026 985 wqe->flowid_len16 = cpu_to_be32( 1027 986 FW_WR_FLOWID(ep->hwtid) | 1028 987 FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); 1029 - wqe->cookie = (u64)&wr_wait; 988 + wqe->cookie = (unsigned long) &ep->com.wr_wait; 1030 989 1031 990 wqe->u.fini.type = FW_RI_TYPE_FINI; 1032 - c4iw_init_wr_wait(&wr_wait); 991 + c4iw_init_wr_wait(&ep->com.wr_wait); 1033 992 ret = c4iw_ofld_send(&rhp->rdev, skb); 1034 993 if (ret) 1035 994 goto out; 1036 995 1037 - wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); 1038 - if (!wr_wait.done) { 1039 - printk(KERN_ERR MOD "Device %s not responding!\n", 1040 - pci_name(rhp->rdev.lldi.pdev)); 1041 - rhp->rdev.flags = T4_FATAL_ERROR; 1042 - ret = -EIO; 1043 - } else { 1044 - ret = wr_wait.ret; 1045 - if (ret) 1046 - printk(KERN_WARNING MOD 1047 - "%s: Abnormal close qpid %d ret %u\n", 1048 - pci_name(rhp->rdev.lldi.pdev), qhp->wq.sq.qid, 1049 - ret); 1050 - } 996 + ret = c4iw_wait_for_reply(&rhp->rdev, &ep->com.wr_wait, qhp->ep->hwtid, 997 + qhp->wq.sq.qid, __func__); 1051 998 out: 1052 999 PDBG("%s ret %d\n", __func__, ret); 1053 1000 return ret; ··· 1069 1040 { 1070 1041 struct fw_ri_wr *wqe; 1071 1042 int ret; 1072 - struct c4iw_wr_wait wr_wait; 1073 1043 struct sk_buff *skb; 1074 1044 1075 1045 PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, ··· 1088 1060 FW_WR_FLOWID(qhp->ep->hwtid) | 1089 1061 FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); 1090 1062 1091 - wqe->cookie = (u64)&wr_wait; 1063 + wqe->cookie = (unsigned long) &qhp->ep->com.wr_wait; 1092 1064 1093 1065 wqe->u.init.type = FW_RI_TYPE_INIT; 1094 1066 wqe->u.init.mpareqbit_p2ptype = ··· 1125 1097 if (qhp->attr.mpa_attr.initiator) 1126 1098 build_rtr_msg(qhp->attr.mpa_attr.p2p_type, &wqe->u.init); 1127 1099 1128 - c4iw_init_wr_wait(&wr_wait); 1100 + c4iw_init_wr_wait(&qhp->ep->com.wr_wait); 1129 1101 ret = c4iw_ofld_send(&rhp->rdev, skb); 1130 1102 if (ret) 1131 1103 goto out; 1132 1104 1133 - wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); 1134 - if (!wr_wait.done) { 1135 - printk(KERN_ERR MOD "Device %s not responding!\n", 1136 - pci_name(rhp->rdev.lldi.pdev)); 1137 - rhp->rdev.flags = T4_FATAL_ERROR; 1138 - ret = -EIO; 1139 - } else 1140 - ret = wr_wait.ret; 1105 + ret = c4iw_wait_for_reply(&rhp->rdev, &qhp->ep->com.wr_wait, 1106 + qhp->ep->hwtid, qhp->wq.sq.qid, __func__); 1141 1107 out: 1142 1108 PDBG("%s ret %d\n", __func__, ret); 1143 1109 return ret; ··· 1144 1122 { 1145 1123 int ret = 0; 1146 1124 struct c4iw_qp_attributes newattr = qhp->attr; 1147 - unsigned long flag; 1148 1125 int disconnect = 0; 1149 1126 int terminate = 0; 1150 1127 int abort = 0; ··· 1154 1133 qhp, qhp->wq.sq.qid, qhp->wq.rq.qid, qhp->ep, qhp->attr.state, 1155 1134 (mask & C4IW_QP_ATTR_NEXT_STATE) ? attrs->next_state : -1); 1156 1135 1157 - spin_lock_irqsave(&qhp->lock, flag); 1136 + mutex_lock(&qhp->mutex); 1158 1137 1159 1138 /* Process attr changes if in IDLE */ 1160 1139 if (mask & C4IW_QP_ATTR_VALID_MODIFY) { ··· 1205 1184 qhp->attr.mpa_attr = attrs->mpa_attr; 1206 1185 qhp->attr.llp_stream_handle = attrs->llp_stream_handle; 1207 1186 qhp->ep = qhp->attr.llp_stream_handle; 1208 - qhp->attr.state = C4IW_QP_STATE_RTS; 1187 + set_state(qhp, C4IW_QP_STATE_RTS); 1209 1188 1210 1189 /* 1211 1190 * Ref the endpoint here and deref when we ··· 1214 1193 * transition. 1215 1194 */ 1216 1195 c4iw_get_ep(&qhp->ep->com); 1217 - spin_unlock_irqrestore(&qhp->lock, flag); 1218 1196 ret = rdma_init(rhp, qhp); 1219 - spin_lock_irqsave(&qhp->lock, flag); 1220 1197 if (ret) 1221 1198 goto err; 1222 1199 break; 1223 1200 case C4IW_QP_STATE_ERROR: 1224 - qhp->attr.state = C4IW_QP_STATE_ERROR; 1225 - flush_qp(qhp, &flag); 1201 + set_state(qhp, C4IW_QP_STATE_ERROR); 1202 + flush_qp(qhp); 1226 1203 break; 1227 1204 default: 1228 1205 ret = -EINVAL; ··· 1231 1212 switch (attrs->next_state) { 1232 1213 case C4IW_QP_STATE_CLOSING: 1233 1214 BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2); 1234 - qhp->attr.state = C4IW_QP_STATE_CLOSING; 1215 + set_state(qhp, C4IW_QP_STATE_CLOSING); 1235 1216 ep = qhp->ep; 1236 1217 if (!internal) { 1237 1218 abort = 0; 1238 1219 disconnect = 1; 1239 - c4iw_get_ep(&ep->com); 1220 + c4iw_get_ep(&qhp->ep->com); 1240 1221 } 1241 - spin_unlock_irqrestore(&qhp->lock, flag); 1242 1222 ret = rdma_fini(rhp, qhp, ep); 1243 - spin_lock_irqsave(&qhp->lock, flag); 1244 1223 if (ret) { 1245 - c4iw_get_ep(&ep->com); 1224 + if (internal) 1225 + c4iw_get_ep(&qhp->ep->com); 1246 1226 disconnect = abort = 1; 1247 1227 goto err; 1248 1228 } 1249 1229 break; 1250 1230 case C4IW_QP_STATE_TERMINATE: 1251 - qhp->attr.state = C4IW_QP_STATE_TERMINATE; 1231 + set_state(qhp, C4IW_QP_STATE_TERMINATE); 1252 1232 if (qhp->ibqp.uobject) 1253 1233 t4_set_wq_in_error(&qhp->wq); 1254 1234 ep = qhp->ep; 1255 - c4iw_get_ep(&ep->com); 1256 - terminate = 1; 1235 + if (!internal) 1236 + terminate = 1; 1257 1237 disconnect = 1; 1238 + c4iw_get_ep(&qhp->ep->com); 1258 1239 break; 1259 1240 case C4IW_QP_STATE_ERROR: 1260 - qhp->attr.state = C4IW_QP_STATE_ERROR; 1241 + set_state(qhp, C4IW_QP_STATE_ERROR); 1261 1242 if (!internal) { 1262 1243 abort = 1; 1263 1244 disconnect = 1; 1264 1245 ep = qhp->ep; 1265 - c4iw_get_ep(&ep->com); 1246 + c4iw_get_ep(&qhp->ep->com); 1266 1247 } 1267 1248 goto err; 1268 1249 break; ··· 1278 1259 } 1279 1260 switch (attrs->next_state) { 1280 1261 case C4IW_QP_STATE_IDLE: 1281 - flush_qp(qhp, &flag); 1282 - qhp->attr.state = C4IW_QP_STATE_IDLE; 1262 + flush_qp(qhp); 1263 + set_state(qhp, C4IW_QP_STATE_IDLE); 1283 1264 qhp->attr.llp_stream_handle = NULL; 1284 1265 c4iw_put_ep(&qhp->ep->com); 1285 1266 qhp->ep = NULL; ··· 1301 1282 ret = -EINVAL; 1302 1283 goto out; 1303 1284 } 1304 - qhp->attr.state = C4IW_QP_STATE_IDLE; 1285 + set_state(qhp, C4IW_QP_STATE_IDLE); 1305 1286 break; 1306 1287 case C4IW_QP_STATE_TERMINATE: 1307 1288 if (!internal) { ··· 1324 1305 1325 1306 /* disassociate the LLP connection */ 1326 1307 qhp->attr.llp_stream_handle = NULL; 1327 - ep = qhp->ep; 1308 + if (!ep) 1309 + ep = qhp->ep; 1328 1310 qhp->ep = NULL; 1329 - qhp->attr.state = C4IW_QP_STATE_ERROR; 1311 + set_state(qhp, C4IW_QP_STATE_ERROR); 1330 1312 free = 1; 1331 1313 wake_up(&qhp->wait); 1332 1314 BUG_ON(!ep); 1333 - flush_qp(qhp, &flag); 1315 + flush_qp(qhp); 1334 1316 out: 1335 - spin_unlock_irqrestore(&qhp->lock, flag); 1317 + mutex_unlock(&qhp->mutex); 1336 1318 1337 1319 if (terminate) 1338 1320 post_terminate(qhp, NULL, internal ? GFP_ATOMIC : GFP_KERNEL); ··· 1355 1335 */ 1356 1336 if (free) 1357 1337 c4iw_put_ep(&ep->com); 1358 - 1359 1338 PDBG("%s exit state %d\n", __func__, qhp->attr.state); 1360 1339 return ret; 1361 1340 } ··· 1399 1380 int sqsize, rqsize; 1400 1381 struct c4iw_ucontext *ucontext; 1401 1382 int ret; 1402 - struct c4iw_mm_entry *mm1, *mm2, *mm3, *mm4; 1383 + struct c4iw_mm_entry *mm1, *mm2, *mm3, *mm4, *mm5 = NULL; 1403 1384 1404 1385 PDBG("%s ib_pd %p\n", __func__, pd); 1405 1386 ··· 1469 1450 qhp->attr.max_ord = 1; 1470 1451 qhp->attr.max_ird = 1; 1471 1452 spin_lock_init(&qhp->lock); 1453 + mutex_init(&qhp->mutex); 1472 1454 init_waitqueue_head(&qhp->wait); 1473 1455 atomic_set(&qhp->refcnt, 1); 1474 1456 ··· 1498 1478 ret = -ENOMEM; 1499 1479 goto err6; 1500 1480 } 1501 - 1481 + if (t4_sq_onchip(&qhp->wq.sq)) { 1482 + mm5 = kmalloc(sizeof *mm5, GFP_KERNEL); 1483 + if (!mm5) { 1484 + ret = -ENOMEM; 1485 + goto err7; 1486 + } 1487 + uresp.flags = C4IW_QPF_ONCHIP; 1488 + } else 1489 + uresp.flags = 0; 1502 1490 uresp.qid_mask = rhp->rdev.qpmask; 1503 1491 uresp.sqid = qhp->wq.sq.qid; 1504 1492 uresp.sq_size = qhp->wq.sq.size; ··· 1515 1487 uresp.rq_size = qhp->wq.rq.size; 1516 1488 uresp.rq_memsize = qhp->wq.rq.memsize; 1517 1489 spin_lock(&ucontext->mmap_lock); 1490 + if (mm5) { 1491 + uresp.ma_sync_key = ucontext->key; 1492 + ucontext->key += PAGE_SIZE; 1493 + } 1518 1494 uresp.sq_key = ucontext->key; 1519 1495 ucontext->key += PAGE_SIZE; 1520 1496 uresp.rq_key = ucontext->key; ··· 1530 1498 spin_unlock(&ucontext->mmap_lock); 1531 1499 ret = ib_copy_to_udata(udata, &uresp, sizeof uresp); 1532 1500 if (ret) 1533 - goto err7; 1501 + goto err8; 1534 1502 mm1->key = uresp.sq_key; 1535 - mm1->addr = virt_to_phys(qhp->wq.sq.queue); 1503 + mm1->addr = qhp->wq.sq.phys_addr; 1536 1504 mm1->len = PAGE_ALIGN(qhp->wq.sq.memsize); 1537 1505 insert_mmap(ucontext, mm1); 1538 1506 mm2->key = uresp.rq_key; ··· 1547 1515 mm4->addr = qhp->wq.rq.udb; 1548 1516 mm4->len = PAGE_SIZE; 1549 1517 insert_mmap(ucontext, mm4); 1518 + if (mm5) { 1519 + mm5->key = uresp.ma_sync_key; 1520 + mm5->addr = (pci_resource_start(rhp->rdev.lldi.pdev, 0) 1521 + + A_PCIE_MA_SYNC) & PAGE_MASK; 1522 + mm5->len = PAGE_SIZE; 1523 + insert_mmap(ucontext, mm5); 1524 + } 1550 1525 } 1551 1526 qhp->ibqp.qp_num = qhp->wq.sq.qid; 1552 1527 init_timer(&(qhp->timer)); ··· 1561 1522 __func__, qhp, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, 1562 1523 qhp->wq.sq.qid); 1563 1524 return &qhp->ibqp; 1525 + err8: 1526 + kfree(mm5); 1564 1527 err7: 1565 1528 kfree(mm4); 1566 1529 err6:
+62
drivers/infiniband/hw/cxgb4/resource.c
··· 311 311 { 312 312 unsigned long addr = gen_pool_alloc(rdev->pbl_pool, size); 313 313 PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size); 314 + if (!addr && printk_ratelimit()) 315 + printk(KERN_WARNING MOD "%s: Out of PBL memory\n", 316 + pci_name(rdev->lldi.pdev)); 314 317 return (u32)addr; 315 318 } 316 319 ··· 373 370 { 374 371 unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6); 375 372 PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size << 6); 373 + if (!addr && printk_ratelimit()) 374 + printk(KERN_WARNING MOD "%s: Out of RQT memory\n", 375 + pci_name(rdev->lldi.pdev)); 376 376 return (u32)addr; 377 377 } 378 378 ··· 421 415 void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev) 422 416 { 423 417 gen_pool_destroy(rdev->rqt_pool); 418 + } 419 + 420 + /* 421 + * On-Chip QP Memory. 422 + */ 423 + #define MIN_OCQP_SHIFT 12 /* 4KB == min ocqp size */ 424 + 425 + u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size) 426 + { 427 + unsigned long addr = gen_pool_alloc(rdev->ocqp_pool, size); 428 + PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size); 429 + return (u32)addr; 430 + } 431 + 432 + void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size) 433 + { 434 + PDBG("%s addr 0x%x size %d\n", __func__, addr, size); 435 + gen_pool_free(rdev->ocqp_pool, (unsigned long)addr, size); 436 + } 437 + 438 + int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev) 439 + { 440 + unsigned start, chunk, top; 441 + 442 + rdev->ocqp_pool = gen_pool_create(MIN_OCQP_SHIFT, -1); 443 + if (!rdev->ocqp_pool) 444 + return -ENOMEM; 445 + 446 + start = rdev->lldi.vr->ocq.start; 447 + chunk = rdev->lldi.vr->ocq.size; 448 + top = start + chunk; 449 + 450 + while (start < top) { 451 + chunk = min(top - start + 1, chunk); 452 + if (gen_pool_add(rdev->ocqp_pool, start, chunk, -1)) { 453 + PDBG("%s failed to add OCQP chunk (%x/%x)\n", 454 + __func__, start, chunk); 455 + if (chunk <= 1024 << MIN_OCQP_SHIFT) { 456 + printk(KERN_WARNING MOD 457 + "Failed to add all OCQP chunks (%x/%x)\n", 458 + start, top - start); 459 + return 0; 460 + } 461 + chunk >>= 1; 462 + } else { 463 + PDBG("%s added OCQP chunk (%x/%x)\n", 464 + __func__, start, chunk); 465 + start += chunk; 466 + } 467 + } 468 + return 0; 469 + } 470 + 471 + void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev) 472 + { 473 + gen_pool_destroy(rdev->ocqp_pool); 424 474 }
+37 -7
drivers/infiniband/hw/cxgb4/t4.h
··· 52 52 #define T4_STAG_UNSET 0xffffffff 53 53 #define T4_FW_MAJ 0 54 54 #define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) 55 + #define A_PCIE_MA_SYNC 0x30b4 55 56 56 57 struct t4_status_page { 57 58 __be32 rsvd1; /* flit 0 - hw owns */ ··· 66 65 67 66 #define T4_EQ_ENTRY_SIZE 64 68 67 69 - #define T4_SQ_NUM_SLOTS 4 68 + #define T4_SQ_NUM_SLOTS 5 70 69 #define T4_SQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_SQ_NUM_SLOTS) 71 70 #define T4_MAX_SEND_SGE ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_send_wr) - \ 72 71 sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) ··· 79 78 sizeof(struct fw_ri_rdma_write_wr) - \ 80 79 sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) 81 80 #define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \ 82 - sizeof(struct fw_ri_immd))) 81 + sizeof(struct fw_ri_immd)) & ~31UL) 83 82 #define T4_MAX_FR_DEPTH (T4_MAX_FR_IMMD / sizeof(u64)) 84 83 85 84 #define T4_RQ_NUM_SLOTS 2 ··· 267 266 u16 idx; 268 267 }; 269 268 269 + static inline pgprot_t t4_pgprot_wc(pgprot_t prot) 270 + { 271 + #if defined(__i386__) || defined(__x86_64__) 272 + return pgprot_writecombine(prot); 273 + #elif defined(CONFIG_PPC64) 274 + return __pgprot((pgprot_val(prot) | _PAGE_NO_CACHE) & 275 + ~(pgprot_t)_PAGE_GUARDED); 276 + #else 277 + return pgprot_noncached(prot); 278 + #endif 279 + } 280 + 281 + static inline int t4_ocqp_supported(void) 282 + { 283 + #if defined(__i386__) || defined(__x86_64__) || defined(CONFIG_PPC64) 284 + return 1; 285 + #else 286 + return 0; 287 + #endif 288 + } 289 + 290 + enum { 291 + T4_SQ_ONCHIP = (1<<0), 292 + }; 293 + 270 294 struct t4_sq { 271 295 union t4_wr *queue; 272 296 dma_addr_t dma_addr; 273 297 DEFINE_DMA_UNMAP_ADDR(mapping); 298 + unsigned long phys_addr; 274 299 struct t4_swsqe *sw_sq; 275 300 struct t4_swsqe *oldest_read; 276 301 u64 udb; ··· 307 280 u16 cidx; 308 281 u16 pidx; 309 282 u16 wq_pidx; 283 + u16 flags; 310 284 }; 311 285 312 286 struct t4_swrqe { ··· 378 350 wq->rq.cidx = 0; 379 351 } 380 352 353 + static inline int t4_sq_onchip(struct t4_sq *sq) 354 + { 355 + return sq->flags & T4_SQ_ONCHIP; 356 + } 357 + 381 358 static inline int t4_sq_empty(struct t4_wq *wq) 382 359 { 383 360 return wq->sq.in_use == 0; ··· 429 396 430 397 static inline int t4_wq_in_error(struct t4_wq *wq) 431 398 { 432 - return wq->sq.queue[wq->sq.size].status.qp_err; 399 + return wq->rq.queue[wq->rq.size].status.qp_err; 433 400 } 434 401 435 402 static inline void t4_set_wq_in_error(struct t4_wq *wq) 436 403 { 437 - wq->sq.queue[wq->sq.size].status.qp_err = 1; 438 404 wq->rq.queue[wq->rq.size].status.qp_err = 1; 439 405 } 440 406 441 407 static inline void t4_disable_wq_db(struct t4_wq *wq) 442 408 { 443 - wq->sq.queue[wq->sq.size].status.db_off = 1; 444 409 wq->rq.queue[wq->rq.size].status.db_off = 1; 445 410 } 446 411 447 412 static inline void t4_enable_wq_db(struct t4_wq *wq) 448 413 { 449 - wq->sq.queue[wq->sq.size].status.db_off = 0; 450 414 wq->rq.queue[wq->rq.size].status.db_off = 0; 451 415 } 452 416 453 417 static inline int t4_wq_db_enabled(struct t4_wq *wq) 454 418 { 455 - return !wq->sq.queue[wq->sq.size].status.db_off; 419 + return !wq->rq.queue[wq->rq.size].status.db_off; 456 420 } 457 421 458 422 struct t4_cq {
+7
drivers/infiniband/hw/cxgb4/user.h
··· 50 50 __u32 qid_mask; 51 51 }; 52 52 53 + 54 + enum { 55 + C4IW_QPF_ONCHIP = (1<<0) 56 + }; 57 + 53 58 struct c4iw_create_qp_resp { 59 + __u64 ma_sync_key; 54 60 __u64 sq_key; 55 61 __u64 rq_key; 56 62 __u64 sq_db_gts_key; ··· 68 62 __u32 sq_size; 69 63 __u32 rq_size; 70 64 __u32 qid_mask; 65 + __u32 flags; 71 66 }; 72 67 #endif
+3 -3
drivers/infiniband/hw/ehca/ehca_mrmw.c
··· 171 171 } 172 172 173 173 ret = ehca_reg_maxmr(shca, e_maxmr, 174 - (void *)ehca_map_vaddr((void *)KERNELBASE), 174 + (void *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)), 175 175 mr_access_flags, e_pd, 176 176 &e_maxmr->ib.ib_mr.lkey, 177 177 &e_maxmr->ib.ib_mr.rkey); ··· 1636 1636 1637 1637 /* register internal max-MR on HCA */ 1638 1638 size_maxmr = ehca_mr_len; 1639 - iova_start = (u64 *)ehca_map_vaddr((void *)KERNELBASE); 1639 + iova_start = (u64 *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)); 1640 1640 ib_pbuf.addr = 0; 1641 1641 ib_pbuf.size = size_maxmr; 1642 1642 num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr, ··· 2209 2209 { 2210 2210 /* a MR is treated as max-MR only if it fits following: */ 2211 2211 if ((size == ehca_mr_len) && 2212 - (iova_start == (void *)ehca_map_vaddr((void *)KERNELBASE))) { 2212 + (iova_start == (void *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)))) { 2213 2213 ehca_gen_dbg("this is a max-MR"); 2214 2214 return 1; 2215 2215 } else
+1 -1
drivers/infiniband/hw/ipath/Makefile
··· 1 - EXTRA_CFLAGS += -DIPATH_IDSTR='"QLogic kernel.org driver"' \ 1 + ccflags-y := -DIPATH_IDSTR='"QLogic kernel.org driver"' \ 2 2 -DIPATH_KERN_TYPE=0 3 3 4 4 obj-$(CONFIG_INFINIBAND_IPATH) += ib_ipath.o
+132 -35
drivers/infiniband/hw/mlx4/ah.c
··· 30 30 * SOFTWARE. 31 31 */ 32 32 33 + #include <rdma/ib_addr.h> 34 + #include <rdma/ib_cache.h> 35 + 33 36 #include <linux/slab.h> 37 + #include <linux/inet.h> 38 + #include <linux/string.h> 34 39 35 40 #include "mlx4_ib.h" 36 41 37 - struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr) 42 + int mlx4_ib_resolve_grh(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah_attr, 43 + u8 *mac, int *is_mcast, u8 port) 44 + { 45 + struct in6_addr in6; 46 + 47 + *is_mcast = 0; 48 + 49 + memcpy(&in6, ah_attr->grh.dgid.raw, sizeof in6); 50 + if (rdma_link_local_addr(&in6)) 51 + rdma_get_ll_mac(&in6, mac); 52 + else if (rdma_is_multicast_addr(&in6)) { 53 + rdma_get_mcast_mac(&in6, mac); 54 + *is_mcast = 1; 55 + } else 56 + return -EINVAL; 57 + 58 + return 0; 59 + } 60 + 61 + static struct ib_ah *create_ib_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr, 62 + struct mlx4_ib_ah *ah) 38 63 { 39 64 struct mlx4_dev *dev = to_mdev(pd->device)->dev; 40 - struct mlx4_ib_ah *ah; 41 65 42 - ah = kmalloc(sizeof *ah, GFP_ATOMIC); 66 + ah->av.ib.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24)); 67 + ah->av.ib.g_slid = ah_attr->src_path_bits; 68 + if (ah_attr->ah_flags & IB_AH_GRH) { 69 + ah->av.ib.g_slid |= 0x80; 70 + ah->av.ib.gid_index = ah_attr->grh.sgid_index; 71 + ah->av.ib.hop_limit = ah_attr->grh.hop_limit; 72 + ah->av.ib.sl_tclass_flowlabel |= 73 + cpu_to_be32((ah_attr->grh.traffic_class << 20) | 74 + ah_attr->grh.flow_label); 75 + memcpy(ah->av.ib.dgid, ah_attr->grh.dgid.raw, 16); 76 + } 77 + 78 + ah->av.ib.dlid = cpu_to_be16(ah_attr->dlid); 79 + if (ah_attr->static_rate) { 80 + ah->av.ib.stat_rate = ah_attr->static_rate + MLX4_STAT_RATE_OFFSET; 81 + while (ah->av.ib.stat_rate > IB_RATE_2_5_GBPS + MLX4_STAT_RATE_OFFSET && 82 + !(1 << ah->av.ib.stat_rate & dev->caps.stat_rate_support)) 83 + --ah->av.ib.stat_rate; 84 + } 85 + ah->av.ib.sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28); 86 + 87 + return &ah->ibah; 88 + } 89 + 90 + static struct ib_ah *create_iboe_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr, 91 + struct mlx4_ib_ah *ah) 92 + { 93 + struct mlx4_ib_dev *ibdev = to_mdev(pd->device); 94 + struct mlx4_dev *dev = ibdev->dev; 95 + union ib_gid sgid; 96 + u8 mac[6]; 97 + int err; 98 + int is_mcast; 99 + u16 vlan_tag; 100 + 101 + err = mlx4_ib_resolve_grh(ibdev, ah_attr, mac, &is_mcast, ah_attr->port_num); 102 + if (err) 103 + return ERR_PTR(err); 104 + 105 + memcpy(ah->av.eth.mac, mac, 6); 106 + err = ib_get_cached_gid(pd->device, ah_attr->port_num, ah_attr->grh.sgid_index, &sgid); 107 + if (err) 108 + return ERR_PTR(err); 109 + vlan_tag = rdma_get_vlan_id(&sgid); 110 + if (vlan_tag < 0x1000) 111 + vlan_tag |= (ah_attr->sl & 7) << 13; 112 + ah->av.eth.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24)); 113 + ah->av.eth.gid_index = ah_attr->grh.sgid_index; 114 + ah->av.eth.vlan = cpu_to_be16(vlan_tag); 115 + if (ah_attr->static_rate) { 116 + ah->av.eth.stat_rate = ah_attr->static_rate + MLX4_STAT_RATE_OFFSET; 117 + while (ah->av.eth.stat_rate > IB_RATE_2_5_GBPS + MLX4_STAT_RATE_OFFSET && 118 + !(1 << ah->av.eth.stat_rate & dev->caps.stat_rate_support)) 119 + --ah->av.eth.stat_rate; 120 + } 121 + 122 + /* 123 + * HW requires multicast LID so we just choose one. 124 + */ 125 + if (is_mcast) 126 + ah->av.ib.dlid = cpu_to_be16(0xc000); 127 + 128 + memcpy(ah->av.eth.dgid, ah_attr->grh.dgid.raw, 16); 129 + ah->av.eth.sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28); 130 + 131 + return &ah->ibah; 132 + } 133 + 134 + struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr) 135 + { 136 + struct mlx4_ib_ah *ah; 137 + struct ib_ah *ret; 138 + 139 + ah = kzalloc(sizeof *ah, GFP_ATOMIC); 43 140 if (!ah) 44 141 return ERR_PTR(-ENOMEM); 45 142 46 - memset(&ah->av, 0, sizeof ah->av); 143 + if (rdma_port_get_link_layer(pd->device, ah_attr->port_num) == IB_LINK_LAYER_ETHERNET) { 144 + if (!(ah_attr->ah_flags & IB_AH_GRH)) { 145 + ret = ERR_PTR(-EINVAL); 146 + } else { 147 + /* 148 + * TBD: need to handle the case when we get 149 + * called in an atomic context and there we 150 + * might sleep. We don't expect this 151 + * currently since we're working with link 152 + * local addresses which we can translate 153 + * without going to sleep. 154 + */ 155 + ret = create_iboe_ah(pd, ah_attr, ah); 156 + } 47 157 48 - ah->av.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24)); 49 - ah->av.g_slid = ah_attr->src_path_bits; 50 - ah->av.dlid = cpu_to_be16(ah_attr->dlid); 51 - if (ah_attr->static_rate) { 52 - ah->av.stat_rate = ah_attr->static_rate + MLX4_STAT_RATE_OFFSET; 53 - while (ah->av.stat_rate > IB_RATE_2_5_GBPS + MLX4_STAT_RATE_OFFSET && 54 - !(1 << ah->av.stat_rate & dev->caps.stat_rate_support)) 55 - --ah->av.stat_rate; 56 - } 57 - ah->av.sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28); 58 - if (ah_attr->ah_flags & IB_AH_GRH) { 59 - ah->av.g_slid |= 0x80; 60 - ah->av.gid_index = ah_attr->grh.sgid_index; 61 - ah->av.hop_limit = ah_attr->grh.hop_limit; 62 - ah->av.sl_tclass_flowlabel |= 63 - cpu_to_be32((ah_attr->grh.traffic_class << 20) | 64 - ah_attr->grh.flow_label); 65 - memcpy(ah->av.dgid, ah_attr->grh.dgid.raw, 16); 66 - } 158 + if (IS_ERR(ret)) 159 + kfree(ah); 67 160 68 - return &ah->ibah; 161 + return ret; 162 + } else 163 + return create_ib_ah(pd, ah_attr, ah); /* never fails */ 69 164 } 70 165 71 166 int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr) 72 167 { 73 168 struct mlx4_ib_ah *ah = to_mah(ibah); 169 + enum rdma_link_layer ll; 74 170 75 171 memset(ah_attr, 0, sizeof *ah_attr); 76 - ah_attr->dlid = be16_to_cpu(ah->av.dlid); 77 - ah_attr->sl = be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 28; 78 - ah_attr->port_num = be32_to_cpu(ah->av.port_pd) >> 24; 79 - if (ah->av.stat_rate) 80 - ah_attr->static_rate = ah->av.stat_rate - MLX4_STAT_RATE_OFFSET; 81 - ah_attr->src_path_bits = ah->av.g_slid & 0x7F; 172 + ah_attr->sl = be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 28; 173 + ah_attr->port_num = be32_to_cpu(ah->av.ib.port_pd) >> 24; 174 + ll = rdma_port_get_link_layer(ibah->device, ah_attr->port_num); 175 + ah_attr->dlid = ll == IB_LINK_LAYER_INFINIBAND ? be16_to_cpu(ah->av.ib.dlid) : 0; 176 + if (ah->av.ib.stat_rate) 177 + ah_attr->static_rate = ah->av.ib.stat_rate - MLX4_STAT_RATE_OFFSET; 178 + ah_attr->src_path_bits = ah->av.ib.g_slid & 0x7F; 82 179 83 180 if (mlx4_ib_ah_grh_present(ah)) { 84 181 ah_attr->ah_flags = IB_AH_GRH; 85 182 86 183 ah_attr->grh.traffic_class = 87 - be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 20; 184 + be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 20; 88 185 ah_attr->grh.flow_label = 89 - be32_to_cpu(ah->av.sl_tclass_flowlabel) & 0xfffff; 90 - ah_attr->grh.hop_limit = ah->av.hop_limit; 91 - ah_attr->grh.sgid_index = ah->av.gid_index; 92 - memcpy(ah_attr->grh.dgid.raw, ah->av.dgid, 16); 186 + be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) & 0xfffff; 187 + ah_attr->grh.hop_limit = ah->av.ib.hop_limit; 188 + ah_attr->grh.sgid_index = ah->av.ib.gid_index; 189 + memcpy(ah_attr->grh.dgid.raw, ah->av.ib.dgid, 16); 93 190 } 94 191 95 192 return 0;
+20 -12
drivers/infiniband/hw/mlx4/mad.c
··· 311 311 struct ib_mad_agent *agent; 312 312 int p, q; 313 313 int ret; 314 + enum rdma_link_layer ll; 314 315 315 - for (p = 0; p < dev->num_ports; ++p) 316 + for (p = 0; p < dev->num_ports; ++p) { 317 + ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1); 316 318 for (q = 0; q <= 1; ++q) { 317 - agent = ib_register_mad_agent(&dev->ib_dev, p + 1, 318 - q ? IB_QPT_GSI : IB_QPT_SMI, 319 - NULL, 0, send_handler, 320 - NULL, NULL); 321 - if (IS_ERR(agent)) { 322 - ret = PTR_ERR(agent); 323 - goto err; 324 - } 325 - dev->send_agent[p][q] = agent; 319 + if (ll == IB_LINK_LAYER_INFINIBAND) { 320 + agent = ib_register_mad_agent(&dev->ib_dev, p + 1, 321 + q ? IB_QPT_GSI : IB_QPT_SMI, 322 + NULL, 0, send_handler, 323 + NULL, NULL); 324 + if (IS_ERR(agent)) { 325 + ret = PTR_ERR(agent); 326 + goto err; 327 + } 328 + dev->send_agent[p][q] = agent; 329 + } else 330 + dev->send_agent[p][q] = NULL; 326 331 } 332 + } 327 333 328 334 return 0; 329 335 ··· 350 344 for (p = 0; p < dev->num_ports; ++p) { 351 345 for (q = 0; q <= 1; ++q) { 352 346 agent = dev->send_agent[p][q]; 353 - dev->send_agent[p][q] = NULL; 354 - ib_unregister_mad_agent(agent); 347 + if (agent) { 348 + dev->send_agent[p][q] = NULL; 349 + ib_unregister_mad_agent(agent); 350 + } 355 351 } 356 352 357 353 if (dev->sm_ah[p])
+511 -42
drivers/infiniband/hw/mlx4/main.c
··· 35 35 #include <linux/init.h> 36 36 #include <linux/slab.h> 37 37 #include <linux/errno.h> 38 + #include <linux/netdevice.h> 39 + #include <linux/inetdevice.h> 40 + #include <linux/rtnetlink.h> 41 + #include <linux/if_vlan.h> 38 42 39 43 #include <rdma/ib_smi.h> 40 44 #include <rdma/ib_user_verbs.h> 45 + #include <rdma/ib_addr.h> 41 46 42 47 #include <linux/mlx4/driver.h> 43 48 #include <linux/mlx4/cmd.h> ··· 63 58 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 64 59 DRV_VERSION " (" DRV_RELDATE ")\n"; 65 60 61 + struct update_gid_work { 62 + struct work_struct work; 63 + union ib_gid gids[128]; 64 + struct mlx4_ib_dev *dev; 65 + int port; 66 + }; 67 + 68 + static struct workqueue_struct *wq; 69 + 66 70 static void init_query_mad(struct ib_smp *mad) 67 71 { 68 72 mad->base_version = 1; ··· 79 65 mad->class_version = 1; 80 66 mad->method = IB_MGMT_METHOD_GET; 81 67 } 68 + 69 + static union ib_gid zgid; 82 70 83 71 static int mlx4_ib_query_device(struct ib_device *ibdev, 84 72 struct ib_device_attr *props) ··· 151 135 props->max_srq = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs; 152 136 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 153 137 props->max_srq_sge = dev->dev->caps.max_srq_sge; 154 - props->max_fast_reg_page_list_len = PAGE_SIZE / sizeof (u64); 138 + props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 155 139 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 156 140 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 157 141 IB_ATOMIC_HCA : IB_ATOMIC_NONE; ··· 168 152 kfree(out_mad); 169 153 170 154 return err; 155 + } 156 + 157 + static enum rdma_link_layer 158 + mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num) 159 + { 160 + struct mlx4_dev *dev = to_mdev(device)->dev; 161 + 162 + return dev->caps.port_mask & (1 << (port_num - 1)) ? 163 + IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 164 + } 165 + 166 + static int ib_link_query_port(struct ib_device *ibdev, u8 port, 167 + struct ib_port_attr *props, 168 + struct ib_smp *out_mad) 169 + { 170 + props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 171 + props->lmc = out_mad->data[34] & 0x7; 172 + props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 173 + props->sm_sl = out_mad->data[36] & 0xf; 174 + props->state = out_mad->data[32] & 0xf; 175 + props->phys_state = out_mad->data[33] >> 4; 176 + props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 177 + props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 178 + props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 179 + props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 180 + props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 181 + props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 182 + props->active_width = out_mad->data[31] & 0xf; 183 + props->active_speed = out_mad->data[35] >> 4; 184 + props->max_mtu = out_mad->data[41] & 0xf; 185 + props->active_mtu = out_mad->data[36] >> 4; 186 + props->subnet_timeout = out_mad->data[51] & 0x1f; 187 + props->max_vl_num = out_mad->data[37] >> 4; 188 + props->init_type_reply = out_mad->data[41] >> 4; 189 + 190 + return 0; 191 + } 192 + 193 + static u8 state_to_phys_state(enum ib_port_state state) 194 + { 195 + return state == IB_PORT_ACTIVE ? 5 : 3; 196 + } 197 + 198 + static int eth_link_query_port(struct ib_device *ibdev, u8 port, 199 + struct ib_port_attr *props, 200 + struct ib_smp *out_mad) 201 + { 202 + struct mlx4_ib_iboe *iboe = &to_mdev(ibdev)->iboe; 203 + struct net_device *ndev; 204 + enum ib_mtu tmp; 205 + 206 + props->active_width = IB_WIDTH_4X; 207 + props->active_speed = 4; 208 + props->port_cap_flags = IB_PORT_CM_SUP; 209 + props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 210 + props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 211 + props->pkey_tbl_len = 1; 212 + props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 213 + props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 214 + props->max_mtu = IB_MTU_2048; 215 + props->subnet_timeout = 0; 216 + props->max_vl_num = out_mad->data[37] >> 4; 217 + props->init_type_reply = 0; 218 + props->state = IB_PORT_DOWN; 219 + props->phys_state = state_to_phys_state(props->state); 220 + props->active_mtu = IB_MTU_256; 221 + spin_lock(&iboe->lock); 222 + ndev = iboe->netdevs[port - 1]; 223 + if (!ndev) 224 + goto out; 225 + 226 + tmp = iboe_get_mtu(ndev->mtu); 227 + props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 228 + 229 + props->state = netif_running(ndev) && netif_oper_up(ndev) ? 230 + IB_PORT_ACTIVE : IB_PORT_DOWN; 231 + props->phys_state = state_to_phys_state(props->state); 232 + 233 + out: 234 + spin_unlock(&iboe->lock); 235 + return 0; 171 236 } 172 237 173 238 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, ··· 273 176 if (err) 274 177 goto out; 275 178 276 - props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 277 - props->lmc = out_mad->data[34] & 0x7; 278 - props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 279 - props->sm_sl = out_mad->data[36] & 0xf; 280 - props->state = out_mad->data[32] & 0xf; 281 - props->phys_state = out_mad->data[33] >> 4; 282 - props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 283 - props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 284 - props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 285 - props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 286 - props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 287 - props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 288 - props->active_width = out_mad->data[31] & 0xf; 289 - props->active_speed = out_mad->data[35] >> 4; 290 - props->max_mtu = out_mad->data[41] & 0xf; 291 - props->active_mtu = out_mad->data[36] >> 4; 292 - props->subnet_timeout = out_mad->data[51] & 0x1f; 293 - props->max_vl_num = out_mad->data[37] >> 4; 294 - props->init_type_reply = out_mad->data[41] >> 4; 179 + err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 180 + ib_link_query_port(ibdev, port, props, out_mad) : 181 + eth_link_query_port(ibdev, port, props, out_mad); 295 182 296 183 out: 297 184 kfree(in_mad); ··· 284 203 return err; 285 204 } 286 205 287 - static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 288 - union ib_gid *gid) 206 + static int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 207 + union ib_gid *gid) 289 208 { 290 209 struct ib_smp *in_mad = NULL; 291 210 struct ib_smp *out_mad = NULL; ··· 322 241 return err; 323 242 } 324 243 244 + static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index, 245 + union ib_gid *gid) 246 + { 247 + struct mlx4_ib_dev *dev = to_mdev(ibdev); 248 + 249 + *gid = dev->iboe.gid_table[port - 1][index]; 250 + 251 + return 0; 252 + } 253 + 254 + static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 255 + union ib_gid *gid) 256 + { 257 + if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND) 258 + return __mlx4_ib_query_gid(ibdev, port, index, gid); 259 + else 260 + return iboe_query_gid(ibdev, port, index, gid); 261 + } 262 + 325 263 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 326 264 u16 *pkey) 327 265 { ··· 372 272 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 373 273 struct ib_device_modify *props) 374 274 { 275 + struct mlx4_cmd_mailbox *mailbox; 276 + 375 277 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 376 278 return -EOPNOTSUPP; 377 279 378 - if (mask & IB_DEVICE_MODIFY_NODE_DESC) { 379 - spin_lock(&to_mdev(ibdev)->sm_lock); 380 - memcpy(ibdev->node_desc, props->node_desc, 64); 381 - spin_unlock(&to_mdev(ibdev)->sm_lock); 382 - } 280 + if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 281 + return 0; 282 + 283 + spin_lock(&to_mdev(ibdev)->sm_lock); 284 + memcpy(ibdev->node_desc, props->node_desc, 64); 285 + spin_unlock(&to_mdev(ibdev)->sm_lock); 286 + 287 + /* 288 + * If possible, pass node desc to FW, so it can generate 289 + * a 144 trap. If cmd fails, just ignore. 290 + */ 291 + mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 292 + if (IS_ERR(mailbox)) 293 + return 0; 294 + 295 + memset(mailbox->buf, 0, 256); 296 + memcpy(mailbox->buf, props->node_desc, 64); 297 + mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 298 + MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A); 299 + 300 + mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 383 301 384 302 return 0; 385 303 } ··· 407 289 { 408 290 struct mlx4_cmd_mailbox *mailbox; 409 291 int err; 292 + u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 410 293 411 294 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 412 295 if (IS_ERR(mailbox)) ··· 423 304 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 424 305 } 425 306 426 - err = mlx4_cmd(dev->dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT, 307 + err = mlx4_cmd(dev->dev, mailbox->dma, port, is_eth, MLX4_CMD_SET_PORT, 427 308 MLX4_CMD_TIME_CLASS_B); 428 309 429 310 mlx4_free_cmd_mailbox(dev->dev, mailbox); ··· 566 447 return 0; 567 448 } 568 449 450 + static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 451 + { 452 + struct mlx4_ib_qp *mqp = to_mqp(ibqp); 453 + struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 454 + struct mlx4_ib_gid_entry *ge; 455 + 456 + ge = kzalloc(sizeof *ge, GFP_KERNEL); 457 + if (!ge) 458 + return -ENOMEM; 459 + 460 + ge->gid = *gid; 461 + if (mlx4_ib_add_mc(mdev, mqp, gid)) { 462 + ge->port = mqp->port; 463 + ge->added = 1; 464 + } 465 + 466 + mutex_lock(&mqp->mutex); 467 + list_add_tail(&ge->list, &mqp->gid_list); 468 + mutex_unlock(&mqp->mutex); 469 + 470 + return 0; 471 + } 472 + 473 + int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 474 + union ib_gid *gid) 475 + { 476 + u8 mac[6]; 477 + struct net_device *ndev; 478 + int ret = 0; 479 + 480 + if (!mqp->port) 481 + return 0; 482 + 483 + spin_lock(&mdev->iboe.lock); 484 + ndev = mdev->iboe.netdevs[mqp->port - 1]; 485 + if (ndev) 486 + dev_hold(ndev); 487 + spin_unlock(&mdev->iboe.lock); 488 + 489 + if (ndev) { 490 + rdma_get_mcast_mac((struct in6_addr *)gid, mac); 491 + rtnl_lock(); 492 + dev_mc_add(mdev->iboe.netdevs[mqp->port - 1], mac); 493 + ret = 1; 494 + rtnl_unlock(); 495 + dev_put(ndev); 496 + } 497 + 498 + return ret; 499 + } 500 + 569 501 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 570 502 { 571 - return mlx4_multicast_attach(to_mdev(ibqp->device)->dev, 572 - &to_mqp(ibqp)->mqp, gid->raw, 573 - !!(to_mqp(ibqp)->flags & 574 - MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK)); 503 + int err; 504 + struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 505 + struct mlx4_ib_qp *mqp = to_mqp(ibqp); 506 + 507 + err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, !!(mqp->flags & 508 + MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK)); 509 + if (err) 510 + return err; 511 + 512 + err = add_gid_entry(ibqp, gid); 513 + if (err) 514 + goto err_add; 515 + 516 + return 0; 517 + 518 + err_add: 519 + mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw); 520 + return err; 521 + } 522 + 523 + static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 524 + { 525 + struct mlx4_ib_gid_entry *ge; 526 + struct mlx4_ib_gid_entry *tmp; 527 + struct mlx4_ib_gid_entry *ret = NULL; 528 + 529 + list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 530 + if (!memcmp(raw, ge->gid.raw, 16)) { 531 + ret = ge; 532 + break; 533 + } 534 + } 535 + 536 + return ret; 575 537 } 576 538 577 539 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 578 540 { 579 - return mlx4_multicast_detach(to_mdev(ibqp->device)->dev, 580 - &to_mqp(ibqp)->mqp, gid->raw); 541 + int err; 542 + struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 543 + struct mlx4_ib_qp *mqp = to_mqp(ibqp); 544 + u8 mac[6]; 545 + struct net_device *ndev; 546 + struct mlx4_ib_gid_entry *ge; 547 + 548 + err = mlx4_multicast_detach(mdev->dev, 549 + &mqp->mqp, gid->raw); 550 + if (err) 551 + return err; 552 + 553 + mutex_lock(&mqp->mutex); 554 + ge = find_gid_entry(mqp, gid->raw); 555 + if (ge) { 556 + spin_lock(&mdev->iboe.lock); 557 + ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 558 + if (ndev) 559 + dev_hold(ndev); 560 + spin_unlock(&mdev->iboe.lock); 561 + rdma_get_mcast_mac((struct in6_addr *)gid, mac); 562 + if (ndev) { 563 + rtnl_lock(); 564 + dev_mc_del(mdev->iboe.netdevs[ge->port - 1], mac); 565 + rtnl_unlock(); 566 + dev_put(ndev); 567 + } 568 + list_del(&ge->list); 569 + kfree(ge); 570 + } else 571 + printk(KERN_WARNING "could not find mgid entry\n"); 572 + 573 + mutex_unlock(&mqp->mutex); 574 + 575 + return 0; 581 576 } 582 577 583 578 static int init_node_data(struct mlx4_ib_dev *dev) ··· 776 543 &dev_attr_board_id 777 544 }; 778 545 546 + static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id, struct net_device *dev) 547 + { 548 + memcpy(eui, dev->dev_addr, 3); 549 + memcpy(eui + 5, dev->dev_addr + 3, 3); 550 + if (vlan_id < 0x1000) { 551 + eui[3] = vlan_id >> 8; 552 + eui[4] = vlan_id & 0xff; 553 + } else { 554 + eui[3] = 0xff; 555 + eui[4] = 0xfe; 556 + } 557 + eui[0] ^= 2; 558 + } 559 + 560 + static void update_gids_task(struct work_struct *work) 561 + { 562 + struct update_gid_work *gw = container_of(work, struct update_gid_work, work); 563 + struct mlx4_cmd_mailbox *mailbox; 564 + union ib_gid *gids; 565 + int err; 566 + struct mlx4_dev *dev = gw->dev->dev; 567 + struct ib_event event; 568 + 569 + mailbox = mlx4_alloc_cmd_mailbox(dev); 570 + if (IS_ERR(mailbox)) { 571 + printk(KERN_WARNING "update gid table failed %ld\n", PTR_ERR(mailbox)); 572 + return; 573 + } 574 + 575 + gids = mailbox->buf; 576 + memcpy(gids, gw->gids, sizeof gw->gids); 577 + 578 + err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port, 579 + 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B); 580 + if (err) 581 + printk(KERN_WARNING "set port command failed\n"); 582 + else { 583 + memcpy(gw->dev->iboe.gid_table[gw->port - 1], gw->gids, sizeof gw->gids); 584 + event.device = &gw->dev->ib_dev; 585 + event.element.port_num = gw->port; 586 + event.event = IB_EVENT_LID_CHANGE; 587 + ib_dispatch_event(&event); 588 + } 589 + 590 + mlx4_free_cmd_mailbox(dev, mailbox); 591 + kfree(gw); 592 + } 593 + 594 + static int update_ipv6_gids(struct mlx4_ib_dev *dev, int port, int clear) 595 + { 596 + struct net_device *ndev = dev->iboe.netdevs[port - 1]; 597 + struct update_gid_work *work; 598 + struct net_device *tmp; 599 + int i; 600 + u8 *hits; 601 + int ret; 602 + union ib_gid gid; 603 + int free; 604 + int found; 605 + int need_update = 0; 606 + u16 vid; 607 + 608 + work = kzalloc(sizeof *work, GFP_ATOMIC); 609 + if (!work) 610 + return -ENOMEM; 611 + 612 + hits = kzalloc(128, GFP_ATOMIC); 613 + if (!hits) { 614 + ret = -ENOMEM; 615 + goto out; 616 + } 617 + 618 + read_lock(&dev_base_lock); 619 + for_each_netdev(&init_net, tmp) { 620 + if (ndev && (tmp == ndev || rdma_vlan_dev_real_dev(tmp) == ndev)) { 621 + gid.global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL); 622 + vid = rdma_vlan_dev_vlan_id(tmp); 623 + mlx4_addrconf_ifid_eui48(&gid.raw[8], vid, ndev); 624 + found = 0; 625 + free = -1; 626 + for (i = 0; i < 128; ++i) { 627 + if (free < 0 && 628 + !memcmp(&dev->iboe.gid_table[port - 1][i], &zgid, sizeof zgid)) 629 + free = i; 630 + if (!memcmp(&dev->iboe.gid_table[port - 1][i], &gid, sizeof gid)) { 631 + hits[i] = 1; 632 + found = 1; 633 + break; 634 + } 635 + } 636 + 637 + if (!found) { 638 + if (tmp == ndev && 639 + (memcmp(&dev->iboe.gid_table[port - 1][0], 640 + &gid, sizeof gid) || 641 + !memcmp(&dev->iboe.gid_table[port - 1][0], 642 + &zgid, sizeof gid))) { 643 + dev->iboe.gid_table[port - 1][0] = gid; 644 + ++need_update; 645 + hits[0] = 1; 646 + } else if (free >= 0) { 647 + dev->iboe.gid_table[port - 1][free] = gid; 648 + hits[free] = 1; 649 + ++need_update; 650 + } 651 + } 652 + } 653 + } 654 + read_unlock(&dev_base_lock); 655 + 656 + for (i = 0; i < 128; ++i) 657 + if (!hits[i]) { 658 + if (memcmp(&dev->iboe.gid_table[port - 1][i], &zgid, sizeof zgid)) 659 + ++need_update; 660 + dev->iboe.gid_table[port - 1][i] = zgid; 661 + } 662 + 663 + if (need_update) { 664 + memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof work->gids); 665 + INIT_WORK(&work->work, update_gids_task); 666 + work->port = port; 667 + work->dev = dev; 668 + queue_work(wq, &work->work); 669 + } else 670 + kfree(work); 671 + 672 + kfree(hits); 673 + return 0; 674 + 675 + out: 676 + kfree(work); 677 + return ret; 678 + } 679 + 680 + static void handle_en_event(struct mlx4_ib_dev *dev, int port, unsigned long event) 681 + { 682 + switch (event) { 683 + case NETDEV_UP: 684 + case NETDEV_CHANGEADDR: 685 + update_ipv6_gids(dev, port, 0); 686 + break; 687 + 688 + case NETDEV_DOWN: 689 + update_ipv6_gids(dev, port, 1); 690 + dev->iboe.netdevs[port - 1] = NULL; 691 + } 692 + } 693 + 694 + static void netdev_added(struct mlx4_ib_dev *dev, int port) 695 + { 696 + update_ipv6_gids(dev, port, 0); 697 + } 698 + 699 + static void netdev_removed(struct mlx4_ib_dev *dev, int port) 700 + { 701 + update_ipv6_gids(dev, port, 1); 702 + } 703 + 704 + static int mlx4_ib_netdev_event(struct notifier_block *this, unsigned long event, 705 + void *ptr) 706 + { 707 + struct net_device *dev = ptr; 708 + struct mlx4_ib_dev *ibdev; 709 + struct net_device *oldnd; 710 + struct mlx4_ib_iboe *iboe; 711 + int port; 712 + 713 + if (!net_eq(dev_net(dev), &init_net)) 714 + return NOTIFY_DONE; 715 + 716 + ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 717 + iboe = &ibdev->iboe; 718 + 719 + spin_lock(&iboe->lock); 720 + mlx4_foreach_ib_transport_port(port, ibdev->dev) { 721 + oldnd = iboe->netdevs[port - 1]; 722 + iboe->netdevs[port - 1] = 723 + mlx4_get_protocol_dev(ibdev->dev, MLX4_PROTOCOL_EN, port); 724 + if (oldnd != iboe->netdevs[port - 1]) { 725 + if (iboe->netdevs[port - 1]) 726 + netdev_added(ibdev, port); 727 + else 728 + netdev_removed(ibdev, port); 729 + } 730 + } 731 + 732 + if (dev == iboe->netdevs[0] || 733 + (iboe->netdevs[0] && rdma_vlan_dev_real_dev(dev) == iboe->netdevs[0])) 734 + handle_en_event(ibdev, 1, event); 735 + else if (dev == iboe->netdevs[1] 736 + || (iboe->netdevs[1] && rdma_vlan_dev_real_dev(dev) == iboe->netdevs[1])) 737 + handle_en_event(ibdev, 2, event); 738 + 739 + spin_unlock(&iboe->lock); 740 + 741 + return NOTIFY_DONE; 742 + } 743 + 779 744 static void *mlx4_ib_add(struct mlx4_dev *dev) 780 745 { 781 746 struct mlx4_ib_dev *ibdev; 782 747 int num_ports = 0; 783 748 int i; 749 + int err; 750 + struct mlx4_ib_iboe *iboe; 784 751 785 752 printk_once(KERN_INFO "%s", mlx4_ib_version); 786 753 787 - mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 754 + mlx4_foreach_ib_transport_port(i, dev) 788 755 num_ports++; 789 756 790 757 /* No point in registering a device with no ports... */ ··· 996 563 dev_err(&dev->pdev->dev, "Device struct alloc failed\n"); 997 564 return NULL; 998 565 } 566 + 567 + iboe = &ibdev->iboe; 999 568 1000 569 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) 1001 570 goto err_dealloc; ··· 1047 612 1048 613 ibdev->ib_dev.query_device = mlx4_ib_query_device; 1049 614 ibdev->ib_dev.query_port = mlx4_ib_query_port; 615 + ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer; 1050 616 ibdev->ib_dev.query_gid = mlx4_ib_query_gid; 1051 617 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey; 1052 618 ibdev->ib_dev.modify_device = mlx4_ib_modify_device; ··· 1092 656 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; 1093 657 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; 1094 658 659 + spin_lock_init(&iboe->lock); 660 + 1095 661 if (init_node_data(ibdev)) 1096 662 goto err_map; 1097 663 ··· 1106 668 if (mlx4_ib_mad_init(ibdev)) 1107 669 goto err_reg; 1108 670 671 + if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE && !iboe->nb.notifier_call) { 672 + iboe->nb.notifier_call = mlx4_ib_netdev_event; 673 + err = register_netdevice_notifier(&iboe->nb); 674 + if (err) 675 + goto err_reg; 676 + } 677 + 1109 678 for (i = 0; i < ARRAY_SIZE(mlx4_class_attributes); ++i) { 1110 679 if (device_create_file(&ibdev->ib_dev.dev, 1111 680 mlx4_class_attributes[i])) 1112 - goto err_reg; 681 + goto err_notif; 1113 682 } 1114 683 1115 684 ibdev->ib_active = true; 1116 685 1117 686 return ibdev; 687 + 688 + err_notif: 689 + if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 690 + printk(KERN_WARNING "failure unregistering notifier\n"); 691 + flush_workqueue(wq); 1118 692 1119 693 err_reg: 1120 694 ib_unregister_device(&ibdev->ib_dev); ··· 1153 703 1154 704 mlx4_ib_mad_cleanup(ibdev); 1155 705 ib_unregister_device(&ibdev->ib_dev); 706 + if (ibdev->iboe.nb.notifier_call) { 707 + if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 708 + printk(KERN_WARNING "failure unregistering notifier\n"); 709 + ibdev->iboe.nb.notifier_call = NULL; 710 + } 711 + iounmap(ibdev->uar_map); 1156 712 1157 - for (p = 1; p <= ibdev->num_ports; ++p) 713 + mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 1158 714 mlx4_CLOSE_PORT(dev, p); 1159 715 1160 - iounmap(ibdev->uar_map); 1161 716 mlx4_uar_free(dev, &ibdev->priv_uar); 1162 717 mlx4_pd_free(dev, ibdev->priv_pdn); 1163 718 ib_dealloc_device(&ibdev->ib_dev); ··· 1202 747 } 1203 748 1204 749 static struct mlx4_interface mlx4_ib_interface = { 1205 - .add = mlx4_ib_add, 1206 - .remove = mlx4_ib_remove, 1207 - .event = mlx4_ib_event 750 + .add = mlx4_ib_add, 751 + .remove = mlx4_ib_remove, 752 + .event = mlx4_ib_event, 753 + .protocol = MLX4_PROTOCOL_IB 1208 754 }; 1209 755 1210 756 static int __init mlx4_ib_init(void) 1211 757 { 1212 - return mlx4_register_interface(&mlx4_ib_interface); 758 + int err; 759 + 760 + wq = create_singlethread_workqueue("mlx4_ib"); 761 + if (!wq) 762 + return -ENOMEM; 763 + 764 + err = mlx4_register_interface(&mlx4_ib_interface); 765 + if (err) { 766 + destroy_workqueue(wq); 767 + return err; 768 + } 769 + 770 + return 0; 1213 771 } 1214 772 1215 773 static void __exit mlx4_ib_cleanup(void) 1216 774 { 1217 775 mlx4_unregister_interface(&mlx4_ib_interface); 776 + destroy_workqueue(wq); 1218 777 } 1219 778 1220 779 module_init(mlx4_ib_init);
+30 -2
drivers/infiniband/hw/mlx4/mlx4_ib.h
··· 112 112 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = 1 << 1, 113 113 }; 114 114 115 + struct mlx4_ib_gid_entry { 116 + struct list_head list; 117 + union ib_gid gid; 118 + int added; 119 + u8 port; 120 + }; 121 + 115 122 struct mlx4_ib_qp { 116 123 struct ib_qp ibqp; 117 124 struct mlx4_qp mqp; ··· 145 138 u8 resp_depth; 146 139 u8 sq_no_prefetch; 147 140 u8 state; 141 + int mlx_type; 142 + struct list_head gid_list; 148 143 }; 149 144 150 145 struct mlx4_ib_srq { ··· 166 157 167 158 struct mlx4_ib_ah { 168 159 struct ib_ah ibah; 169 - struct mlx4_av av; 160 + union mlx4_ext_av av; 161 + }; 162 + 163 + struct mlx4_ib_iboe { 164 + spinlock_t lock; 165 + struct net_device *netdevs[MLX4_MAX_PORTS]; 166 + struct notifier_block nb; 167 + union ib_gid gid_table[MLX4_MAX_PORTS][128]; 170 168 }; 171 169 172 170 struct mlx4_ib_dev { ··· 192 176 193 177 struct mutex cap_mask_mutex; 194 178 bool ib_active; 179 + struct mlx4_ib_iboe iboe; 195 180 }; 196 181 197 182 static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev) ··· 331 314 int mlx4_ib_unmap_fmr(struct list_head *fmr_list); 332 315 int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr); 333 316 317 + int mlx4_ib_resolve_grh(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah_attr, 318 + u8 *mac, int *is_mcast, u8 port); 319 + 334 320 static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah) 335 321 { 336 - return !!(ah->av.g_slid & 0x80); 322 + u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3; 323 + 324 + if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET) 325 + return 1; 326 + 327 + return !!(ah->av.ib.g_slid & 0x80); 337 328 } 329 + 330 + int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 331 + union ib_gid *gid); 338 332 339 333 #endif /* MLX4_IB_H */
+1 -1
drivers/infiniband/hw/mlx4/mr.c
··· 226 226 struct mlx4_ib_fast_reg_page_list *mfrpl; 227 227 int size = page_list_len * sizeof (u64); 228 228 229 - if (size > PAGE_SIZE) 229 + if (page_list_len > MLX4_MAX_FAST_REG_PAGES) 230 230 return ERR_PTR(-EINVAL); 231 231 232 232 mfrpl = kmalloc(sizeof *mfrpl, GFP_KERNEL);
+162 -33
drivers/infiniband/hw/mlx4/qp.c
··· 33 33 34 34 #include <linux/log2.h> 35 35 #include <linux/slab.h> 36 + #include <linux/netdevice.h> 36 37 37 38 #include <rdma/ib_cache.h> 38 39 #include <rdma/ib_pack.h> 40 + #include <rdma/ib_addr.h> 39 41 40 42 #include <linux/mlx4/qp.h> 41 43 ··· 50 48 51 49 enum { 52 50 MLX4_IB_DEFAULT_SCHED_QUEUE = 0x83, 53 - MLX4_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f 51 + MLX4_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52 + MLX4_IB_LINK_TYPE_IB = 0, 53 + MLX4_IB_LINK_TYPE_ETH = 1 54 54 }; 55 55 56 56 enum { 57 57 /* 58 - * Largest possible UD header: send with GRH and immediate data. 58 + * Largest possible UD header: send with GRH and immediate 59 + * data plus 18 bytes for an Ethernet header with VLAN/802.1Q 60 + * tag. (LRH would only use 8 bytes, so Ethernet is the 61 + * biggest case) 59 62 */ 60 - MLX4_IB_UD_HEADER_SIZE = 72, 63 + MLX4_IB_UD_HEADER_SIZE = 82, 61 64 MLX4_IB_LSO_HEADER_SPARE = 128, 65 + }; 66 + 67 + enum { 68 + MLX4_IB_IBOE_ETHERTYPE = 0x8915 62 69 }; 63 70 64 71 struct mlx4_ib_sqp { ··· 473 462 mutex_init(&qp->mutex); 474 463 spin_lock_init(&qp->sq.lock); 475 464 spin_lock_init(&qp->rq.lock); 465 + INIT_LIST_HEAD(&qp->gid_list); 476 466 477 467 qp->state = IB_QPS_RESET; 478 468 if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ··· 661 649 } 662 650 } 663 651 652 + static void del_gid_entries(struct mlx4_ib_qp *qp) 653 + { 654 + struct mlx4_ib_gid_entry *ge, *tmp; 655 + 656 + list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 657 + list_del(&ge->list); 658 + kfree(ge); 659 + } 660 + } 661 + 664 662 static void destroy_qp_common(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp, 665 663 int is_user) 666 664 { ··· 717 695 if (!qp->ibqp.srq) 718 696 mlx4_db_free(dev->dev, &qp->db); 719 697 } 698 + 699 + del_gid_entries(qp); 720 700 } 721 701 722 702 struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd, ··· 876 852 static int mlx4_set_path(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah, 877 853 struct mlx4_qp_path *path, u8 port) 878 854 { 855 + int err; 856 + int is_eth = rdma_port_get_link_layer(&dev->ib_dev, port) == 857 + IB_LINK_LAYER_ETHERNET; 858 + u8 mac[6]; 859 + int is_mcast; 860 + u16 vlan_tag; 861 + int vidx; 862 + 879 863 path->grh_mylmc = ah->src_path_bits & 0x7f; 880 864 path->rlid = cpu_to_be16(ah->dlid); 881 865 if (ah->static_rate) { ··· 911 879 memcpy(path->rgid, ah->grh.dgid.raw, 16); 912 880 } 913 881 914 - path->sched_queue = MLX4_IB_DEFAULT_SCHED_QUEUE | 915 - ((port - 1) << 6) | ((ah->sl & 0xf) << 2); 882 + if (is_eth) { 883 + path->sched_queue = MLX4_IB_DEFAULT_SCHED_QUEUE | 884 + ((port - 1) << 6) | ((ah->sl & 7) << 3) | ((ah->sl & 8) >> 1); 885 + 886 + if (!(ah->ah_flags & IB_AH_GRH)) 887 + return -1; 888 + 889 + err = mlx4_ib_resolve_grh(dev, ah, mac, &is_mcast, port); 890 + if (err) 891 + return err; 892 + 893 + memcpy(path->dmac, mac, 6); 894 + path->ackto = MLX4_IB_LINK_TYPE_ETH; 895 + /* use index 0 into MAC table for IBoE */ 896 + path->grh_mylmc &= 0x80; 897 + 898 + vlan_tag = rdma_get_vlan_id(&dev->iboe.gid_table[port - 1][ah->grh.sgid_index]); 899 + if (vlan_tag < 0x1000) { 900 + if (mlx4_find_cached_vlan(dev->dev, port, vlan_tag, &vidx)) 901 + return -ENOENT; 902 + 903 + path->vlan_index = vidx; 904 + path->fl = 1 << 6; 905 + } 906 + } else 907 + path->sched_queue = MLX4_IB_DEFAULT_SCHED_QUEUE | 908 + ((port - 1) << 6) | ((ah->sl & 0xf) << 2); 916 909 917 910 return 0; 911 + } 912 + 913 + static void update_mcg_macs(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp) 914 + { 915 + struct mlx4_ib_gid_entry *ge, *tmp; 916 + 917 + list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 918 + if (!ge->added && mlx4_ib_add_mc(dev, qp, &ge->gid)) { 919 + ge->added = 1; 920 + ge->port = qp->port; 921 + } 922 + } 918 923 } 919 924 920 925 static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, ··· 1049 980 } 1050 981 1051 982 if (attr_mask & IB_QP_TIMEOUT) { 1052 - context->pri_path.ackto = attr->timeout << 3; 983 + context->pri_path.ackto |= attr->timeout << 3; 1053 984 optpar |= MLX4_QP_OPTPAR_ACK_TIMEOUT; 1054 985 } 1055 986 ··· 1187 1118 qp->atomic_rd_en = attr->qp_access_flags; 1188 1119 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 1189 1120 qp->resp_depth = attr->max_dest_rd_atomic; 1190 - if (attr_mask & IB_QP_PORT) 1121 + if (attr_mask & IB_QP_PORT) { 1191 1122 qp->port = attr->port_num; 1123 + update_mcg_macs(dev, qp); 1124 + } 1192 1125 if (attr_mask & IB_QP_ALT_PATH) 1193 1126 qp->alt_port = attr->alt_port_num; 1194 1127 ··· 1292 1221 struct mlx4_wqe_mlx_seg *mlx = wqe; 1293 1222 struct mlx4_wqe_inline_seg *inl = wqe + sizeof *mlx; 1294 1223 struct mlx4_ib_ah *ah = to_mah(wr->wr.ud.ah); 1224 + union ib_gid sgid; 1295 1225 u16 pkey; 1296 1226 int send_size; 1297 1227 int header_size; 1298 1228 int spc; 1299 1229 int i; 1230 + int is_eth; 1231 + int is_vlan = 0; 1232 + int is_grh; 1233 + u16 vlan; 1300 1234 1301 1235 send_size = 0; 1302 1236 for (i = 0; i < wr->num_sge; ++i) 1303 1237 send_size += wr->sg_list[i].length; 1304 1238 1305 - ib_ud_header_init(send_size, mlx4_ib_ah_grh_present(ah), 0, &sqp->ud_header); 1239 + is_eth = rdma_port_get_link_layer(sqp->qp.ibqp.device, sqp->qp.port) == IB_LINK_LAYER_ETHERNET; 1240 + is_grh = mlx4_ib_ah_grh_present(ah); 1241 + if (is_eth) { 1242 + ib_get_cached_gid(ib_dev, be32_to_cpu(ah->av.ib.port_pd) >> 24, 1243 + ah->av.ib.gid_index, &sgid); 1244 + vlan = rdma_get_vlan_id(&sgid); 1245 + is_vlan = vlan < 0x1000; 1246 + } 1247 + ib_ud_header_init(send_size, !is_eth, is_eth, is_vlan, is_grh, 0, &sqp->ud_header); 1306 1248 1307 - sqp->ud_header.lrh.service_level = 1308 - be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 28; 1309 - sqp->ud_header.lrh.destination_lid = ah->av.dlid; 1310 - sqp->ud_header.lrh.source_lid = cpu_to_be16(ah->av.g_slid & 0x7f); 1311 - if (mlx4_ib_ah_grh_present(ah)) { 1249 + if (!is_eth) { 1250 + sqp->ud_header.lrh.service_level = 1251 + be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 28; 1252 + sqp->ud_header.lrh.destination_lid = ah->av.ib.dlid; 1253 + sqp->ud_header.lrh.source_lid = cpu_to_be16(ah->av.ib.g_slid & 0x7f); 1254 + } 1255 + 1256 + if (is_grh) { 1312 1257 sqp->ud_header.grh.traffic_class = 1313 - (be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 20) & 0xff; 1258 + (be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 20) & 0xff; 1314 1259 sqp->ud_header.grh.flow_label = 1315 - ah->av.sl_tclass_flowlabel & cpu_to_be32(0xfffff); 1316 - sqp->ud_header.grh.hop_limit = ah->av.hop_limit; 1317 - ib_get_cached_gid(ib_dev, be32_to_cpu(ah->av.port_pd) >> 24, 1318 - ah->av.gid_index, &sqp->ud_header.grh.source_gid); 1260 + ah->av.ib.sl_tclass_flowlabel & cpu_to_be32(0xfffff); 1261 + sqp->ud_header.grh.hop_limit = ah->av.ib.hop_limit; 1262 + ib_get_cached_gid(ib_dev, be32_to_cpu(ah->av.ib.port_pd) >> 24, 1263 + ah->av.ib.gid_index, &sqp->ud_header.grh.source_gid); 1319 1264 memcpy(sqp->ud_header.grh.destination_gid.raw, 1320 - ah->av.dgid, 16); 1265 + ah->av.ib.dgid, 16); 1321 1266 } 1322 1267 1323 1268 mlx->flags &= cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE); 1324 - mlx->flags |= cpu_to_be32((!sqp->qp.ibqp.qp_num ? MLX4_WQE_MLX_VL15 : 0) | 1325 - (sqp->ud_header.lrh.destination_lid == 1326 - IB_LID_PERMISSIVE ? MLX4_WQE_MLX_SLR : 0) | 1327 - (sqp->ud_header.lrh.service_level << 8)); 1328 - mlx->rlid = sqp->ud_header.lrh.destination_lid; 1269 + 1270 + if (!is_eth) { 1271 + mlx->flags |= cpu_to_be32((!sqp->qp.ibqp.qp_num ? MLX4_WQE_MLX_VL15 : 0) | 1272 + (sqp->ud_header.lrh.destination_lid == 1273 + IB_LID_PERMISSIVE ? MLX4_WQE_MLX_SLR : 0) | 1274 + (sqp->ud_header.lrh.service_level << 8)); 1275 + mlx->rlid = sqp->ud_header.lrh.destination_lid; 1276 + } 1329 1277 1330 1278 switch (wr->opcode) { 1331 1279 case IB_WR_SEND: ··· 1360 1270 return -EINVAL; 1361 1271 } 1362 1272 1363 - sqp->ud_header.lrh.virtual_lane = !sqp->qp.ibqp.qp_num ? 15 : 0; 1364 - if (sqp->ud_header.lrh.destination_lid == IB_LID_PERMISSIVE) 1365 - sqp->ud_header.lrh.source_lid = IB_LID_PERMISSIVE; 1273 + if (is_eth) { 1274 + u8 *smac; 1275 + 1276 + memcpy(sqp->ud_header.eth.dmac_h, ah->av.eth.mac, 6); 1277 + /* FIXME: cache smac value? */ 1278 + smac = to_mdev(sqp->qp.ibqp.device)->iboe.netdevs[sqp->qp.port - 1]->dev_addr; 1279 + memcpy(sqp->ud_header.eth.smac_h, smac, 6); 1280 + if (!memcmp(sqp->ud_header.eth.smac_h, sqp->ud_header.eth.dmac_h, 6)) 1281 + mlx->flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK); 1282 + if (!is_vlan) { 1283 + sqp->ud_header.eth.type = cpu_to_be16(MLX4_IB_IBOE_ETHERTYPE); 1284 + } else { 1285 + u16 pcp; 1286 + 1287 + sqp->ud_header.vlan.type = cpu_to_be16(MLX4_IB_IBOE_ETHERTYPE); 1288 + pcp = (be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 27 & 3) << 13; 1289 + sqp->ud_header.vlan.tag = cpu_to_be16(vlan | pcp); 1290 + } 1291 + } else { 1292 + sqp->ud_header.lrh.virtual_lane = !sqp->qp.ibqp.qp_num ? 15 : 0; 1293 + if (sqp->ud_header.lrh.destination_lid == IB_LID_PERMISSIVE) 1294 + sqp->ud_header.lrh.source_lid = IB_LID_PERMISSIVE; 1295 + } 1366 1296 sqp->ud_header.bth.solicited_event = !!(wr->send_flags & IB_SEND_SOLICITED); 1367 1297 if (!sqp->qp.ibqp.qp_num) 1368 1298 ib_get_cached_pkey(ib_dev, sqp->qp.port, sqp->pkey_index, &pkey); ··· 1539 1429 } 1540 1430 1541 1431 static void set_datagram_seg(struct mlx4_wqe_datagram_seg *dseg, 1542 - struct ib_send_wr *wr) 1432 + struct ib_send_wr *wr, __be16 *vlan) 1543 1433 { 1544 1434 memcpy(dseg->av, &to_mah(wr->wr.ud.ah)->av, sizeof (struct mlx4_av)); 1545 1435 dseg->dqpn = cpu_to_be32(wr->wr.ud.remote_qpn); 1546 1436 dseg->qkey = cpu_to_be32(wr->wr.ud.remote_qkey); 1437 + dseg->vlan = to_mah(wr->wr.ud.ah)->av.eth.vlan; 1438 + memcpy(dseg->mac, to_mah(wr->wr.ud.ah)->av.eth.mac, 6); 1439 + *vlan = dseg->vlan; 1547 1440 } 1548 1441 1549 1442 static void set_mlx_icrc_seg(void *dseg) ··· 1649 1536 __be32 uninitialized_var(lso_hdr_sz); 1650 1537 __be32 blh; 1651 1538 int i; 1539 + __be16 vlan = cpu_to_be16(0xffff); 1652 1540 1653 1541 spin_lock_irqsave(&qp->sq.lock, flags); 1654 1542 ··· 1753 1639 break; 1754 1640 1755 1641 case IB_QPT_UD: 1756 - set_datagram_seg(wqe, wr); 1642 + set_datagram_seg(wqe, wr, &vlan); 1757 1643 wqe += sizeof (struct mlx4_wqe_datagram_seg); 1758 1644 size += sizeof (struct mlx4_wqe_datagram_seg) / 16; 1759 1645 ··· 1830 1716 1831 1717 ctrl->owner_opcode = mlx4_ib_opcode[wr->opcode] | 1832 1718 (ind & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0) | blh; 1719 + 1720 + if (be16_to_cpu(vlan) < 0x1000) { 1721 + ctrl->ins_vlan = 1 << 6; 1722 + ctrl->vlan_tag = vlan; 1723 + } 1833 1724 1834 1725 stamp = ind + qp->sq_spare_wqes; 1835 1726 ind += DIV_ROUND_UP(size * 16, 1U << qp->sq.wqe_shift); ··· 1985 1866 return ib_flags; 1986 1867 } 1987 1868 1988 - static void to_ib_ah_attr(struct mlx4_dev *dev, struct ib_ah_attr *ib_ah_attr, 1869 + static void to_ib_ah_attr(struct mlx4_ib_dev *ibdev, struct ib_ah_attr *ib_ah_attr, 1989 1870 struct mlx4_qp_path *path) 1990 1871 { 1872 + struct mlx4_dev *dev = ibdev->dev; 1873 + int is_eth; 1874 + 1991 1875 memset(ib_ah_attr, 0, sizeof *ib_ah_attr); 1992 1876 ib_ah_attr->port_num = path->sched_queue & 0x40 ? 2 : 1; 1993 1877 1994 1878 if (ib_ah_attr->port_num == 0 || ib_ah_attr->port_num > dev->caps.num_ports) 1995 1879 return; 1996 1880 1881 + is_eth = rdma_port_get_link_layer(&ibdev->ib_dev, ib_ah_attr->port_num) == 1882 + IB_LINK_LAYER_ETHERNET; 1883 + if (is_eth) 1884 + ib_ah_attr->sl = ((path->sched_queue >> 3) & 0x7) | 1885 + ((path->sched_queue & 4) << 1); 1886 + else 1887 + ib_ah_attr->sl = (path->sched_queue >> 2) & 0xf; 1888 + 1997 1889 ib_ah_attr->dlid = be16_to_cpu(path->rlid); 1998 - ib_ah_attr->sl = (path->sched_queue >> 2) & 0xf; 1999 1890 ib_ah_attr->src_path_bits = path->grh_mylmc & 0x7f; 2000 1891 ib_ah_attr->static_rate = path->static_rate ? path->static_rate - 5 : 0; 2001 1892 ib_ah_attr->ah_flags = (path->grh_mylmc & (1 << 7)) ? IB_AH_GRH : 0; ··· 2058 1929 to_ib_qp_access_flags(be32_to_cpu(context.params2)); 2059 1930 2060 1931 if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 2061 - to_ib_ah_attr(dev->dev, &qp_attr->ah_attr, &context.pri_path); 2062 - to_ib_ah_attr(dev->dev, &qp_attr->alt_ah_attr, &context.alt_path); 1932 + to_ib_ah_attr(dev, &qp_attr->ah_attr, &context.pri_path); 1933 + to_ib_ah_attr(dev, &qp_attr->alt_ah_attr, &context.alt_path); 2063 1934 qp_attr->alt_pkey_index = context.alt_path.pkey_index & 0x7f; 2064 1935 qp_attr->alt_port_num = qp_attr->alt_ah_attr.port_num; 2065 1936 }
+1 -1
drivers/infiniband/hw/mthca/mthca_qp.c
··· 1493 1493 int err; 1494 1494 u16 pkey; 1495 1495 1496 - ib_ud_header_init(256, /* assume a MAD */ 1496 + ib_ud_header_init(256, /* assume a MAD */ 1, 0, 0, 1497 1497 mthca_ah_grh_present(to_mah(wr->wr.ud.ah)), 0, 1498 1498 &sqp->ud_header); 1499 1499
+1 -2
drivers/infiniband/hw/nes/nes_cm.c
··· 1424 1424 { 1425 1425 1426 1426 int reset = 0; /* whether to send reset in case of err.. */ 1427 - int passive_state; 1428 1427 atomic_inc(&cm_resets_recvd); 1429 1428 nes_debug(NES_DBG_CM, "Received Reset, cm_node = %p, state = %u." 1430 1429 " refcnt=%d\n", cm_node, cm_node->state, ··· 1438 1439 active_open_err(cm_node, skb, reset); 1439 1440 break; 1440 1441 case NES_CM_STATE_MPAREQ_RCVD: 1441 - passive_state = atomic_add_return(1, &cm_node->passive_state); 1442 + atomic_inc(&cm_node->passive_state); 1442 1443 dev_kfree_skb_any(skb); 1443 1444 break; 1444 1445 case NES_CM_STATE_ESTABLISHED:
+1
drivers/infiniband/hw/nes/nes_nic.c
··· 271 271 272 272 if (netif_msg_ifdown(nesvnic)) 273 273 printk(KERN_INFO PFX "%s: disabling interface\n", netdev->name); 274 + netif_carrier_off(netdev); 274 275 275 276 /* Disable network packets */ 276 277 napi_disable(&nesvnic->napi);
+9 -7
drivers/infiniband/hw/nes/nes_verbs.c
··· 476 476 } 477 477 nes_debug(NES_DBG_MR, "nes_alloc_fast_reg_pbl: nes_frpl = %p, " 478 478 "ibfrpl = %p, ibfrpl.page_list = %p, pbl.kva = %p, " 479 - "pbl.paddr= %p\n", pnesfrpl, &pnesfrpl->ibfrpl, 479 + "pbl.paddr = %llx\n", pnesfrpl, &pnesfrpl->ibfrpl, 480 480 pnesfrpl->ibfrpl.page_list, pnesfrpl->nes_wqe_pbl.kva, 481 - (void *)pnesfrpl->nes_wqe_pbl.paddr); 481 + (unsigned long long) pnesfrpl->nes_wqe_pbl.paddr); 482 482 483 483 return pifrpl; 484 484 } ··· 584 584 props->lmc = 0; 585 585 props->sm_lid = 0; 586 586 props->sm_sl = 0; 587 - if (nesvnic->linkup) 587 + if (netif_queue_stopped(netdev)) 588 + props->state = IB_PORT_DOWN; 589 + else if (nesvnic->linkup) 588 590 props->state = IB_PORT_ACTIVE; 589 591 else 590 592 props->state = IB_PORT_DOWN; ··· 3485 3483 for (i = 0; i < ib_wr->wr.fast_reg.page_list_len; i++) 3486 3484 dst_page_list[i] = cpu_to_le64(src_page_list[i]); 3487 3485 3488 - nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %p, " 3489 - "length: %d, rkey: %0x, pgl_paddr: %p, " 3486 + nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %llx, " 3487 + "length: %d, rkey: %0x, pgl_paddr: %llx, " 3490 3488 "page_list_len: %u, wqe_misc: %x\n", 3491 - (void *)ib_wr->wr.fast_reg.iova_start, 3489 + (unsigned long long) ib_wr->wr.fast_reg.iova_start, 3492 3490 ib_wr->wr.fast_reg.length, 3493 3491 ib_wr->wr.fast_reg.rkey, 3494 - (void *)pnesfrpl->nes_wqe_pbl.paddr, 3492 + (unsigned long long) pnesfrpl->nes_wqe_pbl.paddr, 3495 3493 ib_wr->wr.fast_reg.page_list_len, 3496 3494 wqe_misc); 3497 3495 break;
+1 -1
drivers/infiniband/hw/qib/qib.h
··· 1406 1406 */ 1407 1407 #define qib_early_err(dev, fmt, ...) \ 1408 1408 do { \ 1409 - dev_info(dev, KERN_ERR QIB_DRV_NAME ": " fmt, ##__VA_ARGS__); \ 1409 + dev_err(dev, fmt, ##__VA_ARGS__); \ 1410 1410 } while (0) 1411 1411 1412 1412 #define qib_dev_err(dd, fmt, ...) \
+1
drivers/infiniband/hw/qib/qib_init.c
··· 1243 1243 qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot " 1244 1244 "work if CONFIG_PCI_MSI is not enabled\n", 1245 1245 ent->device); 1246 + dd = ERR_PTR(-ENODEV); 1246 1247 #endif 1247 1248 break; 1248 1249
+6 -2
drivers/infiniband/hw/qib/qib_pcie.c
··· 103 103 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 104 104 } else 105 105 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 106 - if (ret) 106 + if (ret) { 107 107 qib_early_err(&pdev->dev, 108 108 "Unable to set DMA consistent mask: %d\n", ret); 109 + goto bail; 110 + } 109 111 110 112 pci_set_master(pdev); 111 113 ret = pci_enable_pcie_error_reporting(pdev); 112 - if (ret) 114 + if (ret) { 113 115 qib_early_err(&pdev->dev, 114 116 "Unable to enable pcie error reporting: %d\n", 115 117 ret); 118 + ret = 0; 119 + } 116 120 goto done; 117 121 118 122 bail:
+4 -1
drivers/infiniband/hw/qib/qib_rc.c
··· 2068 2068 goto nack_op_err; 2069 2069 if (!ret) 2070 2070 goto rnr_nak; 2071 - goto send_last_imm; 2071 + wc.ex.imm_data = ohdr->u.rc.imm_data; 2072 + hdrsize += 4; 2073 + wc.wc_flags = IB_WC_WITH_IMM; 2074 + goto send_last; 2072 2075 2073 2076 case OP(RDMA_READ_REQUEST): { 2074 2077 struct qib_ack_entry *e;
+4 -2
drivers/infiniband/hw/qib/qib_uc.c
··· 457 457 } 458 458 if (opcode == OP(RDMA_WRITE_ONLY)) 459 459 goto rdma_last; 460 - else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) 460 + else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) { 461 + wc.ex.imm_data = ohdr->u.rc.imm_data; 461 462 goto rdma_last_imm; 463 + } 462 464 /* FALLTHROUGH */ 463 465 case OP(RDMA_WRITE_MIDDLE): 464 466 /* Check for invalid length PMTU or posted rwqe len. */ ··· 473 471 break; 474 472 475 473 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): 476 - rdma_last_imm: 477 474 wc.ex.imm_data = ohdr->u.imm_data; 475 + rdma_last_imm: 478 476 hdrsize += 4; 479 477 wc.wc_flags = IB_WC_WITH_IMM; 480 478
+11 -3
drivers/infiniband/ulp/ipoib/ipoib_ib.c
··· 223 223 unsigned int wr_id = wc->wr_id & ~IPOIB_OP_RECV; 224 224 struct sk_buff *skb; 225 225 u64 mapping[IPOIB_UD_RX_SG]; 226 + union ib_gid *dgid; 226 227 227 228 ipoib_dbg_data(priv, "recv completion: id %d, status: %d\n", 228 229 wr_id, wc->status); ··· 272 271 ipoib_ud_dma_unmap_rx(priv, mapping); 273 272 ipoib_ud_skb_put_frags(priv, skb, wc->byte_len); 274 273 274 + /* First byte of dgid signals multicast when 0xff */ 275 + dgid = &((struct ib_grh *)skb->data)->dgid; 276 + 277 + if (!(wc->wc_flags & IB_WC_GRH) || dgid->raw[0] != 0xff) 278 + skb->pkt_type = PACKET_HOST; 279 + else if (memcmp(dgid, dev->broadcast + 4, sizeof(union ib_gid)) == 0) 280 + skb->pkt_type = PACKET_BROADCAST; 281 + else 282 + skb->pkt_type = PACKET_MULTICAST; 283 + 275 284 skb_pull(skb, IB_GRH_BYTES); 276 285 277 286 skb->protocol = ((struct ipoib_header *) skb->data)->proto; ··· 292 281 dev->stats.rx_bytes += skb->len; 293 282 294 283 skb->dev = dev; 295 - /* XXX get correct PACKET_ type here */ 296 - skb->pkt_type = PACKET_HOST; 297 - 298 284 if (test_bit(IPOIB_FLAG_CSUM, &priv->flags) && likely(wc->csum_ok)) 299 285 skb->ip_summed = CHECKSUM_UNNECESSARY; 300 286
+3
drivers/infiniband/ulp/ipoib/ipoib_main.c
··· 1240 1240 goto alloc_mem_failed; 1241 1241 1242 1242 SET_NETDEV_DEV(priv->dev, hca->dma_device); 1243 + priv->dev->dev_id = port - 1; 1243 1244 1244 1245 if (!ib_query_port(hca, port, &attr)) 1245 1246 priv->max_ib_mtu = ib_mtu_enum_to_int(attr.max_mtu); ··· 1363 1362 } 1364 1363 1365 1364 for (p = s; p <= e; ++p) { 1365 + if (rdma_port_get_link_layer(device, p) != IB_LINK_LAYER_INFINIBAND) 1366 + continue; 1366 1367 dev = ipoib_add_port("ib%d", device, p); 1367 1368 if (!IS_ERR(dev)) { 1368 1369 priv = netdev_priv(dev);
+168 -68
drivers/infiniband/ulp/srp/ib_srp.c
··· 291 291 292 292 for (i = 0; i < SRP_RQ_SIZE; ++i) 293 293 srp_free_iu(target->srp_host, target->rx_ring[i]); 294 - for (i = 0; i < SRP_SQ_SIZE + 1; ++i) 294 + for (i = 0; i < SRP_SQ_SIZE; ++i) 295 295 srp_free_iu(target->srp_host, target->tx_ring[i]); 296 296 } 297 297 ··· 811 811 return len; 812 812 } 813 813 814 + /* 815 + * Must be called with target->scsi_host->host_lock held to protect 816 + * req_lim and tx_head. Lock cannot be dropped between call here and 817 + * call to __srp_post_send(). 818 + * 819 + * Note: 820 + * An upper limit for the number of allocated information units for each 821 + * request type is: 822 + * - SRP_IU_CMD: SRP_CMD_SQ_SIZE, since the SCSI mid-layer never queues 823 + * more than Scsi_Host.can_queue requests. 824 + * - SRP_IU_TSK_MGMT: SRP_TSK_MGMT_SQ_SIZE. 825 + * - SRP_IU_RSP: 1, since a conforming SRP target never sends more than 826 + * one unanswered SRP request to an initiator. 827 + */ 828 + static struct srp_iu *__srp_get_tx_iu(struct srp_target_port *target, 829 + enum srp_iu_type iu_type) 830 + { 831 + s32 rsv = (iu_type == SRP_IU_TSK_MGMT) ? 0 : SRP_TSK_MGMT_SQ_SIZE; 832 + struct srp_iu *iu; 833 + 834 + srp_send_completion(target->send_cq, target); 835 + 836 + if (target->tx_head - target->tx_tail >= SRP_SQ_SIZE) 837 + return NULL; 838 + 839 + /* Initiator responses to target requests do not consume credits */ 840 + if (target->req_lim <= rsv && iu_type != SRP_IU_RSP) { 841 + ++target->zero_req_lim; 842 + return NULL; 843 + } 844 + 845 + iu = target->tx_ring[target->tx_head & SRP_SQ_MASK]; 846 + iu->type = iu_type; 847 + return iu; 848 + } 849 + 850 + /* 851 + * Must be called with target->scsi_host->host_lock held to protect 852 + * req_lim and tx_head. 853 + */ 854 + static int __srp_post_send(struct srp_target_port *target, 855 + struct srp_iu *iu, int len) 856 + { 857 + struct ib_sge list; 858 + struct ib_send_wr wr, *bad_wr; 859 + int ret = 0; 860 + 861 + list.addr = iu->dma; 862 + list.length = len; 863 + list.lkey = target->srp_host->srp_dev->mr->lkey; 864 + 865 + wr.next = NULL; 866 + wr.wr_id = target->tx_head & SRP_SQ_MASK; 867 + wr.sg_list = &list; 868 + wr.num_sge = 1; 869 + wr.opcode = IB_WR_SEND; 870 + wr.send_flags = IB_SEND_SIGNALED; 871 + 872 + ret = ib_post_send(target->qp, &wr, &bad_wr); 873 + 874 + if (!ret) { 875 + ++target->tx_head; 876 + if (iu->type != SRP_IU_RSP) 877 + --target->req_lim; 878 + } 879 + 880 + return ret; 881 + } 882 + 814 883 static int srp_post_recv(struct srp_target_port *target) 815 884 { 816 885 unsigned long flags; ··· 891 822 892 823 spin_lock_irqsave(target->scsi_host->host_lock, flags); 893 824 894 - next = target->rx_head & (SRP_RQ_SIZE - 1); 825 + next = target->rx_head & SRP_RQ_MASK; 895 826 wr.wr_id = next; 896 827 iu = target->rx_ring[next]; 897 828 ··· 965 896 spin_unlock_irqrestore(target->scsi_host->host_lock, flags); 966 897 } 967 898 899 + static int srp_response_common(struct srp_target_port *target, s32 req_delta, 900 + void *rsp, int len) 901 + { 902 + struct ib_device *dev; 903 + unsigned long flags; 904 + struct srp_iu *iu; 905 + int err = 1; 906 + 907 + dev = target->srp_host->srp_dev->dev; 908 + 909 + spin_lock_irqsave(target->scsi_host->host_lock, flags); 910 + target->req_lim += req_delta; 911 + 912 + iu = __srp_get_tx_iu(target, SRP_IU_RSP); 913 + if (!iu) { 914 + shost_printk(KERN_ERR, target->scsi_host, PFX 915 + "no IU available to send response\n"); 916 + goto out; 917 + } 918 + 919 + ib_dma_sync_single_for_cpu(dev, iu->dma, len, DMA_TO_DEVICE); 920 + memcpy(iu->buf, rsp, len); 921 + ib_dma_sync_single_for_device(dev, iu->dma, len, DMA_TO_DEVICE); 922 + 923 + err = __srp_post_send(target, iu, len); 924 + if (err) 925 + shost_printk(KERN_ERR, target->scsi_host, PFX 926 + "unable to post response: %d\n", err); 927 + 928 + out: 929 + spin_unlock_irqrestore(target->scsi_host->host_lock, flags); 930 + return err; 931 + } 932 + 933 + static void srp_process_cred_req(struct srp_target_port *target, 934 + struct srp_cred_req *req) 935 + { 936 + struct srp_cred_rsp rsp = { 937 + .opcode = SRP_CRED_RSP, 938 + .tag = req->tag, 939 + }; 940 + s32 delta = be32_to_cpu(req->req_lim_delta); 941 + 942 + if (srp_response_common(target, delta, &rsp, sizeof rsp)) 943 + shost_printk(KERN_ERR, target->scsi_host, PFX 944 + "problems processing SRP_CRED_REQ\n"); 945 + } 946 + 947 + static void srp_process_aer_req(struct srp_target_port *target, 948 + struct srp_aer_req *req) 949 + { 950 + struct srp_aer_rsp rsp = { 951 + .opcode = SRP_AER_RSP, 952 + .tag = req->tag, 953 + }; 954 + s32 delta = be32_to_cpu(req->req_lim_delta); 955 + 956 + shost_printk(KERN_ERR, target->scsi_host, PFX 957 + "ignoring AER for LUN %llu\n", be64_to_cpu(req->lun)); 958 + 959 + if (srp_response_common(target, delta, &rsp, sizeof rsp)) 960 + shost_printk(KERN_ERR, target->scsi_host, PFX 961 + "problems processing SRP_AER_REQ\n"); 962 + } 963 + 968 964 static void srp_handle_recv(struct srp_target_port *target, struct ib_wc *wc) 969 965 { 970 966 struct ib_device *dev; ··· 1055 921 switch (opcode) { 1056 922 case SRP_RSP: 1057 923 srp_process_rsp(target, iu->buf); 924 + break; 925 + 926 + case SRP_CRED_REQ: 927 + srp_process_cred_req(target, iu->buf); 928 + break; 929 + 930 + case SRP_AER_REQ: 931 + srp_process_aer_req(target, iu->buf); 1058 932 break; 1059 933 1060 934 case SRP_T_LOGOUT: ··· 1123 981 } 1124 982 } 1125 983 1126 - /* 1127 - * Must be called with target->scsi_host->host_lock held to protect 1128 - * req_lim and tx_head. Lock cannot be dropped between call here and 1129 - * call to __srp_post_send(). 1130 - */ 1131 - static struct srp_iu *__srp_get_tx_iu(struct srp_target_port *target, 1132 - enum srp_request_type req_type) 1133 - { 1134 - s32 min = (req_type == SRP_REQ_TASK_MGMT) ? 1 : 2; 1135 - 1136 - srp_send_completion(target->send_cq, target); 1137 - 1138 - if (target->tx_head - target->tx_tail >= SRP_SQ_SIZE) 1139 - return NULL; 1140 - 1141 - if (target->req_lim < min) { 1142 - ++target->zero_req_lim; 1143 - return NULL; 1144 - } 1145 - 1146 - return target->tx_ring[target->tx_head & SRP_SQ_SIZE]; 1147 - } 1148 - 1149 - /* 1150 - * Must be called with target->scsi_host->host_lock held to protect 1151 - * req_lim and tx_head. 1152 - */ 1153 - static int __srp_post_send(struct srp_target_port *target, 1154 - struct srp_iu *iu, int len) 1155 - { 1156 - struct ib_sge list; 1157 - struct ib_send_wr wr, *bad_wr; 1158 - int ret = 0; 1159 - 1160 - list.addr = iu->dma; 1161 - list.length = len; 1162 - list.lkey = target->srp_host->srp_dev->mr->lkey; 1163 - 1164 - wr.next = NULL; 1165 - wr.wr_id = target->tx_head & SRP_SQ_SIZE; 1166 - wr.sg_list = &list; 1167 - wr.num_sge = 1; 1168 - wr.opcode = IB_WR_SEND; 1169 - wr.send_flags = IB_SEND_SIGNALED; 1170 - 1171 - ret = ib_post_send(target->qp, &wr, &bad_wr); 1172 - 1173 - if (!ret) { 1174 - ++target->tx_head; 1175 - --target->req_lim; 1176 - } 1177 - 1178 - return ret; 1179 - } 1180 - 1181 984 static int srp_queuecommand(struct scsi_cmnd *scmnd, 1182 985 void (*done)(struct scsi_cmnd *)) 1183 986 { ··· 1143 1056 return 0; 1144 1057 } 1145 1058 1146 - iu = __srp_get_tx_iu(target, SRP_REQ_NORMAL); 1059 + iu = __srp_get_tx_iu(target, SRP_IU_CMD); 1147 1060 if (!iu) 1148 1061 goto err; 1149 1062 ··· 1151 1064 ib_dma_sync_single_for_cpu(dev, iu->dma, srp_max_iu_len, 1152 1065 DMA_TO_DEVICE); 1153 1066 1154 - req = list_entry(target->free_reqs.next, struct srp_request, list); 1067 + req = list_first_entry(&target->free_reqs, struct srp_request, list); 1155 1068 1156 1069 scmnd->scsi_done = done; 1157 1070 scmnd->result = 0; ··· 1208 1121 goto err; 1209 1122 } 1210 1123 1211 - for (i = 0; i < SRP_SQ_SIZE + 1; ++i) { 1124 + for (i = 0; i < SRP_SQ_SIZE; ++i) { 1212 1125 target->tx_ring[i] = srp_alloc_iu(target->srp_host, 1213 1126 srp_max_iu_len, 1214 1127 GFP_KERNEL, DMA_TO_DEVICE); ··· 1224 1137 target->rx_ring[i] = NULL; 1225 1138 } 1226 1139 1227 - for (i = 0; i < SRP_SQ_SIZE + 1; ++i) { 1140 + for (i = 0; i < SRP_SQ_SIZE; ++i) { 1228 1141 srp_free_iu(target->srp_host, target->tx_ring[i]); 1229 1142 target->tx_ring[i] = NULL; 1230 1143 } ··· 1339 1252 target->max_ti_iu_len = be32_to_cpu(rsp->max_ti_iu_len); 1340 1253 target->req_lim = be32_to_cpu(rsp->req_lim_delta); 1341 1254 1342 - target->scsi_host->can_queue = min(target->req_lim, 1343 - target->scsi_host->can_queue); 1255 + /* 1256 + * Reserve credits for task management so we don't 1257 + * bounce requests back to the SCSI mid-layer. 1258 + */ 1259 + target->scsi_host->can_queue 1260 + = min(target->req_lim - SRP_TSK_MGMT_SQ_SIZE, 1261 + target->scsi_host->can_queue); 1344 1262 } else { 1345 1263 shost_printk(KERN_WARNING, target->scsi_host, 1346 1264 PFX "Unhandled RSP opcode %#x\n", opcode); ··· 1442 1350 static int srp_send_tsk_mgmt(struct srp_target_port *target, 1443 1351 struct srp_request *req, u8 func) 1444 1352 { 1353 + struct ib_device *dev = target->srp_host->srp_dev->dev; 1445 1354 struct srp_iu *iu; 1446 1355 struct srp_tsk_mgmt *tsk_mgmt; 1447 1356 ··· 1456 1363 1457 1364 init_completion(&req->done); 1458 1365 1459 - iu = __srp_get_tx_iu(target, SRP_REQ_TASK_MGMT); 1366 + iu = __srp_get_tx_iu(target, SRP_IU_TSK_MGMT); 1460 1367 if (!iu) 1461 1368 goto out; 1462 1369 1370 + ib_dma_sync_single_for_cpu(dev, iu->dma, sizeof *tsk_mgmt, 1371 + DMA_TO_DEVICE); 1463 1372 tsk_mgmt = iu->buf; 1464 1373 memset(tsk_mgmt, 0, sizeof *tsk_mgmt); 1465 1374 ··· 1471 1376 tsk_mgmt->tsk_mgmt_func = func; 1472 1377 tsk_mgmt->task_tag = req->index; 1473 1378 1379 + ib_dma_sync_single_for_device(dev, iu->dma, sizeof *tsk_mgmt, 1380 + DMA_TO_DEVICE); 1474 1381 if (__srp_post_send(target, iu, sizeof *tsk_mgmt)) 1475 1382 goto out; 1476 1383 ··· 1723 1626 .eh_abort_handler = srp_abort, 1724 1627 .eh_device_reset_handler = srp_reset_device, 1725 1628 .eh_host_reset_handler = srp_reset_host, 1726 - .can_queue = SRP_SQ_SIZE, 1629 + .can_queue = SRP_CMD_SQ_SIZE, 1727 1630 .this_id = -1, 1728 - .cmd_per_lun = SRP_SQ_SIZE, 1631 + .cmd_per_lun = SRP_CMD_SQ_SIZE, 1729 1632 .use_clustering = ENABLE_CLUSTERING, 1730 1633 .shost_attrs = srp_host_attrs 1731 1634 }; ··· 1910 1813 printk(KERN_WARNING PFX "bad max cmd_per_lun parameter '%s'\n", p); 1911 1814 goto out; 1912 1815 } 1913 - target->scsi_host->cmd_per_lun = min(token, SRP_SQ_SIZE); 1816 + target->scsi_host->cmd_per_lun = min(token, SRP_CMD_SQ_SIZE); 1914 1817 break; 1915 1818 1916 1819 case SRP_OPT_IO_CLASS: ··· 1988 1891 1989 1892 INIT_LIST_HEAD(&target->free_reqs); 1990 1893 INIT_LIST_HEAD(&target->req_queue); 1991 - for (i = 0; i < SRP_SQ_SIZE; ++i) { 1894 + for (i = 0; i < SRP_CMD_SQ_SIZE; ++i) { 1992 1895 target->req_ring[i].index = i; 1993 1896 list_add_tail(&target->req_ring[i].list, &target->free_reqs); 1994 1897 } ··· 2255 2158 static int __init srp_init_module(void) 2256 2159 { 2257 2160 int ret; 2161 + 2162 + BUILD_BUG_ON_NOT_POWER_OF_2(SRP_SQ_SIZE); 2163 + BUILD_BUG_ON_NOT_POWER_OF_2(SRP_RQ_SIZE); 2258 2164 2259 2165 if (srp_sg_tablesize > 255) { 2260 2166 printk(KERN_WARNING PFX "Clamping srp_sg_tablesize to 255\n");
+15 -6
drivers/infiniband/ulp/srp/ib_srp.h
··· 59 59 60 60 SRP_RQ_SHIFT = 6, 61 61 SRP_RQ_SIZE = 1 << SRP_RQ_SHIFT, 62 - SRP_SQ_SIZE = SRP_RQ_SIZE - 1, 62 + SRP_RQ_MASK = SRP_RQ_SIZE - 1, 63 + 64 + SRP_SQ_SIZE = SRP_RQ_SIZE, 65 + SRP_SQ_MASK = SRP_SQ_SIZE - 1, 66 + SRP_RSP_SQ_SIZE = 1, 67 + SRP_REQ_SQ_SIZE = SRP_SQ_SIZE - SRP_RSP_SQ_SIZE, 68 + SRP_TSK_MGMT_SQ_SIZE = 1, 69 + SRP_CMD_SQ_SIZE = SRP_REQ_SQ_SIZE - SRP_TSK_MGMT_SQ_SIZE, 63 70 64 71 SRP_TAG_TSK_MGMT = 1 << (SRP_RQ_SHIFT + 1), 65 72 ··· 82 75 SRP_TARGET_REMOVED 83 76 }; 84 77 85 - enum srp_request_type { 86 - SRP_REQ_NORMAL, 87 - SRP_REQ_TASK_MGMT, 78 + enum srp_iu_type { 79 + SRP_IU_CMD, 80 + SRP_IU_TSK_MGMT, 81 + SRP_IU_RSP, 88 82 }; 89 83 90 84 struct srp_device { ··· 152 144 153 145 unsigned tx_head; 154 146 unsigned tx_tail; 155 - struct srp_iu *tx_ring[SRP_SQ_SIZE + 1]; 147 + struct srp_iu *tx_ring[SRP_SQ_SIZE]; 156 148 157 149 struct list_head free_reqs; 158 150 struct list_head req_queue; 159 - struct srp_request req_ring[SRP_SQ_SIZE]; 151 + struct srp_request req_ring[SRP_CMD_SQ_SIZE]; 160 152 161 153 struct work_struct work; 162 154 ··· 172 164 void *buf; 173 165 size_t size; 174 166 enum dma_data_direction direction; 167 + enum srp_iu_type type; 175 168 }; 176 169 177 170 #endif /* IB_SRP_H */
+12 -3
drivers/net/mlx4/en_main.c
··· 124 124 return 0; 125 125 } 126 126 127 + static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port) 128 + { 129 + struct mlx4_en_dev *endev = ctx; 130 + 131 + return endev->pndev[port]; 132 + } 133 + 127 134 static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, 128 135 enum mlx4_dev_event event, int port) 129 136 { ··· 289 282 } 290 283 291 284 static struct mlx4_interface mlx4_en_interface = { 292 - .add = mlx4_en_add, 293 - .remove = mlx4_en_remove, 294 - .event = mlx4_en_event, 285 + .add = mlx4_en_add, 286 + .remove = mlx4_en_remove, 287 + .event = mlx4_en_event, 288 + .get_dev = mlx4_en_get_netdev, 289 + .protocol = MLX4_PROTOCOL_EN, 295 290 }; 296 291 297 292 static int __init mlx4_en_init(void)
+10
drivers/net/mlx4/en_netdev.c
··· 69 69 struct mlx4_en_priv *priv = netdev_priv(dev); 70 70 struct mlx4_en_dev *mdev = priv->mdev; 71 71 int err; 72 + int idx; 72 73 73 74 if (!priv->vlgrp) 74 75 return; ··· 84 83 if (err) 85 84 en_err(priv, "Failed configuring VLAN filter\n"); 86 85 } 86 + if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) 87 + en_err(priv, "failed adding vlan %d\n", vid); 87 88 mutex_unlock(&mdev->state_lock); 89 + 88 90 } 89 91 90 92 static void mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) ··· 95 91 struct mlx4_en_priv *priv = netdev_priv(dev); 96 92 struct mlx4_en_dev *mdev = priv->mdev; 97 93 int err; 94 + int idx; 98 95 99 96 if (!priv->vlgrp) 100 97 return; ··· 106 101 107 102 /* Remove VID from port VLAN filter */ 108 103 mutex_lock(&mdev->state_lock); 104 + if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx)) 105 + mlx4_unregister_vlan(mdev->dev, priv->port, idx); 106 + else 107 + en_err(priv, "could not find vid %d in cache\n", vid); 108 + 109 109 if (mdev->device_up && priv->port_up) { 110 110 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp); 111 111 if (err)
+2 -2
drivers/net/mlx4/en_port.c
··· 127 127 memset(context, 0, sizeof *context); 128 128 129 129 context->base_qpn = cpu_to_be32(base_qpn); 130 - context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | base_qpn); 131 - context->mcast = cpu_to_be32(1 << SET_PORT_PROMISC_SHIFT | base_qpn); 130 + context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_EN_SHIFT | base_qpn); 131 + context->mcast = cpu_to_be32(1 << SET_PORT_PROMISC_MODE_SHIFT | base_qpn); 132 132 context->intra_no_vlan = 0; 133 133 context->no_vlan = MLX4_NO_VLAN_IDX; 134 134 context->intra_vlan_miss = 0;
+2 -1
drivers/net/mlx4/en_port.h
··· 36 36 37 37 38 38 #define SET_PORT_GEN_ALL_VALID 0x7 39 - #define SET_PORT_PROMISC_SHIFT 31 39 + #define SET_PORT_PROMISC_EN_SHIFT 31 40 + #define SET_PORT_PROMISC_MODE_SHIFT 30 40 41 41 42 enum { 42 43 MLX4_CMD_SET_VLAN_FLTR = 0x47,
+2 -1
drivers/net/mlx4/fw.c
··· 98 98 [20] = "Address vector port checking support", 99 99 [21] = "UD multicast support", 100 100 [24] = "Demand paging support", 101 - [25] = "Router support" 101 + [25] = "Router support", 102 + [30] = "IBoE support" 102 103 }; 103 104 int i; 104 105
+21
drivers/net/mlx4/intf.c
··· 161 161 162 162 mutex_unlock(&intf_mutex); 163 163 } 164 + 165 + void *mlx4_get_protocol_dev(struct mlx4_dev *dev, enum mlx4_protocol proto, int port) 166 + { 167 + struct mlx4_priv *priv = mlx4_priv(dev); 168 + struct mlx4_device_context *dev_ctx; 169 + unsigned long flags; 170 + void *result = NULL; 171 + 172 + spin_lock_irqsave(&priv->ctx_lock, flags); 173 + 174 + list_for_each_entry(dev_ctx, &priv->ctx_list, list) 175 + if (dev_ctx->intf->protocol == proto && dev_ctx->intf->get_dev) { 176 + result = dev_ctx->intf->get_dev(dev, dev_ctx->context, port); 177 + break; 178 + } 179 + 180 + spin_unlock_irqrestore(&priv->ctx_lock, flags); 181 + 182 + return result; 183 + } 184 + EXPORT_SYMBOL_GPL(mlx4_get_protocol_dev);
+2 -2
drivers/net/mlx4/main.c
··· 103 103 104 104 static int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG); 105 105 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); 106 - MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-5)"); 106 + MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)"); 107 107 108 108 int mlx4_check_port_params(struct mlx4_dev *dev, 109 109 enum mlx4_port_type *port_type) ··· 1310 1310 return -1; 1311 1311 } 1312 1312 1313 - if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 5)) { 1313 + if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) { 1314 1314 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); 1315 1315 return -1; 1316 1316 }
+1
drivers/net/mlx4/mlx4_en.h
··· 475 475 char *mc_addrs; 476 476 int mc_addrs_cnt; 477 477 struct mlx4_en_stat_out_mbox hw_stats; 478 + int vids[128]; 478 479 }; 479 480 480 481
+19
drivers/net/mlx4/port.c
··· 182 182 return err; 183 183 } 184 184 185 + int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx) 186 + { 187 + struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; 188 + int i; 189 + 190 + for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) { 191 + if (table->refs[i] && 192 + (vid == (MLX4_VLAN_MASK & 193 + be32_to_cpu(table->entries[i])))) { 194 + /* VLAN already registered, increase reference count */ 195 + *idx = i; 196 + return 0; 197 + } 198 + } 199 + 200 + return -ENOENT; 201 + } 202 + EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan); 203 + 185 204 int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index) 186 205 { 187 206 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
+2
include/linux/mlx4/cmd.h
··· 58 58 MLX4_CMD_SENSE_PORT = 0x4d, 59 59 MLX4_CMD_HW_HEALTH_CHECK = 0x50, 60 60 MLX4_CMD_SET_PORT = 0xc, 61 + MLX4_CMD_SET_NODE = 0x5a, 61 62 MLX4_CMD_ACCESS_DDR = 0x2e, 62 63 MLX4_CMD_MAP_ICM = 0xffa, 63 64 MLX4_CMD_UNMAP_ICM = 0xff9, ··· 142 141 MLX4_SET_PORT_MAC_TABLE = 0x2, 143 142 MLX4_SET_PORT_VLAN_TABLE = 0x3, 144 143 MLX4_SET_PORT_PRIO_MAP = 0x4, 144 + MLX4_SET_PORT_GID_TABLE = 0x5, 145 145 }; 146 146 147 147 struct mlx4_dev;
+34 -1
include/linux/mlx4/device.h
··· 67 67 MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18, 68 68 MLX4_DEV_CAP_FLAG_RAW_MCAST = 1 << 19, 69 69 MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1 << 20, 70 - MLX4_DEV_CAP_FLAG_UD_MCAST = 1 << 21 70 + MLX4_DEV_CAP_FLAG_UD_MCAST = 1 << 21, 71 + MLX4_DEV_CAP_FLAG_IBOE = 1 << 30 71 72 }; 72 73 73 74 enum { ··· 170 169 171 170 enum { 172 171 MLX4_NUM_FEXCH = 64 * 1024, 172 + }; 173 + 174 + enum { 175 + MLX4_MAX_FAST_REG_PAGES = 511, 173 176 }; 174 177 175 178 static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) ··· 384 379 u8 dgid[16]; 385 380 }; 386 381 382 + struct mlx4_eth_av { 383 + __be32 port_pd; 384 + u8 reserved1; 385 + u8 smac_idx; 386 + u16 reserved2; 387 + u8 reserved3; 388 + u8 gid_index; 389 + u8 stat_rate; 390 + u8 hop_limit; 391 + __be32 sl_tclass_flowlabel; 392 + u8 dgid[16]; 393 + u32 reserved4[2]; 394 + __be16 vlan; 395 + u8 mac[6]; 396 + }; 397 + 398 + union mlx4_ext_av { 399 + struct mlx4_av ib; 400 + struct mlx4_eth_av eth; 401 + }; 402 + 387 403 struct mlx4_dev { 388 404 struct pci_dev *pdev; 389 405 unsigned long flags; ··· 432 406 for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ 433 407 if (((type) == MLX4_PORT_TYPE_IB ? (dev)->caps.port_mask : \ 434 408 ~(dev)->caps.port_mask) & 1 << ((port) - 1)) 409 + 410 + #define mlx4_foreach_ib_transport_port(port, dev) \ 411 + for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ 412 + if (((dev)->caps.port_mask & 1 << ((port) - 1)) || \ 413 + ((dev)->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) 414 + 435 415 436 416 int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, 437 417 struct mlx4_buf *buf); ··· 506 474 int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *index); 507 475 void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, int index); 508 476 477 + int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx); 509 478 int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); 510 479 void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index); 511 480
+9
include/linux/mlx4/driver.h
··· 44 44 MLX4_DEV_EVENT_PORT_REINIT, 45 45 }; 46 46 47 + enum mlx4_protocol { 48 + MLX4_PROTOCOL_IB, 49 + MLX4_PROTOCOL_EN, 50 + }; 51 + 47 52 struct mlx4_interface { 48 53 void * (*add) (struct mlx4_dev *dev); 49 54 void (*remove)(struct mlx4_dev *dev, void *context); 50 55 void (*event) (struct mlx4_dev *dev, void *context, 51 56 enum mlx4_dev_event event, int port); 57 + void * (*get_dev)(struct mlx4_dev *dev, void *context, u8 port); 52 58 struct list_head list; 59 + enum mlx4_protocol protocol; 53 60 }; 54 61 55 62 int mlx4_register_interface(struct mlx4_interface *intf); 56 63 void mlx4_unregister_interface(struct mlx4_interface *intf); 64 + 65 + void *mlx4_get_protocol_dev(struct mlx4_dev *dev, enum mlx4_protocol proto, int port); 57 66 58 67 #endif /* MLX4_DRIVER_H */
+6 -3
include/linux/mlx4/qp.h
··· 109 109 __be32 tclass_flowlabel; 110 110 u8 rgid[16]; 111 111 u8 sched_queue; 112 - u8 snooper_flags; 112 + u8 vlan_index; 113 113 u8 reserved3[2]; 114 114 u8 counter_index; 115 - u8 reserved4[7]; 115 + u8 reserved4; 116 + u8 dmac[6]; 116 117 }; 117 118 118 119 struct mlx4_qp_context { ··· 167 166 MLX4_WQE_CTRL_TCP_UDP_CSUM = 1 << 5, 168 167 MLX4_WQE_CTRL_INS_VLAN = 1 << 6, 169 168 MLX4_WQE_CTRL_STRONG_ORDER = 1 << 7, 169 + MLX4_WQE_CTRL_FORCE_LOOPBACK = 1 << 0, 170 170 }; 171 171 172 172 struct mlx4_wqe_ctrl_seg { ··· 221 219 __be32 av[8]; 222 220 __be32 dqpn; 223 221 __be32 qkey; 224 - __be32 reservd[2]; 222 + __be16 vlan; 223 + u8 mac[6]; 225 224 }; 226 225 227 226 struct mlx4_wqe_lso_seg {
+133 -1
include/rdma/ib_addr.h
··· 39 39 #include <linux/if_arp.h> 40 40 #include <linux/netdevice.h> 41 41 #include <linux/socket.h> 42 + #include <linux/if_vlan.h> 42 43 #include <rdma/ib_verbs.h> 44 + #include <rdma/ib_pack.h> 43 45 44 46 struct rdma_addr_client { 45 47 atomic_t refcount; ··· 65 63 unsigned char broadcast[MAX_ADDR_LEN]; 66 64 unsigned short dev_type; 67 65 int bound_dev_if; 66 + enum rdma_transport_type transport; 68 67 }; 69 68 70 69 /** ··· 130 127 return dev_addr->dev_type == ARPHRD_INFINIBAND ? 4 : 0; 131 128 } 132 129 130 + static inline void iboe_mac_vlan_to_ll(union ib_gid *gid, u8 *mac, u16 vid) 131 + { 132 + memset(gid->raw, 0, 16); 133 + *((__be32 *) gid->raw) = cpu_to_be32(0xfe800000); 134 + if (vid < 0x1000) { 135 + gid->raw[12] = vid & 0xff; 136 + gid->raw[11] = vid >> 8; 137 + } else { 138 + gid->raw[12] = 0xfe; 139 + gid->raw[11] = 0xff; 140 + } 141 + memcpy(gid->raw + 13, mac + 3, 3); 142 + memcpy(gid->raw + 8, mac, 3); 143 + gid->raw[8] ^= 2; 144 + } 145 + 146 + static inline u16 rdma_vlan_dev_vlan_id(const struct net_device *dev) 147 + { 148 + return dev->priv_flags & IFF_802_1Q_VLAN ? 149 + vlan_dev_vlan_id(dev) : 0xffff; 150 + } 151 + 152 + static inline void iboe_addr_get_sgid(struct rdma_dev_addr *dev_addr, 153 + union ib_gid *gid) 154 + { 155 + struct net_device *dev; 156 + u16 vid = 0xffff; 157 + 158 + dev = dev_get_by_index(&init_net, dev_addr->bound_dev_if); 159 + if (dev) { 160 + vid = rdma_vlan_dev_vlan_id(dev); 161 + dev_put(dev); 162 + } 163 + 164 + iboe_mac_vlan_to_ll(gid, dev_addr->src_dev_addr, vid); 165 + } 166 + 133 167 static inline void rdma_addr_get_sgid(struct rdma_dev_addr *dev_addr, union ib_gid *gid) 134 168 { 135 - memcpy(gid, dev_addr->src_dev_addr + rdma_addr_gid_offset(dev_addr), sizeof *gid); 169 + if (dev_addr->transport == RDMA_TRANSPORT_IB && 170 + dev_addr->dev_type != ARPHRD_INFINIBAND) 171 + iboe_addr_get_sgid(dev_addr, gid); 172 + else 173 + memcpy(gid, dev_addr->src_dev_addr + 174 + rdma_addr_gid_offset(dev_addr), sizeof *gid); 136 175 } 137 176 138 177 static inline void rdma_addr_set_sgid(struct rdma_dev_addr *dev_addr, union ib_gid *gid) ··· 190 145 static inline void rdma_addr_set_dgid(struct rdma_dev_addr *dev_addr, union ib_gid *gid) 191 146 { 192 147 memcpy(dev_addr->dst_dev_addr + rdma_addr_gid_offset(dev_addr), gid, sizeof *gid); 148 + } 149 + 150 + static inline enum ib_mtu iboe_get_mtu(int mtu) 151 + { 152 + /* 153 + * reduce IB headers from effective IBoE MTU. 28 stands for 154 + * atomic header which is the biggest possible header after BTH 155 + */ 156 + mtu = mtu - IB_GRH_BYTES - IB_BTH_BYTES - 28; 157 + 158 + if (mtu >= ib_mtu_enum_to_int(IB_MTU_4096)) 159 + return IB_MTU_4096; 160 + else if (mtu >= ib_mtu_enum_to_int(IB_MTU_2048)) 161 + return IB_MTU_2048; 162 + else if (mtu >= ib_mtu_enum_to_int(IB_MTU_1024)) 163 + return IB_MTU_1024; 164 + else if (mtu >= ib_mtu_enum_to_int(IB_MTU_512)) 165 + return IB_MTU_512; 166 + else if (mtu >= ib_mtu_enum_to_int(IB_MTU_256)) 167 + return IB_MTU_256; 168 + else 169 + return 0; 170 + } 171 + 172 + static inline int iboe_get_rate(struct net_device *dev) 173 + { 174 + struct ethtool_cmd cmd; 175 + 176 + if (!dev->ethtool_ops || !dev->ethtool_ops->get_settings || 177 + dev->ethtool_ops->get_settings(dev, &cmd)) 178 + return IB_RATE_PORT_CURRENT; 179 + 180 + if (cmd.speed >= 40000) 181 + return IB_RATE_40_GBPS; 182 + else if (cmd.speed >= 30000) 183 + return IB_RATE_30_GBPS; 184 + else if (cmd.speed >= 20000) 185 + return IB_RATE_20_GBPS; 186 + else if (cmd.speed >= 10000) 187 + return IB_RATE_10_GBPS; 188 + else 189 + return IB_RATE_PORT_CURRENT; 190 + } 191 + 192 + static inline int rdma_link_local_addr(struct in6_addr *addr) 193 + { 194 + if (addr->s6_addr32[0] == htonl(0xfe800000) && 195 + addr->s6_addr32[1] == 0) 196 + return 1; 197 + 198 + return 0; 199 + } 200 + 201 + static inline void rdma_get_ll_mac(struct in6_addr *addr, u8 *mac) 202 + { 203 + memcpy(mac, &addr->s6_addr[8], 3); 204 + memcpy(mac + 3, &addr->s6_addr[13], 3); 205 + mac[0] ^= 2; 206 + } 207 + 208 + static inline int rdma_is_multicast_addr(struct in6_addr *addr) 209 + { 210 + return addr->s6_addr[0] == 0xff; 211 + } 212 + 213 + static inline void rdma_get_mcast_mac(struct in6_addr *addr, u8 *mac) 214 + { 215 + int i; 216 + 217 + mac[0] = 0x33; 218 + mac[1] = 0x33; 219 + for (i = 2; i < 6; ++i) 220 + mac[i] = addr->s6_addr[i + 10]; 221 + } 222 + 223 + static inline u16 rdma_get_vlan_id(union ib_gid *dgid) 224 + { 225 + u16 vid; 226 + 227 + vid = dgid->raw[11] << 8 | dgid->raw[12]; 228 + return vid < 0x1000 ? vid : 0xffff; 229 + } 230 + 231 + static inline struct net_device *rdma_vlan_dev_real_dev(const struct net_device *dev) 232 + { 233 + return dev->priv_flags & IFF_802_1Q_VLAN ? 234 + vlan_dev_real_dev(dev) : 0; 193 235 } 194 236 195 237 #endif /* IB_ADDR_H */
+31 -8
include/rdma/ib_pack.h
··· 37 37 38 38 enum { 39 39 IB_LRH_BYTES = 8, 40 + IB_ETH_BYTES = 14, 41 + IB_VLAN_BYTES = 4, 40 42 IB_GRH_BYTES = 40, 41 43 IB_BTH_BYTES = 12, 42 44 IB_DETH_BYTES = 8 ··· 212 210 __be32 source_qpn; 213 211 }; 214 212 213 + struct ib_unpacked_eth { 214 + u8 dmac_h[4]; 215 + u8 dmac_l[2]; 216 + u8 smac_h[2]; 217 + u8 smac_l[4]; 218 + __be16 type; 219 + }; 220 + 221 + struct ib_unpacked_vlan { 222 + __be16 tag; 223 + __be16 type; 224 + }; 225 + 215 226 struct ib_ud_header { 227 + int lrh_present; 216 228 struct ib_unpacked_lrh lrh; 217 - int grh_present; 218 - struct ib_unpacked_grh grh; 219 - struct ib_unpacked_bth bth; 229 + int eth_present; 230 + struct ib_unpacked_eth eth; 231 + int vlan_present; 232 + struct ib_unpacked_vlan vlan; 233 + int grh_present; 234 + struct ib_unpacked_grh grh; 235 + struct ib_unpacked_bth bth; 220 236 struct ib_unpacked_deth deth; 221 - int immediate_present; 222 - __be32 immediate_data; 237 + int immediate_present; 238 + __be32 immediate_data; 223 239 }; 224 240 225 241 void ib_pack(const struct ib_field *desc, ··· 250 230 void *buf, 251 231 void *structure); 252 232 253 - void ib_ud_header_init(int payload_bytes, 254 - int grh_present, 255 - int immediate_present, 233 + void ib_ud_header_init(int payload_bytes, 234 + int lrh_present, 235 + int eth_present, 236 + int vlan_present, 237 + int grh_present, 238 + int immediate_present, 256 239 struct ib_ud_header *header); 257 240 258 241 int ib_ud_header_pack(struct ib_ud_header *header,
+2 -1
include/rdma/ib_user_verbs.h
··· 205 205 __u8 active_width; 206 206 __u8 active_speed; 207 207 __u8 phys_state; 208 - __u8 reserved[3]; 208 + __u8 link_layer; 209 + __u8 reserved[2]; 209 210 }; 210 211 211 212 struct ib_uverbs_alloc_pd {
+11
include/rdma/ib_verbs.h
··· 75 75 enum rdma_transport_type 76 76 rdma_node_get_transport(enum rdma_node_type node_type) __attribute_const__; 77 77 78 + enum rdma_link_layer { 79 + IB_LINK_LAYER_UNSPECIFIED, 80 + IB_LINK_LAYER_INFINIBAND, 81 + IB_LINK_LAYER_ETHERNET, 82 + }; 83 + 78 84 enum ib_device_cap_flags { 79 85 IB_DEVICE_RESIZE_MAX_WR = 1, 80 86 IB_DEVICE_BAD_PKEY_CNTR = (1<<1), ··· 1016 1010 int (*query_port)(struct ib_device *device, 1017 1011 u8 port_num, 1018 1012 struct ib_port_attr *port_attr); 1013 + enum rdma_link_layer (*get_link_layer)(struct ib_device *device, 1014 + u8 port_num); 1019 1015 int (*query_gid)(struct ib_device *device, 1020 1016 u8 port_num, int index, 1021 1017 union ib_gid *gid); ··· 1229 1221 1230 1222 int ib_query_port(struct ib_device *device, 1231 1223 u8 port_num, struct ib_port_attr *port_attr); 1224 + 1225 + enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, 1226 + u8 port_num); 1232 1227 1233 1228 int ib_query_gid(struct ib_device *device, 1234 1229 u8 port_num, int index, union ib_gid *gid);
+38
include/scsi/srp.h
··· 239 239 u8 data[0]; 240 240 } __attribute__((packed)); 241 241 242 + struct srp_cred_req { 243 + u8 opcode; 244 + u8 sol_not; 245 + u8 reserved[2]; 246 + __be32 req_lim_delta; 247 + u64 tag; 248 + }; 249 + 250 + struct srp_cred_rsp { 251 + u8 opcode; 252 + u8 reserved[7]; 253 + u64 tag; 254 + }; 255 + 256 + /* 257 + * The SRP spec defines the fixed portion of the AER_REQ structure to be 258 + * 36 bytes, so it needs to be packed to avoid having it padded to 40 bytes 259 + * on 64-bit architectures. 260 + */ 261 + struct srp_aer_req { 262 + u8 opcode; 263 + u8 sol_not; 264 + u8 reserved[2]; 265 + __be32 req_lim_delta; 266 + u64 tag; 267 + u32 reserved2; 268 + __be64 lun; 269 + __be32 sense_data_len; 270 + u32 reserved3; 271 + u8 sense_data[0]; 272 + } __attribute__((packed)); 273 + 274 + struct srp_aer_rsp { 275 + u8 opcode; 276 + u8 reserved[7]; 277 + u64 tag; 278 + }; 279 + 242 280 #endif /* SCSI_SRP_H */