···4747 * for GPU/CPU synchronization. When the fence is written,4848 * it is expected that all buffers associated with that fence4949 * are no longer in use by the associated ring on the GPU and5050- * that the the relevant GPU caches have been flushed.5050+ * that the relevant GPU caches have been flushed.5151 */52525353struct amdgpu_fence {
+2-2
drivers/gpu/drm/amd/include/atombios.h
···32553255ucMinNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all.325632563257325732583258-usInterNBVoltageLow: Voltage regulator dependent PWM value. The value makes the the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.32593259-usInterNBVoltageHigh: Voltage regulator dependent PWM value. The value makes the the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.32583258+usInterNBVoltageLow: Voltage regulator dependent PWM value. The value makes the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.32593259+usInterNBVoltageHigh: Voltage regulator dependent PWM value. The value makes the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.32603260*/3261326132623262