Disable LVDS mode according to register documentation. It seems like this has no effect on the operation of HDMI, but it's probably a good idea to do this anyway.
···846846 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_SEQ_INST(0));847847 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_SEQ_INST(8));848848849849- value = 0x1c800;849849+ value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_CSTM);850850 value &= ~SOR_CSTM_ROTCLK(~0);851851 value |= SOR_CSTM_ROTCLK(2);852852+ value |= SOR_CSTM_PLLDIV;853853+ value &= ~SOR_CSTM_LVDS_ENABLE;854854+ value &= ~SOR_CSTM_MODE_MASK;855855+ value |= SOR_CSTM_MODE_TMDS;852856 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_CSTM);853857854858 /* start SOR */