Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next

Marc Kleine-Budde says:

====================
this is a pull request of 29 patches for net-next/master.

The first patch is by Daniel S. Trevitz and adds documentation for
switchable termination resistors.

Zhang Changzhong's patch fixes a debug output in the j13939 stack.

Oliver Hartkopp finally removes the pch_can driver, which is
superseded by the generic c_can driver.

Gustavo A. R. Silva replaces a zero-length array with
DECLARE_FLEX_ARRAY() in the ucan driver.

Kees Cook's patch removes a no longer needed silencing of
"-Warray-bounds" warnings for the kvaser_usb driver.

The next 2 patches target the m_can driver. The first is by me cleans
up the LEC error handling, the second is by Vivek Yadav and extends
the LEC error handling to the data phase of CAN-FD frames.

The next 9 patches all target the gs_usb driver. The first 5 patches
are by me and improve the Kconfig prompt and help text, set
netdev->dev_id to distinguish multi CAN channel devices, allow
loopback and listen only at the same time, and clean up the
gs_can_open() function a bit. The remaining 4 patches are by Jeroen
Hofstee and add support for 2 new features: Bus Error Reporting and
Get State.

Jimmy Assarsson and Anssi Hannula contribute 10 patches for the
kvaser_usb driver. They first add Listen Only and Bus Error Reporting
support, handle CMD_ERROR_EVENT errors, improve CAN state handling,
restart events, and configuration of the bit timing parameters.

Another patch by me which fixes the indention in the m_can driver.

A patch by Dongliang Mu cleans up the ucan_disconnect() function in
the ucan driver.

The last patch by Biju Das is for the rcan_canfd driver and cleans up
the reset handling.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+815 -1393
+33
Documentation/networking/can.rst
··· 1148 1148 load without any problems ... 1149 1149 1150 1150 1151 + Switchable Termination Resistors 1152 + -------------------------------- 1153 + 1154 + CAN bus requires a specific impedance across the differential pair, 1155 + typically provided by two 120Ohm resistors on the farthest nodes of 1156 + the bus. Some CAN controllers support activating / deactivating a 1157 + termination resistor(s) to provide the correct impedance. 1158 + 1159 + Query the available resistances:: 1160 + 1161 + $ ip -details link show can0 1162 + ... 1163 + termination 120 [ 0, 120 ] 1164 + 1165 + Activate the terminating resistor:: 1166 + 1167 + $ ip link set dev can0 type can termination 120 1168 + 1169 + Deactivate the terminating resistor:: 1170 + 1171 + $ ip link set dev can0 type can termination 0 1172 + 1173 + To enable termination resistor support to a can-controller, either 1174 + implement in the controller's struct can-priv:: 1175 + 1176 + termination_const 1177 + termination_const_cnt 1178 + do_set_termination 1179 + 1180 + or add gpio control with the device tree entries from 1181 + Documentation/devicetree/bindings/net/can/can-controller.yaml 1182 + 1183 + 1151 1184 The Virtual CAN Driver (vcan) 1152 1185 ----------------------------- 1153 1186
-8
drivers/net/can/Kconfig
··· 198 198 Xilinx CAN driver. This driver supports both soft AXI CAN IP and 199 199 Zynq CANPS IP. 200 200 201 - config PCH_CAN 202 - tristate "Intel EG20T PCH CAN controller" 203 - depends on PCI && (X86_32 || COMPILE_TEST) 204 - help 205 - This driver is for PCH CAN of Topcliff (Intel EG20T PCH) which 206 - is an IOH for x86 embedded processor (Intel Atom E6xx series). 207 - This driver can access CAN bus. 208 - 209 201 source "drivers/net/can/c_can/Kconfig" 210 202 source "drivers/net/can/cc770/Kconfig" 211 203 source "drivers/net/can/ctucanfd/Kconfig"
-1
drivers/net/can/Makefile
··· 30 30 obj-$(CONFIG_CAN_SUN4I) += sun4i_can.o 31 31 obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o 32 32 obj-$(CONFIG_CAN_XILINXCAN) += xilinx_can.o 33 - obj-$(CONFIG_PCH_CAN) += pch_can.o 34 33 35 34 subdir-ccflags-$(CONFIG_CAN_DEBUG_DEVICES) += -DDEBUG
+2 -1
drivers/net/can/c_can/Kconfig
··· 20 20 depends on PCI 21 21 help 22 22 This driver adds support for the C_CAN/D_CAN chips connected 23 - to the PCI bus. 23 + to the PCI bus. E.g. for the C_CAN controller IP inside the 24 + Intel Atom E6xx series IOH (aka EG20T 'PCH CAN'). 24 25 endif
+18 -8
drivers/net/can/m_can/m_can.c
··· 156 156 #define PSR_EW BIT(6) 157 157 #define PSR_EP BIT(5) 158 158 #define PSR_LEC_MASK GENMASK(2, 0) 159 + #define PSR_DLEC_MASK GENMASK(10, 8) 159 160 160 161 /* Interrupt Register (IR) */ 161 162 #define IR_ALL_INT 0xffffffff ··· 210 209 211 210 /* Interrupts for version >= 3.1.x */ 212 211 #define IR_ERR_LEC_31X (IR_PED | IR_PEA) 213 - #define IR_ERR_BUS_31X (IR_ERR_LEC_31X | IR_WDI | IR_BEU | IR_BEC | \ 212 + #define IR_ERR_BUS_31X (IR_ERR_LEC_31X | IR_WDI | IR_BEU | IR_BEC | \ 214 213 IR_TOO | IR_MRAF | IR_TSW | IR_TEFL | IR_RF1L | \ 215 214 IR_RF0L) 216 215 #define IR_ERR_ALL_31X (IR_ERR_STATE | IR_ERR_BUS_31X) ··· 817 816 netdev_err(dev, "Message RAM access failure occurred\n"); 818 817 } 819 818 820 - static inline bool is_lec_err(u32 psr) 819 + static inline bool is_lec_err(u8 lec) 821 820 { 822 - psr &= LEC_UNUSED; 823 - 824 - return psr && (psr != LEC_UNUSED); 821 + return lec != LEC_NO_ERROR && lec != LEC_NO_CHANGE; 825 822 } 826 823 827 824 static inline bool m_can_is_protocol_err(u32 irqstatus) ··· 874 875 work_done += m_can_handle_lost_msg(dev); 875 876 876 877 /* handle lec errors on the bus */ 877 - if ((cdev->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) && 878 - is_lec_err(psr)) 879 - work_done += m_can_handle_lec_err(dev, psr & LEC_UNUSED); 878 + if (cdev->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) { 879 + u8 lec = FIELD_GET(PSR_LEC_MASK, psr); 880 + u8 dlec = FIELD_GET(PSR_DLEC_MASK, psr); 881 + 882 + if (is_lec_err(lec)) { 883 + netdev_dbg(dev, "Arbitration phase error detected\n"); 884 + work_done += m_can_handle_lec_err(dev, lec); 885 + } 886 + 887 + if (is_lec_err(dlec)) { 888 + netdev_dbg(dev, "Data phase error detected\n"); 889 + work_done += m_can_handle_lec_err(dev, dlec); 890 + } 891 + } 880 892 881 893 /* handle protocol errors in arbitration phase */ 882 894 if ((cdev->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) &&
+1 -1
drivers/net/can/m_can/m_can.h
··· 38 38 LEC_BIT1_ERROR, 39 39 LEC_BIT0_ERROR, 40 40 LEC_CRC_ERROR, 41 - LEC_UNUSED, 41 + LEC_NO_CHANGE, 42 42 }; 43 43 44 44 enum m_can_mram_cfg {
-1249
drivers/net/can/pch_can.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Copyright (C) 1999 - 2010 Intel Corporation. 4 - * Copyright (C) 2010 LAPIS SEMICONDUCTOR CO., LTD. 5 - */ 6 - 7 - #include <linux/interrupt.h> 8 - #include <linux/delay.h> 9 - #include <linux/ethtool.h> 10 - #include <linux/io.h> 11 - #include <linux/module.h> 12 - #include <linux/sched.h> 13 - #include <linux/pci.h> 14 - #include <linux/kernel.h> 15 - #include <linux/types.h> 16 - #include <linux/errno.h> 17 - #include <linux/netdevice.h> 18 - #include <linux/skbuff.h> 19 - #include <linux/can.h> 20 - #include <linux/can/dev.h> 21 - #include <linux/can/error.h> 22 - 23 - #define PCH_CTRL_INIT BIT(0) /* The INIT bit of CANCONT register. */ 24 - #define PCH_CTRL_IE BIT(1) /* The IE bit of CAN control register */ 25 - #define PCH_CTRL_IE_SIE_EIE (BIT(3) | BIT(2) | BIT(1)) 26 - #define PCH_CTRL_CCE BIT(6) 27 - #define PCH_CTRL_OPT BIT(7) /* The OPT bit of CANCONT register. */ 28 - #define PCH_OPT_SILENT BIT(3) /* The Silent bit of CANOPT reg. */ 29 - #define PCH_OPT_LBACK BIT(4) /* The LoopBack bit of CANOPT reg. */ 30 - 31 - #define PCH_CMASK_RX_TX_SET 0x00f3 32 - #define PCH_CMASK_RX_TX_GET 0x0073 33 - #define PCH_CMASK_ALL 0xff 34 - #define PCH_CMASK_NEWDAT BIT(2) 35 - #define PCH_CMASK_CLRINTPND BIT(3) 36 - #define PCH_CMASK_CTRL BIT(4) 37 - #define PCH_CMASK_ARB BIT(5) 38 - #define PCH_CMASK_MASK BIT(6) 39 - #define PCH_CMASK_RDWR BIT(7) 40 - #define PCH_IF_MCONT_NEWDAT BIT(15) 41 - #define PCH_IF_MCONT_MSGLOST BIT(14) 42 - #define PCH_IF_MCONT_INTPND BIT(13) 43 - #define PCH_IF_MCONT_UMASK BIT(12) 44 - #define PCH_IF_MCONT_TXIE BIT(11) 45 - #define PCH_IF_MCONT_RXIE BIT(10) 46 - #define PCH_IF_MCONT_RMTEN BIT(9) 47 - #define PCH_IF_MCONT_TXRQXT BIT(8) 48 - #define PCH_IF_MCONT_EOB BIT(7) 49 - #define PCH_IF_MCONT_DLC (BIT(0) | BIT(1) | BIT(2) | BIT(3)) 50 - #define PCH_MASK2_MDIR_MXTD (BIT(14) | BIT(15)) 51 - #define PCH_ID2_DIR BIT(13) 52 - #define PCH_ID2_XTD BIT(14) 53 - #define PCH_ID_MSGVAL BIT(15) 54 - #define PCH_IF_CREQ_BUSY BIT(15) 55 - 56 - #define PCH_STATUS_INT 0x8000 57 - #define PCH_RP 0x00008000 58 - #define PCH_REC 0x00007f00 59 - #define PCH_TEC 0x000000ff 60 - 61 - #define PCH_TX_OK BIT(3) 62 - #define PCH_RX_OK BIT(4) 63 - #define PCH_EPASSIV BIT(5) 64 - #define PCH_EWARN BIT(6) 65 - #define PCH_BUS_OFF BIT(7) 66 - 67 - /* bit position of certain controller bits. */ 68 - #define PCH_BIT_BRP_SHIFT 0 69 - #define PCH_BIT_SJW_SHIFT 6 70 - #define PCH_BIT_TSEG1_SHIFT 8 71 - #define PCH_BIT_TSEG2_SHIFT 12 72 - #define PCH_BIT_BRPE_BRPE_SHIFT 6 73 - 74 - #define PCH_MSK_BITT_BRP 0x3f 75 - #define PCH_MSK_BRPE_BRPE 0x3c0 76 - #define PCH_MSK_CTRL_IE_SIE_EIE 0x07 77 - #define PCH_COUNTER_LIMIT 10 78 - 79 - #define PCH_CAN_CLK 50000000 /* 50MHz */ 80 - 81 - /* 82 - * Define the number of message object. 83 - * PCH CAN communications are done via Message RAM. 84 - * The Message RAM consists of 32 message objects. 85 - */ 86 - #define PCH_RX_OBJ_NUM 26 87 - #define PCH_TX_OBJ_NUM 6 88 - #define PCH_RX_OBJ_START 1 89 - #define PCH_RX_OBJ_END PCH_RX_OBJ_NUM 90 - #define PCH_TX_OBJ_START (PCH_RX_OBJ_END + 1) 91 - #define PCH_TX_OBJ_END (PCH_RX_OBJ_NUM + PCH_TX_OBJ_NUM) 92 - 93 - #define PCH_FIFO_THRESH 16 94 - 95 - /* TxRqst2 show status of MsgObjNo.17~32 */ 96 - #define PCH_TREQ2_TX_MASK (((1 << PCH_TX_OBJ_NUM) - 1) <<\ 97 - (PCH_RX_OBJ_END - 16)) 98 - 99 - enum pch_ifreg { 100 - PCH_RX_IFREG, 101 - PCH_TX_IFREG, 102 - }; 103 - 104 - enum pch_can_err { 105 - PCH_STUF_ERR = 1, 106 - PCH_FORM_ERR, 107 - PCH_ACK_ERR, 108 - PCH_BIT1_ERR, 109 - PCH_BIT0_ERR, 110 - PCH_CRC_ERR, 111 - PCH_LEC_ALL, 112 - }; 113 - 114 - enum pch_can_mode { 115 - PCH_CAN_ENABLE, 116 - PCH_CAN_DISABLE, 117 - PCH_CAN_ALL, 118 - PCH_CAN_NONE, 119 - PCH_CAN_STOP, 120 - PCH_CAN_RUN, 121 - }; 122 - 123 - struct pch_can_if_regs { 124 - u32 creq; 125 - u32 cmask; 126 - u32 mask1; 127 - u32 mask2; 128 - u32 id1; 129 - u32 id2; 130 - u32 mcont; 131 - u32 data[4]; 132 - u32 rsv[13]; 133 - }; 134 - 135 - struct pch_can_regs { 136 - u32 cont; 137 - u32 stat; 138 - u32 errc; 139 - u32 bitt; 140 - u32 intr; 141 - u32 opt; 142 - u32 brpe; 143 - u32 reserve; 144 - struct pch_can_if_regs ifregs[2]; /* [0]=if1 [1]=if2 */ 145 - u32 reserve1[8]; 146 - u32 treq1; 147 - u32 treq2; 148 - u32 reserve2[6]; 149 - u32 data1; 150 - u32 data2; 151 - u32 reserve3[6]; 152 - u32 canipend1; 153 - u32 canipend2; 154 - u32 reserve4[6]; 155 - u32 canmval1; 156 - u32 canmval2; 157 - u32 reserve5[37]; 158 - u32 srst; 159 - }; 160 - 161 - struct pch_can_priv { 162 - struct can_priv can; 163 - struct pci_dev *dev; 164 - u32 tx_enable[PCH_TX_OBJ_END]; 165 - u32 rx_enable[PCH_TX_OBJ_END]; 166 - u32 rx_link[PCH_TX_OBJ_END]; 167 - u32 int_enables; 168 - struct net_device *ndev; 169 - struct pch_can_regs __iomem *regs; 170 - struct napi_struct napi; 171 - int tx_obj; /* Point next Tx Obj index */ 172 - int use_msi; 173 - }; 174 - 175 - static const struct can_bittiming_const pch_can_bittiming_const = { 176 - .name = KBUILD_MODNAME, 177 - .tseg1_min = 2, 178 - .tseg1_max = 16, 179 - .tseg2_min = 1, 180 - .tseg2_max = 8, 181 - .sjw_max = 4, 182 - .brp_min = 1, 183 - .brp_max = 1024, /* 6bit + extended 4bit */ 184 - .brp_inc = 1, 185 - }; 186 - 187 - static const struct pci_device_id pch_pci_tbl[] = { 188 - {PCI_VENDOR_ID_INTEL, 0x8818, PCI_ANY_ID, PCI_ANY_ID,}, 189 - {0,} 190 - }; 191 - MODULE_DEVICE_TABLE(pci, pch_pci_tbl); 192 - 193 - static inline void pch_can_bit_set(void __iomem *addr, u32 mask) 194 - { 195 - iowrite32(ioread32(addr) | mask, addr); 196 - } 197 - 198 - static inline void pch_can_bit_clear(void __iomem *addr, u32 mask) 199 - { 200 - iowrite32(ioread32(addr) & ~mask, addr); 201 - } 202 - 203 - static void pch_can_set_run_mode(struct pch_can_priv *priv, 204 - enum pch_can_mode mode) 205 - { 206 - switch (mode) { 207 - case PCH_CAN_RUN: 208 - pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_INIT); 209 - break; 210 - 211 - case PCH_CAN_STOP: 212 - pch_can_bit_set(&priv->regs->cont, PCH_CTRL_INIT); 213 - break; 214 - 215 - default: 216 - netdev_err(priv->ndev, "%s -> Invalid Mode.\n", __func__); 217 - break; 218 - } 219 - } 220 - 221 - static void pch_can_set_optmode(struct pch_can_priv *priv) 222 - { 223 - u32 reg_val = ioread32(&priv->regs->opt); 224 - 225 - if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) 226 - reg_val |= PCH_OPT_SILENT; 227 - 228 - if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) 229 - reg_val |= PCH_OPT_LBACK; 230 - 231 - pch_can_bit_set(&priv->regs->cont, PCH_CTRL_OPT); 232 - iowrite32(reg_val, &priv->regs->opt); 233 - } 234 - 235 - static void pch_can_rw_msg_obj(void __iomem *creq_addr, u32 num) 236 - { 237 - int counter = PCH_COUNTER_LIMIT; 238 - u32 ifx_creq; 239 - 240 - iowrite32(num, creq_addr); 241 - while (counter) { 242 - ifx_creq = ioread32(creq_addr) & PCH_IF_CREQ_BUSY; 243 - if (!ifx_creq) 244 - break; 245 - counter--; 246 - udelay(1); 247 - } 248 - if (!counter) 249 - pr_err("%s:IF1 BUSY Flag is set forever.\n", __func__); 250 - } 251 - 252 - static void pch_can_set_int_enables(struct pch_can_priv *priv, 253 - enum pch_can_mode interrupt_no) 254 - { 255 - switch (interrupt_no) { 256 - case PCH_CAN_DISABLE: 257 - pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE); 258 - break; 259 - 260 - case PCH_CAN_ALL: 261 - pch_can_bit_set(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE); 262 - break; 263 - 264 - case PCH_CAN_NONE: 265 - pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE); 266 - break; 267 - 268 - default: 269 - netdev_err(priv->ndev, "Invalid interrupt number.\n"); 270 - break; 271 - } 272 - } 273 - 274 - static void pch_can_set_rxtx(struct pch_can_priv *priv, u32 buff_num, 275 - int set, enum pch_ifreg dir) 276 - { 277 - u32 ie; 278 - 279 - if (dir) 280 - ie = PCH_IF_MCONT_TXIE; 281 - else 282 - ie = PCH_IF_MCONT_RXIE; 283 - 284 - /* Reading the Msg buffer from Message RAM to IF1/2 registers. */ 285 - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask); 286 - pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num); 287 - 288 - /* Setting the IF1/2MASK1 register to access MsgVal and RxIE bits */ 289 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_ARB | PCH_CMASK_CTRL, 290 - &priv->regs->ifregs[dir].cmask); 291 - 292 - if (set) { 293 - /* Setting the MsgVal and RxIE/TxIE bits */ 294 - pch_can_bit_set(&priv->regs->ifregs[dir].mcont, ie); 295 - pch_can_bit_set(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL); 296 - } else { 297 - /* Clearing the MsgVal and RxIE/TxIE bits */ 298 - pch_can_bit_clear(&priv->regs->ifregs[dir].mcont, ie); 299 - pch_can_bit_clear(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL); 300 - } 301 - 302 - pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num); 303 - } 304 - 305 - static void pch_can_set_rx_all(struct pch_can_priv *priv, int set) 306 - { 307 - int i; 308 - 309 - /* Traversing to obtain the object configured as receivers. */ 310 - for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) 311 - pch_can_set_rxtx(priv, i, set, PCH_RX_IFREG); 312 - } 313 - 314 - static void pch_can_set_tx_all(struct pch_can_priv *priv, int set) 315 - { 316 - int i; 317 - 318 - /* Traversing to obtain the object configured as transmit object. */ 319 - for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++) 320 - pch_can_set_rxtx(priv, i, set, PCH_TX_IFREG); 321 - } 322 - 323 - static u32 pch_can_int_pending(struct pch_can_priv *priv) 324 - { 325 - return ioread32(&priv->regs->intr) & 0xffff; 326 - } 327 - 328 - static void pch_can_clear_if_buffers(struct pch_can_priv *priv) 329 - { 330 - int i; /* Msg Obj ID (1~32) */ 331 - 332 - for (i = PCH_RX_OBJ_START; i <= PCH_TX_OBJ_END; i++) { 333 - iowrite32(PCH_CMASK_RX_TX_SET, &priv->regs->ifregs[0].cmask); 334 - iowrite32(0xffff, &priv->regs->ifregs[0].mask1); 335 - iowrite32(0xffff, &priv->regs->ifregs[0].mask2); 336 - iowrite32(0x0, &priv->regs->ifregs[0].id1); 337 - iowrite32(0x0, &priv->regs->ifregs[0].id2); 338 - iowrite32(0x0, &priv->regs->ifregs[0].mcont); 339 - iowrite32(0x0, &priv->regs->ifregs[0].data[0]); 340 - iowrite32(0x0, &priv->regs->ifregs[0].data[1]); 341 - iowrite32(0x0, &priv->regs->ifregs[0].data[2]); 342 - iowrite32(0x0, &priv->regs->ifregs[0].data[3]); 343 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | 344 - PCH_CMASK_ARB | PCH_CMASK_CTRL, 345 - &priv->regs->ifregs[0].cmask); 346 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i); 347 - } 348 - } 349 - 350 - static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv) 351 - { 352 - int i; 353 - 354 - for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) { 355 - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask); 356 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i); 357 - 358 - iowrite32(0x0, &priv->regs->ifregs[0].id1); 359 - iowrite32(0x0, &priv->regs->ifregs[0].id2); 360 - 361 - pch_can_bit_set(&priv->regs->ifregs[0].mcont, 362 - PCH_IF_MCONT_UMASK); 363 - 364 - /* In case FIFO mode, Last EoB of Rx Obj must be 1 */ 365 - if (i == PCH_RX_OBJ_END) 366 - pch_can_bit_set(&priv->regs->ifregs[0].mcont, 367 - PCH_IF_MCONT_EOB); 368 - else 369 - pch_can_bit_clear(&priv->regs->ifregs[0].mcont, 370 - PCH_IF_MCONT_EOB); 371 - 372 - iowrite32(0, &priv->regs->ifregs[0].mask1); 373 - pch_can_bit_clear(&priv->regs->ifregs[0].mask2, 374 - 0x1fff | PCH_MASK2_MDIR_MXTD); 375 - 376 - /* Setting CMASK for writing */ 377 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | PCH_CMASK_ARB | 378 - PCH_CMASK_CTRL, &priv->regs->ifregs[0].cmask); 379 - 380 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i); 381 - } 382 - 383 - for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++) { 384 - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[1].cmask); 385 - pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, i); 386 - 387 - /* Resetting DIR bit for reception */ 388 - iowrite32(0x0, &priv->regs->ifregs[1].id1); 389 - iowrite32(PCH_ID2_DIR, &priv->regs->ifregs[1].id2); 390 - 391 - /* Setting EOB bit for transmitter */ 392 - iowrite32(PCH_IF_MCONT_EOB | PCH_IF_MCONT_UMASK, 393 - &priv->regs->ifregs[1].mcont); 394 - 395 - iowrite32(0, &priv->regs->ifregs[1].mask1); 396 - pch_can_bit_clear(&priv->regs->ifregs[1].mask2, 0x1fff); 397 - 398 - /* Setting CMASK for writing */ 399 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | PCH_CMASK_ARB | 400 - PCH_CMASK_CTRL, &priv->regs->ifregs[1].cmask); 401 - 402 - pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, i); 403 - } 404 - } 405 - 406 - static void pch_can_init(struct pch_can_priv *priv) 407 - { 408 - /* Stopping the Can device. */ 409 - pch_can_set_run_mode(priv, PCH_CAN_STOP); 410 - 411 - /* Clearing all the message object buffers. */ 412 - pch_can_clear_if_buffers(priv); 413 - 414 - /* Configuring the respective message object as either rx/tx object. */ 415 - pch_can_config_rx_tx_buffers(priv); 416 - 417 - /* Enabling the interrupts. */ 418 - pch_can_set_int_enables(priv, PCH_CAN_ALL); 419 - } 420 - 421 - static void pch_can_release(struct pch_can_priv *priv) 422 - { 423 - /* Stooping the CAN device. */ 424 - pch_can_set_run_mode(priv, PCH_CAN_STOP); 425 - 426 - /* Disabling the interrupts. */ 427 - pch_can_set_int_enables(priv, PCH_CAN_NONE); 428 - 429 - /* Disabling all the receive object. */ 430 - pch_can_set_rx_all(priv, 0); 431 - 432 - /* Disabling all the transmit object. */ 433 - pch_can_set_tx_all(priv, 0); 434 - } 435 - 436 - /* This function clears interrupt(s) from the CAN device. */ 437 - static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask) 438 - { 439 - /* Clear interrupt for transmit object */ 440 - if ((mask >= PCH_RX_OBJ_START) && (mask <= PCH_RX_OBJ_END)) { 441 - /* Setting CMASK for clearing the reception interrupts. */ 442 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB, 443 - &priv->regs->ifregs[0].cmask); 444 - 445 - /* Clearing the Dir bit. */ 446 - pch_can_bit_clear(&priv->regs->ifregs[0].id2, PCH_ID2_DIR); 447 - 448 - /* Clearing NewDat & IntPnd */ 449 - pch_can_bit_clear(&priv->regs->ifregs[0].mcont, 450 - PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND); 451 - 452 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, mask); 453 - } else if ((mask >= PCH_TX_OBJ_START) && (mask <= PCH_TX_OBJ_END)) { 454 - /* 455 - * Setting CMASK for clearing interrupts for frame transmission. 456 - */ 457 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB, 458 - &priv->regs->ifregs[1].cmask); 459 - 460 - /* Resetting the ID registers. */ 461 - pch_can_bit_set(&priv->regs->ifregs[1].id2, 462 - PCH_ID2_DIR | (0x7ff << 2)); 463 - iowrite32(0x0, &priv->regs->ifregs[1].id1); 464 - 465 - /* Clearing NewDat, TxRqst & IntPnd */ 466 - pch_can_bit_clear(&priv->regs->ifregs[1].mcont, 467 - PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND | 468 - PCH_IF_MCONT_TXRQXT); 469 - pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, mask); 470 - } 471 - } 472 - 473 - static void pch_can_reset(struct pch_can_priv *priv) 474 - { 475 - /* write to sw reset register */ 476 - iowrite32(1, &priv->regs->srst); 477 - iowrite32(0, &priv->regs->srst); 478 - } 479 - 480 - static void pch_can_error(struct net_device *ndev, u32 status) 481 - { 482 - struct sk_buff *skb; 483 - struct pch_can_priv *priv = netdev_priv(ndev); 484 - struct can_frame *cf; 485 - u32 errc, lec; 486 - struct net_device_stats *stats = &(priv->ndev->stats); 487 - enum can_state state = priv->can.state; 488 - 489 - skb = alloc_can_err_skb(ndev, &cf); 490 - if (!skb) 491 - return; 492 - 493 - errc = ioread32(&priv->regs->errc); 494 - if (status & PCH_BUS_OFF) { 495 - pch_can_set_tx_all(priv, 0); 496 - pch_can_set_rx_all(priv, 0); 497 - state = CAN_STATE_BUS_OFF; 498 - cf->can_id |= CAN_ERR_BUSOFF; 499 - priv->can.can_stats.bus_off++; 500 - can_bus_off(ndev); 501 - } else { 502 - cf->can_id |= CAN_ERR_CNT; 503 - cf->data[6] = errc & PCH_TEC; 504 - cf->data[7] = (errc & PCH_REC) >> 8; 505 - } 506 - 507 - /* Warning interrupt. */ 508 - if (status & PCH_EWARN) { 509 - state = CAN_STATE_ERROR_WARNING; 510 - priv->can.can_stats.error_warning++; 511 - cf->can_id |= CAN_ERR_CRTL; 512 - if (((errc & PCH_REC) >> 8) > 96) 513 - cf->data[1] |= CAN_ERR_CRTL_RX_WARNING; 514 - if ((errc & PCH_TEC) > 96) 515 - cf->data[1] |= CAN_ERR_CRTL_TX_WARNING; 516 - netdev_dbg(ndev, 517 - "%s -> Error Counter is more than 96.\n", __func__); 518 - } 519 - /* Error passive interrupt. */ 520 - if (status & PCH_EPASSIV) { 521 - priv->can.can_stats.error_passive++; 522 - state = CAN_STATE_ERROR_PASSIVE; 523 - cf->can_id |= CAN_ERR_CRTL; 524 - if (errc & PCH_RP) 525 - cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; 526 - if ((errc & PCH_TEC) > 127) 527 - cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE; 528 - netdev_dbg(ndev, 529 - "%s -> CAN controller is ERROR PASSIVE .\n", __func__); 530 - } 531 - 532 - lec = status & PCH_LEC_ALL; 533 - switch (lec) { 534 - case PCH_STUF_ERR: 535 - cf->data[2] |= CAN_ERR_PROT_STUFF; 536 - priv->can.can_stats.bus_error++; 537 - stats->rx_errors++; 538 - break; 539 - case PCH_FORM_ERR: 540 - cf->data[2] |= CAN_ERR_PROT_FORM; 541 - priv->can.can_stats.bus_error++; 542 - stats->rx_errors++; 543 - break; 544 - case PCH_ACK_ERR: 545 - cf->can_id |= CAN_ERR_ACK; 546 - priv->can.can_stats.bus_error++; 547 - stats->rx_errors++; 548 - break; 549 - case PCH_BIT1_ERR: 550 - case PCH_BIT0_ERR: 551 - cf->data[2] |= CAN_ERR_PROT_BIT; 552 - priv->can.can_stats.bus_error++; 553 - stats->rx_errors++; 554 - break; 555 - case PCH_CRC_ERR: 556 - cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; 557 - priv->can.can_stats.bus_error++; 558 - stats->rx_errors++; 559 - break; 560 - case PCH_LEC_ALL: /* Written by CPU. No error status */ 561 - break; 562 - } 563 - 564 - priv->can.state = state; 565 - netif_receive_skb(skb); 566 - } 567 - 568 - static irqreturn_t pch_can_interrupt(int irq, void *dev_id) 569 - { 570 - struct net_device *ndev = (struct net_device *)dev_id; 571 - struct pch_can_priv *priv = netdev_priv(ndev); 572 - 573 - if (!pch_can_int_pending(priv)) 574 - return IRQ_NONE; 575 - 576 - pch_can_set_int_enables(priv, PCH_CAN_NONE); 577 - napi_schedule(&priv->napi); 578 - return IRQ_HANDLED; 579 - } 580 - 581 - static void pch_fifo_thresh(struct pch_can_priv *priv, int obj_id) 582 - { 583 - if (obj_id < PCH_FIFO_THRESH) { 584 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | 585 - PCH_CMASK_ARB, &priv->regs->ifregs[0].cmask); 586 - 587 - /* Clearing the Dir bit. */ 588 - pch_can_bit_clear(&priv->regs->ifregs[0].id2, PCH_ID2_DIR); 589 - 590 - /* Clearing NewDat & IntPnd */ 591 - pch_can_bit_clear(&priv->regs->ifregs[0].mcont, 592 - PCH_IF_MCONT_INTPND); 593 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_id); 594 - } else if (obj_id > PCH_FIFO_THRESH) { 595 - pch_can_int_clr(priv, obj_id); 596 - } else if (obj_id == PCH_FIFO_THRESH) { 597 - int cnt; 598 - for (cnt = 0; cnt < PCH_FIFO_THRESH; cnt++) 599 - pch_can_int_clr(priv, cnt + 1); 600 - } 601 - } 602 - 603 - static void pch_can_rx_msg_lost(struct net_device *ndev, int obj_id) 604 - { 605 - struct pch_can_priv *priv = netdev_priv(ndev); 606 - struct net_device_stats *stats = &(priv->ndev->stats); 607 - struct sk_buff *skb; 608 - struct can_frame *cf; 609 - 610 - netdev_dbg(priv->ndev, "Msg Obj is overwritten.\n"); 611 - pch_can_bit_clear(&priv->regs->ifregs[0].mcont, 612 - PCH_IF_MCONT_MSGLOST); 613 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL, 614 - &priv->regs->ifregs[0].cmask); 615 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_id); 616 - 617 - skb = alloc_can_err_skb(ndev, &cf); 618 - if (!skb) 619 - return; 620 - 621 - cf->can_id |= CAN_ERR_CRTL; 622 - cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 623 - stats->rx_over_errors++; 624 - stats->rx_errors++; 625 - 626 - netif_receive_skb(skb); 627 - } 628 - 629 - static int pch_can_rx_normal(struct net_device *ndev, u32 obj_num, int quota) 630 - { 631 - u32 reg; 632 - canid_t id; 633 - int rcv_pkts = 0; 634 - struct sk_buff *skb; 635 - struct can_frame *cf; 636 - struct pch_can_priv *priv = netdev_priv(ndev); 637 - struct net_device_stats *stats = &(priv->ndev->stats); 638 - int i; 639 - u32 id2; 640 - u16 data_reg; 641 - 642 - do { 643 - /* Reading the message object from the Message RAM */ 644 - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask); 645 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_num); 646 - 647 - /* Reading the MCONT register. */ 648 - reg = ioread32(&priv->regs->ifregs[0].mcont); 649 - 650 - if (reg & PCH_IF_MCONT_EOB) 651 - break; 652 - 653 - /* If MsgLost bit set. */ 654 - if (reg & PCH_IF_MCONT_MSGLOST) { 655 - pch_can_rx_msg_lost(ndev, obj_num); 656 - rcv_pkts++; 657 - quota--; 658 - obj_num++; 659 - continue; 660 - } else if (!(reg & PCH_IF_MCONT_NEWDAT)) { 661 - obj_num++; 662 - continue; 663 - } 664 - 665 - skb = alloc_can_skb(priv->ndev, &cf); 666 - if (!skb) { 667 - netdev_err(ndev, "alloc_can_skb Failed\n"); 668 - return rcv_pkts; 669 - } 670 - 671 - /* Get Received data */ 672 - id2 = ioread32(&priv->regs->ifregs[0].id2); 673 - if (id2 & PCH_ID2_XTD) { 674 - id = (ioread32(&priv->regs->ifregs[0].id1) & 0xffff); 675 - id |= (((id2) & 0x1fff) << 16); 676 - cf->can_id = id | CAN_EFF_FLAG; 677 - } else { 678 - id = (id2 >> 2) & CAN_SFF_MASK; 679 - cf->can_id = id; 680 - } 681 - 682 - cf->len = can_cc_dlc2len((ioread32(&priv->regs-> 683 - ifregs[0].mcont)) & 0xF); 684 - 685 - if (id2 & PCH_ID2_DIR) { 686 - cf->can_id |= CAN_RTR_FLAG; 687 - } else { 688 - for (i = 0; i < cf->len; i += 2) { 689 - data_reg = ioread16(&priv->regs->ifregs[0].data[i / 2]); 690 - cf->data[i] = data_reg; 691 - cf->data[i + 1] = data_reg >> 8; 692 - } 693 - 694 - stats->rx_bytes += cf->len; 695 - } 696 - stats->rx_packets++; 697 - rcv_pkts++; 698 - quota--; 699 - netif_receive_skb(skb); 700 - 701 - pch_fifo_thresh(priv, obj_num); 702 - obj_num++; 703 - } while (quota > 0); 704 - 705 - return rcv_pkts; 706 - } 707 - 708 - static void pch_can_tx_complete(struct net_device *ndev, u32 int_stat) 709 - { 710 - struct pch_can_priv *priv = netdev_priv(ndev); 711 - struct net_device_stats *stats = &(priv->ndev->stats); 712 - 713 - stats->tx_bytes += can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1, 714 - NULL); 715 - stats->tx_packets++; 716 - iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND, 717 - &priv->regs->ifregs[1].cmask); 718 - pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, int_stat); 719 - if (int_stat == PCH_TX_OBJ_END) 720 - netif_wake_queue(ndev); 721 - } 722 - 723 - static int pch_can_poll(struct napi_struct *napi, int quota) 724 - { 725 - struct net_device *ndev = napi->dev; 726 - struct pch_can_priv *priv = netdev_priv(ndev); 727 - u32 int_stat; 728 - u32 reg_stat; 729 - int quota_save = quota; 730 - 731 - int_stat = pch_can_int_pending(priv); 732 - if (!int_stat) 733 - goto end; 734 - 735 - if (int_stat == PCH_STATUS_INT) { 736 - reg_stat = ioread32(&priv->regs->stat); 737 - 738 - if ((reg_stat & (PCH_BUS_OFF | PCH_LEC_ALL)) && 739 - ((reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL)) { 740 - pch_can_error(ndev, reg_stat); 741 - quota--; 742 - } 743 - 744 - if (reg_stat & (PCH_TX_OK | PCH_RX_OK)) 745 - pch_can_bit_clear(&priv->regs->stat, 746 - reg_stat & (PCH_TX_OK | PCH_RX_OK)); 747 - 748 - int_stat = pch_can_int_pending(priv); 749 - } 750 - 751 - if (quota == 0) 752 - goto end; 753 - 754 - if ((int_stat >= PCH_RX_OBJ_START) && (int_stat <= PCH_RX_OBJ_END)) { 755 - quota -= pch_can_rx_normal(ndev, int_stat, quota); 756 - } else if ((int_stat >= PCH_TX_OBJ_START) && 757 - (int_stat <= PCH_TX_OBJ_END)) { 758 - /* Handle transmission interrupt */ 759 - pch_can_tx_complete(ndev, int_stat); 760 - } 761 - 762 - end: 763 - napi_complete(napi); 764 - pch_can_set_int_enables(priv, PCH_CAN_ALL); 765 - 766 - return quota_save - quota; 767 - } 768 - 769 - static int pch_set_bittiming(struct net_device *ndev) 770 - { 771 - struct pch_can_priv *priv = netdev_priv(ndev); 772 - const struct can_bittiming *bt = &priv->can.bittiming; 773 - u32 canbit; 774 - u32 bepe; 775 - 776 - /* Setting the CCE bit for accessing the Can Timing register. */ 777 - pch_can_bit_set(&priv->regs->cont, PCH_CTRL_CCE); 778 - 779 - canbit = (bt->brp - 1) & PCH_MSK_BITT_BRP; 780 - canbit |= (bt->sjw - 1) << PCH_BIT_SJW_SHIFT; 781 - canbit |= (bt->phase_seg1 + bt->prop_seg - 1) << PCH_BIT_TSEG1_SHIFT; 782 - canbit |= (bt->phase_seg2 - 1) << PCH_BIT_TSEG2_SHIFT; 783 - bepe = ((bt->brp - 1) & PCH_MSK_BRPE_BRPE) >> PCH_BIT_BRPE_BRPE_SHIFT; 784 - iowrite32(canbit, &priv->regs->bitt); 785 - iowrite32(bepe, &priv->regs->brpe); 786 - pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_CCE); 787 - 788 - return 0; 789 - } 790 - 791 - static void pch_can_start(struct net_device *ndev) 792 - { 793 - struct pch_can_priv *priv = netdev_priv(ndev); 794 - 795 - if (priv->can.state != CAN_STATE_STOPPED) 796 - pch_can_reset(priv); 797 - 798 - pch_set_bittiming(ndev); 799 - pch_can_set_optmode(priv); 800 - 801 - pch_can_set_tx_all(priv, 1); 802 - pch_can_set_rx_all(priv, 1); 803 - 804 - /* Setting the CAN to run mode. */ 805 - pch_can_set_run_mode(priv, PCH_CAN_RUN); 806 - 807 - priv->can.state = CAN_STATE_ERROR_ACTIVE; 808 - 809 - return; 810 - } 811 - 812 - static int pch_can_do_set_mode(struct net_device *ndev, enum can_mode mode) 813 - { 814 - int ret = 0; 815 - 816 - switch (mode) { 817 - case CAN_MODE_START: 818 - pch_can_start(ndev); 819 - netif_wake_queue(ndev); 820 - break; 821 - default: 822 - ret = -EOPNOTSUPP; 823 - break; 824 - } 825 - 826 - return ret; 827 - } 828 - 829 - static int pch_can_open(struct net_device *ndev) 830 - { 831 - struct pch_can_priv *priv = netdev_priv(ndev); 832 - int retval; 833 - 834 - /* Registering the interrupt. */ 835 - retval = request_irq(priv->dev->irq, pch_can_interrupt, IRQF_SHARED, 836 - ndev->name, ndev); 837 - if (retval) { 838 - netdev_err(ndev, "request_irq failed.\n"); 839 - goto req_irq_err; 840 - } 841 - 842 - /* Open common can device */ 843 - retval = open_candev(ndev); 844 - if (retval) { 845 - netdev_err(ndev, "open_candev() failed %d\n", retval); 846 - goto err_open_candev; 847 - } 848 - 849 - pch_can_init(priv); 850 - pch_can_start(ndev); 851 - napi_enable(&priv->napi); 852 - netif_start_queue(ndev); 853 - 854 - return 0; 855 - 856 - err_open_candev: 857 - free_irq(priv->dev->irq, ndev); 858 - req_irq_err: 859 - pch_can_release(priv); 860 - 861 - return retval; 862 - } 863 - 864 - static int pch_close(struct net_device *ndev) 865 - { 866 - struct pch_can_priv *priv = netdev_priv(ndev); 867 - 868 - netif_stop_queue(ndev); 869 - napi_disable(&priv->napi); 870 - pch_can_release(priv); 871 - free_irq(priv->dev->irq, ndev); 872 - close_candev(ndev); 873 - priv->can.state = CAN_STATE_STOPPED; 874 - return 0; 875 - } 876 - 877 - static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev) 878 - { 879 - struct pch_can_priv *priv = netdev_priv(ndev); 880 - struct can_frame *cf = (struct can_frame *)skb->data; 881 - int tx_obj_no; 882 - int i; 883 - u32 id2; 884 - 885 - if (can_dropped_invalid_skb(ndev, skb)) 886 - return NETDEV_TX_OK; 887 - 888 - tx_obj_no = priv->tx_obj; 889 - if (priv->tx_obj == PCH_TX_OBJ_END) { 890 - if (ioread32(&priv->regs->treq2) & PCH_TREQ2_TX_MASK) 891 - netif_stop_queue(ndev); 892 - 893 - priv->tx_obj = PCH_TX_OBJ_START; 894 - } else { 895 - priv->tx_obj++; 896 - } 897 - 898 - /* Setting the CMASK register. */ 899 - pch_can_bit_set(&priv->regs->ifregs[1].cmask, PCH_CMASK_ALL); 900 - 901 - /* If ID extended is set. */ 902 - if (cf->can_id & CAN_EFF_FLAG) { 903 - iowrite32(cf->can_id & 0xffff, &priv->regs->ifregs[1].id1); 904 - id2 = ((cf->can_id >> 16) & 0x1fff) | PCH_ID2_XTD; 905 - } else { 906 - iowrite32(0, &priv->regs->ifregs[1].id1); 907 - id2 = (cf->can_id & CAN_SFF_MASK) << 2; 908 - } 909 - 910 - id2 |= PCH_ID_MSGVAL; 911 - 912 - /* If remote frame has to be transmitted.. */ 913 - if (!(cf->can_id & CAN_RTR_FLAG)) 914 - id2 |= PCH_ID2_DIR; 915 - 916 - iowrite32(id2, &priv->regs->ifregs[1].id2); 917 - 918 - /* Copy data to register */ 919 - for (i = 0; i < cf->len; i += 2) { 920 - iowrite16(cf->data[i] | (cf->data[i + 1] << 8), 921 - &priv->regs->ifregs[1].data[i / 2]); 922 - } 923 - 924 - can_put_echo_skb(skb, ndev, tx_obj_no - PCH_RX_OBJ_END - 1, 0); 925 - 926 - /* Set the size of the data. Update if2_mcont */ 927 - iowrite32(cf->len | PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT | 928 - PCH_IF_MCONT_TXIE, &priv->regs->ifregs[1].mcont); 929 - 930 - pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, tx_obj_no); 931 - 932 - return NETDEV_TX_OK; 933 - } 934 - 935 - static const struct net_device_ops pch_can_netdev_ops = { 936 - .ndo_open = pch_can_open, 937 - .ndo_stop = pch_close, 938 - .ndo_start_xmit = pch_xmit, 939 - .ndo_change_mtu = can_change_mtu, 940 - }; 941 - 942 - static const struct ethtool_ops pch_can_ethtool_ops = { 943 - .get_ts_info = ethtool_op_get_ts_info, 944 - }; 945 - 946 - static void pch_can_remove(struct pci_dev *pdev) 947 - { 948 - struct net_device *ndev = pci_get_drvdata(pdev); 949 - struct pch_can_priv *priv = netdev_priv(ndev); 950 - 951 - unregister_candev(priv->ndev); 952 - if (priv->use_msi) 953 - pci_disable_msi(priv->dev); 954 - pci_release_regions(pdev); 955 - pci_disable_device(pdev); 956 - pch_can_reset(priv); 957 - pci_iounmap(pdev, priv->regs); 958 - free_candev(priv->ndev); 959 - } 960 - 961 - static void __maybe_unused pch_can_set_int_custom(struct pch_can_priv *priv) 962 - { 963 - /* Clearing the IE, SIE and EIE bits of Can control register. */ 964 - pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE); 965 - 966 - /* Appropriately setting them. */ 967 - pch_can_bit_set(&priv->regs->cont, 968 - ((priv->int_enables & PCH_MSK_CTRL_IE_SIE_EIE) << 1)); 969 - } 970 - 971 - /* This function retrieves interrupt enabled for the CAN device. */ 972 - static u32 __maybe_unused pch_can_get_int_enables(struct pch_can_priv *priv) 973 - { 974 - /* Obtaining the status of IE, SIE and EIE interrupt bits. */ 975 - return (ioread32(&priv->regs->cont) & PCH_CTRL_IE_SIE_EIE) >> 1; 976 - } 977 - 978 - static u32 __maybe_unused pch_can_get_rxtx_ir(struct pch_can_priv *priv, 979 - u32 buff_num, enum pch_ifreg dir) 980 - { 981 - u32 ie, enable; 982 - 983 - if (dir) 984 - ie = PCH_IF_MCONT_RXIE; 985 - else 986 - ie = PCH_IF_MCONT_TXIE; 987 - 988 - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask); 989 - pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num); 990 - 991 - if (((ioread32(&priv->regs->ifregs[dir].id2)) & PCH_ID_MSGVAL) && 992 - ((ioread32(&priv->regs->ifregs[dir].mcont)) & ie)) 993 - enable = 1; 994 - else 995 - enable = 0; 996 - 997 - return enable; 998 - } 999 - 1000 - static void __maybe_unused pch_can_set_rx_buffer_link(struct pch_can_priv *priv, 1001 - u32 buffer_num, int set) 1002 - { 1003 - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask); 1004 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num); 1005 - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL, 1006 - &priv->regs->ifregs[0].cmask); 1007 - if (set) 1008 - pch_can_bit_clear(&priv->regs->ifregs[0].mcont, 1009 - PCH_IF_MCONT_EOB); 1010 - else 1011 - pch_can_bit_set(&priv->regs->ifregs[0].mcont, PCH_IF_MCONT_EOB); 1012 - 1013 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num); 1014 - } 1015 - 1016 - static u32 __maybe_unused pch_can_get_rx_buffer_link(struct pch_can_priv *priv, 1017 - u32 buffer_num) 1018 - { 1019 - u32 link; 1020 - 1021 - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask); 1022 - pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num); 1023 - 1024 - if (ioread32(&priv->regs->ifregs[0].mcont) & PCH_IF_MCONT_EOB) 1025 - link = 0; 1026 - else 1027 - link = 1; 1028 - return link; 1029 - } 1030 - 1031 - static int __maybe_unused pch_can_get_buffer_status(struct pch_can_priv *priv) 1032 - { 1033 - return (ioread32(&priv->regs->treq1) & 0xffff) | 1034 - (ioread32(&priv->regs->treq2) << 16); 1035 - } 1036 - 1037 - static int __maybe_unused pch_can_suspend(struct device *dev_d) 1038 - { 1039 - int i; 1040 - u32 buf_stat; /* Variable for reading the transmit buffer status. */ 1041 - int counter = PCH_COUNTER_LIMIT; 1042 - 1043 - struct net_device *dev = dev_get_drvdata(dev_d); 1044 - struct pch_can_priv *priv = netdev_priv(dev); 1045 - 1046 - /* Stop the CAN controller */ 1047 - pch_can_set_run_mode(priv, PCH_CAN_STOP); 1048 - 1049 - /* Indicate that we are aboutto/in suspend */ 1050 - priv->can.state = CAN_STATE_STOPPED; 1051 - 1052 - /* Waiting for all transmission to complete. */ 1053 - while (counter) { 1054 - buf_stat = pch_can_get_buffer_status(priv); 1055 - if (!buf_stat) 1056 - break; 1057 - counter--; 1058 - udelay(1); 1059 - } 1060 - if (!counter) 1061 - dev_err(dev_d, "%s -> Transmission time out.\n", __func__); 1062 - 1063 - /* Save interrupt configuration and then disable them */ 1064 - priv->int_enables = pch_can_get_int_enables(priv); 1065 - pch_can_set_int_enables(priv, PCH_CAN_DISABLE); 1066 - 1067 - /* Save Tx buffer enable state */ 1068 - for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++) 1069 - priv->tx_enable[i - 1] = pch_can_get_rxtx_ir(priv, i, 1070 - PCH_TX_IFREG); 1071 - 1072 - /* Disable all Transmit buffers */ 1073 - pch_can_set_tx_all(priv, 0); 1074 - 1075 - /* Save Rx buffer enable state */ 1076 - for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) { 1077 - priv->rx_enable[i - 1] = pch_can_get_rxtx_ir(priv, i, 1078 - PCH_RX_IFREG); 1079 - priv->rx_link[i - 1] = pch_can_get_rx_buffer_link(priv, i); 1080 - } 1081 - 1082 - /* Disable all Receive buffers */ 1083 - pch_can_set_rx_all(priv, 0); 1084 - 1085 - return 0; 1086 - } 1087 - 1088 - static int __maybe_unused pch_can_resume(struct device *dev_d) 1089 - { 1090 - int i; 1091 - struct net_device *dev = dev_get_drvdata(dev_d); 1092 - struct pch_can_priv *priv = netdev_priv(dev); 1093 - 1094 - priv->can.state = CAN_STATE_ERROR_ACTIVE; 1095 - 1096 - /* Disabling all interrupts. */ 1097 - pch_can_set_int_enables(priv, PCH_CAN_DISABLE); 1098 - 1099 - /* Setting the CAN device in Stop Mode. */ 1100 - pch_can_set_run_mode(priv, PCH_CAN_STOP); 1101 - 1102 - /* Configuring the transmit and receive buffers. */ 1103 - pch_can_config_rx_tx_buffers(priv); 1104 - 1105 - /* Restore the CAN state */ 1106 - pch_set_bittiming(dev); 1107 - 1108 - /* Listen/Active */ 1109 - pch_can_set_optmode(priv); 1110 - 1111 - /* Enabling the transmit buffer. */ 1112 - for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++) 1113 - pch_can_set_rxtx(priv, i, priv->tx_enable[i - 1], PCH_TX_IFREG); 1114 - 1115 - /* Configuring the receive buffer and enabling them. */ 1116 - for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) { 1117 - /* Restore buffer link */ 1118 - pch_can_set_rx_buffer_link(priv, i, priv->rx_link[i - 1]); 1119 - 1120 - /* Restore buffer enables */ 1121 - pch_can_set_rxtx(priv, i, priv->rx_enable[i - 1], PCH_RX_IFREG); 1122 - } 1123 - 1124 - /* Enable CAN Interrupts */ 1125 - pch_can_set_int_custom(priv); 1126 - 1127 - /* Restore Run Mode */ 1128 - pch_can_set_run_mode(priv, PCH_CAN_RUN); 1129 - 1130 - return 0; 1131 - } 1132 - 1133 - static int pch_can_get_berr_counter(const struct net_device *dev, 1134 - struct can_berr_counter *bec) 1135 - { 1136 - struct pch_can_priv *priv = netdev_priv(dev); 1137 - u32 errc = ioread32(&priv->regs->errc); 1138 - 1139 - bec->txerr = errc & PCH_TEC; 1140 - bec->rxerr = (errc & PCH_REC) >> 8; 1141 - 1142 - return 0; 1143 - } 1144 - 1145 - static int pch_can_probe(struct pci_dev *pdev, 1146 - const struct pci_device_id *id) 1147 - { 1148 - struct net_device *ndev; 1149 - struct pch_can_priv *priv; 1150 - int rc; 1151 - void __iomem *addr; 1152 - 1153 - rc = pci_enable_device(pdev); 1154 - if (rc) { 1155 - dev_err(&pdev->dev, "Failed pci_enable_device %d\n", rc); 1156 - goto probe_exit_endev; 1157 - } 1158 - 1159 - rc = pci_request_regions(pdev, KBUILD_MODNAME); 1160 - if (rc) { 1161 - dev_err(&pdev->dev, "Failed pci_request_regions %d\n", rc); 1162 - goto probe_exit_pcireq; 1163 - } 1164 - 1165 - addr = pci_iomap(pdev, 1, 0); 1166 - if (!addr) { 1167 - rc = -EIO; 1168 - dev_err(&pdev->dev, "Failed pci_iomap\n"); 1169 - goto probe_exit_ipmap; 1170 - } 1171 - 1172 - ndev = alloc_candev(sizeof(struct pch_can_priv), PCH_TX_OBJ_END); 1173 - if (!ndev) { 1174 - rc = -ENOMEM; 1175 - dev_err(&pdev->dev, "Failed alloc_candev\n"); 1176 - goto probe_exit_alloc_candev; 1177 - } 1178 - 1179 - priv = netdev_priv(ndev); 1180 - priv->ndev = ndev; 1181 - priv->regs = addr; 1182 - priv->dev = pdev; 1183 - priv->can.bittiming_const = &pch_can_bittiming_const; 1184 - priv->can.do_set_mode = pch_can_do_set_mode; 1185 - priv->can.do_get_berr_counter = pch_can_get_berr_counter; 1186 - priv->can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY | 1187 - CAN_CTRLMODE_LOOPBACK; 1188 - priv->tx_obj = PCH_TX_OBJ_START; /* Point head of Tx Obj */ 1189 - 1190 - ndev->irq = pdev->irq; 1191 - ndev->flags |= IFF_ECHO; 1192 - 1193 - pci_set_drvdata(pdev, ndev); 1194 - SET_NETDEV_DEV(ndev, &pdev->dev); 1195 - ndev->netdev_ops = &pch_can_netdev_ops; 1196 - ndev->ethtool_ops = &pch_can_ethtool_ops; 1197 - priv->can.clock.freq = PCH_CAN_CLK; /* Hz */ 1198 - 1199 - netif_napi_add_weight(ndev, &priv->napi, pch_can_poll, PCH_RX_OBJ_END); 1200 - 1201 - rc = pci_enable_msi(priv->dev); 1202 - if (rc) { 1203 - netdev_err(ndev, "PCH CAN opened without MSI\n"); 1204 - priv->use_msi = 0; 1205 - } else { 1206 - netdev_err(ndev, "PCH CAN opened with MSI\n"); 1207 - pci_set_master(pdev); 1208 - priv->use_msi = 1; 1209 - } 1210 - 1211 - rc = register_candev(ndev); 1212 - if (rc) { 1213 - dev_err(&pdev->dev, "Failed register_candev %d\n", rc); 1214 - goto probe_exit_reg_candev; 1215 - } 1216 - 1217 - return 0; 1218 - 1219 - probe_exit_reg_candev: 1220 - if (priv->use_msi) 1221 - pci_disable_msi(priv->dev); 1222 - free_candev(ndev); 1223 - probe_exit_alloc_candev: 1224 - pci_iounmap(pdev, addr); 1225 - probe_exit_ipmap: 1226 - pci_release_regions(pdev); 1227 - probe_exit_pcireq: 1228 - pci_disable_device(pdev); 1229 - probe_exit_endev: 1230 - return rc; 1231 - } 1232 - 1233 - static SIMPLE_DEV_PM_OPS(pch_can_pm_ops, 1234 - pch_can_suspend, 1235 - pch_can_resume); 1236 - 1237 - static struct pci_driver pch_can_pci_driver = { 1238 - .name = "pch_can", 1239 - .id_table = pch_pci_tbl, 1240 - .probe = pch_can_probe, 1241 - .remove = pch_can_remove, 1242 - .driver.pm = &pch_can_pm_ops, 1243 - }; 1244 - 1245 - module_pci_driver(pch_can_pci_driver); 1246 - 1247 - MODULE_DESCRIPTION("Intel EG20T PCH CAN(Controller Area Network) Driver"); 1248 - MODULE_LICENSE("GPL v2"); 1249 - MODULE_VERSION("0.94");
+10 -10
drivers/net/can/rcar/rcar_canfd.c
··· 1889 1889 gpriv->chip_id = chip_id; 1890 1890 gpriv->max_channels = max_channels; 1891 1891 1892 - if (gpriv->chip_id == RENESAS_RZG2L) { 1893 - gpriv->rstc1 = devm_reset_control_get_exclusive(&pdev->dev, "rstp_n"); 1894 - if (IS_ERR(gpriv->rstc1)) 1895 - return dev_err_probe(&pdev->dev, PTR_ERR(gpriv->rstc1), 1896 - "failed to get rstp_n\n"); 1892 + gpriv->rstc1 = devm_reset_control_get_optional_exclusive(&pdev->dev, 1893 + "rstp_n"); 1894 + if (IS_ERR(gpriv->rstc1)) 1895 + return dev_err_probe(&pdev->dev, PTR_ERR(gpriv->rstc1), 1896 + "failed to get rstp_n\n"); 1897 1897 1898 - gpriv->rstc2 = devm_reset_control_get_exclusive(&pdev->dev, "rstc_n"); 1899 - if (IS_ERR(gpriv->rstc2)) 1900 - return dev_err_probe(&pdev->dev, PTR_ERR(gpriv->rstc2), 1901 - "failed to get rstc_n\n"); 1902 - } 1898 + gpriv->rstc2 = devm_reset_control_get_optional_exclusive(&pdev->dev, 1899 + "rstc_n"); 1900 + if (IS_ERR(gpriv->rstc2)) 1901 + return dev_err_probe(&pdev->dev, PTR_ERR(gpriv->rstc2), 1902 + "failed to get rstc_n\n"); 1903 1903 1904 1904 /* Peripheral clock */ 1905 1905 gpriv->clkp = devm_clk_get(&pdev->dev, "fck");
+6 -3
drivers/net/can/usb/Kconfig
··· 38 38 will be called etas_es58x. 39 39 40 40 config CAN_GS_USB 41 - tristate "Geschwister Schneider UG interfaces" 41 + tristate "Geschwister Schneider UG and candleLight compatible interfaces" 42 42 help 43 - This driver supports the Geschwister Schneider and bytewerk.org 44 - candleLight USB CAN interfaces USB/CAN devices 43 + This driver supports the Geschwister Schneider and 44 + bytewerk.org candleLight compatible 45 + (https://github.com/candle-usb/candleLight_fw) USB/CAN 46 + interfaces. 47 + 45 48 If unsure choose N, 46 49 choose Y for built in support, 47 50 M to compile as module (module will be named: gs_usb).
+63 -13
drivers/net/can/usb/gs_usb.c
··· 66 66 GS_USB_BREQ_BT_CONST_EXT, 67 67 GS_USB_BREQ_SET_TERMINATION, 68 68 GS_USB_BREQ_GET_TERMINATION, 69 + GS_USB_BREQ_GET_STATE, 69 70 }; 70 71 71 72 enum gs_can_mode { ··· 135 134 /* GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX BIT(9) */ 136 135 /* GS_CAN_FEATURE_BT_CONST_EXT BIT(10) */ 137 136 /* GS_CAN_FEATURE_TERMINATION BIT(11) */ 137 + #define GS_CAN_MODE_BERR_REPORTING BIT(12) 138 + /* GS_CAN_FEATURE_GET_STATE BIT(13) */ 138 139 139 140 struct gs_device_mode { 140 141 __le32 mode; ··· 177 174 #define GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX BIT(9) 178 175 #define GS_CAN_FEATURE_BT_CONST_EXT BIT(10) 179 176 #define GS_CAN_FEATURE_TERMINATION BIT(11) 180 - #define GS_CAN_FEATURE_MASK GENMASK(11, 0) 177 + #define GS_CAN_FEATURE_BERR_REPORTING BIT(12) 178 + #define GS_CAN_FEATURE_GET_STATE BIT(13) 179 + #define GS_CAN_FEATURE_MASK GENMASK(13, 0) 181 180 182 181 /* internal quirks - keep in GS_CAN_FEATURE space for now */ 183 182 ··· 848 843 849 844 ctrlmode = dev->can.ctrlmode; 850 845 if (ctrlmode & CAN_CTRLMODE_FD) { 851 - flags |= GS_CAN_MODE_FD; 852 - 853 846 if (dev->feature & GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX) 854 847 dev->hf_size_tx = struct_size(hf, canfd_quirk, 1); 855 848 else ··· 914 911 /* flags */ 915 912 if (ctrlmode & CAN_CTRLMODE_LOOPBACK) 916 913 flags |= GS_CAN_MODE_LOOP_BACK; 917 - else if (ctrlmode & CAN_CTRLMODE_LISTENONLY) 918 - flags |= GS_CAN_MODE_LISTEN_ONLY; 919 914 920 - /* Controller is not allowed to retry TX 921 - * this mode is unavailable on atmels uc3c hardware 922 - */ 923 - if (ctrlmode & CAN_CTRLMODE_ONE_SHOT) 924 - flags |= GS_CAN_MODE_ONE_SHOT; 915 + if (ctrlmode & CAN_CTRLMODE_LISTENONLY) 916 + flags |= GS_CAN_MODE_LISTEN_ONLY; 925 917 926 918 if (ctrlmode & CAN_CTRLMODE_3_SAMPLES) 927 919 flags |= GS_CAN_MODE_TRIPLE_SAMPLE; 928 920 921 + if (ctrlmode & CAN_CTRLMODE_ONE_SHOT) 922 + flags |= GS_CAN_MODE_ONE_SHOT; 923 + 924 + if (ctrlmode & CAN_CTRLMODE_BERR_REPORTING) 925 + flags |= GS_CAN_MODE_BERR_REPORTING; 926 + 927 + if (ctrlmode & CAN_CTRLMODE_FD) 928 + flags |= GS_CAN_MODE_FD; 929 + 929 930 /* if hardware supports timestamps, enable it */ 930 - if (dev->feature & GS_CAN_FEATURE_HW_TIMESTAMP) 931 + if (dev->feature & GS_CAN_FEATURE_HW_TIMESTAMP) { 931 932 flags |= GS_CAN_MODE_HW_TIMESTAMP; 932 933 933 - /* start polling timestamp */ 934 - if (dev->feature & GS_CAN_FEATURE_HW_TIMESTAMP) 934 + /* start polling timestamp */ 935 935 gs_usb_timestamp_init(dev); 936 + } 936 937 937 938 /* finally start device */ 938 939 dev->can.state = CAN_STATE_ERROR_ACTIVE; ··· 959 952 netif_start_queue(netdev); 960 953 961 954 return 0; 955 + } 956 + 957 + static int gs_usb_get_state(const struct net_device *netdev, 958 + struct can_berr_counter *bec, 959 + enum can_state *state) 960 + { 961 + struct gs_can *dev = netdev_priv(netdev); 962 + struct gs_device_state ds; 963 + int rc; 964 + 965 + rc = usb_control_msg_recv(interface_to_usbdev(dev->iface), 0, 966 + GS_USB_BREQ_GET_STATE, 967 + USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, 968 + dev->channel, 0, 969 + &ds, sizeof(ds), 970 + USB_CTRL_GET_TIMEOUT, 971 + GFP_KERNEL); 972 + if (rc) 973 + return rc; 974 + 975 + if (le32_to_cpu(ds.state) >= CAN_STATE_MAX) 976 + return -EOPNOTSUPP; 977 + 978 + *state = le32_to_cpu(ds.state); 979 + bec->txerr = le32_to_cpu(ds.txerr); 980 + bec->rxerr = le32_to_cpu(ds.rxerr); 981 + 982 + return 0; 983 + } 984 + 985 + static int gs_usb_can_get_berr_counter(const struct net_device *netdev, 986 + struct can_berr_counter *bec) 987 + { 988 + enum can_state state; 989 + 990 + return gs_usb_get_state(netdev, bec, &state); 962 991 } 963 992 964 993 static int gs_can_close(struct net_device *netdev) ··· 1196 1153 netdev->ethtool_ops = &gs_usb_ethtool_ops; 1197 1154 1198 1155 netdev->flags |= IFF_ECHO; /* we support full roundtrip echo */ 1156 + netdev->dev_id = channel; 1199 1157 1200 1158 /* dev setup */ 1201 1159 strcpy(dev->bt_const.name, KBUILD_MODNAME); ··· 1267 1223 dev->can.do_set_termination = gs_usb_set_termination; 1268 1224 } 1269 1225 } 1226 + 1227 + if (feature & GS_CAN_FEATURE_BERR_REPORTING) 1228 + dev->can.ctrlmode_supported |= CAN_CTRLMODE_BERR_REPORTING; 1229 + 1230 + if (feature & GS_CAN_FEATURE_GET_STATE) 1231 + dev->can.do_get_berr_counter = gs_usb_can_get_berr_counter; 1270 1232 1271 1233 /* The CANtact Pro from LinkLayer Labs is based on the 1272 1234 * LPC54616 µC, which is affected by the NXP LPC USB transfer
-5
drivers/net/can/usb/kvaser_usb/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0-only 2 2 obj-$(CONFIG_CAN_KVASER_USB) += kvaser_usb.o 3 3 kvaser_usb-y = kvaser_usb_core.o kvaser_usb_leaf.o kvaser_usb_hydra.o 4 - 5 - # FIXME: temporarily silence -Warray-bounds on non W=1+ builds 6 - ifndef KBUILD_EXTRA_WARN 7 - CFLAGS_kvaser_usb_hydra.o += -Wno-array-bounds 8 - endif
+27 -3
drivers/net/can/usb/kvaser_usb/kvaser_usb.h
··· 76 76 u32 echo_index; 77 77 }; 78 78 79 + struct kvaser_usb_busparams { 80 + __le32 bitrate; 81 + u8 tseg1; 82 + u8 tseg2; 83 + u8 sjw; 84 + u8 nsamples; 85 + } __packed; 86 + 79 87 struct kvaser_usb { 80 88 struct usb_device *udev; 81 89 struct usb_interface *intf; ··· 112 104 struct can_priv can; 113 105 struct can_berr_counter bec; 114 106 107 + /* subdriver-specific data */ 108 + void *sub_priv; 109 + 115 110 struct kvaser_usb *dev; 116 111 struct net_device *netdev; 117 112 int channel; 118 113 119 - struct completion start_comp, stop_comp, flush_comp; 114 + struct completion start_comp, stop_comp, flush_comp, 115 + get_busparams_comp; 120 116 struct usb_anchor tx_submitted; 117 + 118 + struct kvaser_usb_busparams busparams_nominal, busparams_data; 121 119 122 120 spinlock_t tx_contexts_lock; /* lock for active_tx_contexts */ 123 121 int active_tx_contexts; ··· 134 120 * struct kvaser_usb_dev_ops - Device specific functions 135 121 * @dev_set_mode: used for can.do_set_mode 136 122 * @dev_set_bittiming: used for can.do_set_bittiming 123 + * @dev_get_busparams: readback arbitration busparams 137 124 * @dev_set_data_bittiming: used for can.do_set_data_bittiming 125 + * @dev_get_data_busparams: readback data busparams 138 126 * @dev_get_berr_counter: used for can.do_get_berr_counter 139 127 * 140 128 * @dev_setup_endpoints: setup USB in and out endpoints 141 129 * @dev_init_card: initialize card 130 + * @dev_init_channel: initialize channel 131 + * @dev_remove_channel: uninitialize channel 142 132 * @dev_get_software_info: get software info 143 133 * @dev_get_software_details: get software details 144 134 * @dev_get_card_info: get card info ··· 158 140 */ 159 141 struct kvaser_usb_dev_ops { 160 142 int (*dev_set_mode)(struct net_device *netdev, enum can_mode mode); 161 - int (*dev_set_bittiming)(struct net_device *netdev); 162 - int (*dev_set_data_bittiming)(struct net_device *netdev); 143 + int (*dev_set_bittiming)(const struct net_device *netdev, 144 + const struct kvaser_usb_busparams *busparams); 145 + int (*dev_get_busparams)(struct kvaser_usb_net_priv *priv); 146 + int (*dev_set_data_bittiming)(const struct net_device *netdev, 147 + const struct kvaser_usb_busparams *busparams); 148 + int (*dev_get_data_busparams)(struct kvaser_usb_net_priv *priv); 163 149 int (*dev_get_berr_counter)(const struct net_device *netdev, 164 150 struct can_berr_counter *bec); 165 151 int (*dev_setup_endpoints)(struct kvaser_usb *dev); 166 152 int (*dev_init_card)(struct kvaser_usb *dev); 153 + int (*dev_init_channel)(struct kvaser_usb_net_priv *priv); 154 + void (*dev_remove_channel)(struct kvaser_usb_net_priv *priv); 167 155 int (*dev_get_software_info)(struct kvaser_usb *dev); 168 156 int (*dev_get_software_details)(struct kvaser_usb *dev); 169 157 int (*dev_get_card_info)(struct kvaser_usb *dev);
+106 -9
drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c
··· 440 440 if (err) 441 441 return err; 442 442 443 - err = kvaser_usb_setup_rx_urbs(dev); 444 - if (err) 445 - goto error; 446 - 447 443 err = ops->dev_set_opt_mode(priv); 448 444 if (err) 449 445 goto error; ··· 528 532 close_candev(priv->netdev); 529 533 530 534 return 0; 535 + } 536 + 537 + static int kvaser_usb_set_bittiming(struct net_device *netdev) 538 + { 539 + struct kvaser_usb_net_priv *priv = netdev_priv(netdev); 540 + struct kvaser_usb *dev = priv->dev; 541 + const struct kvaser_usb_dev_ops *ops = dev->driver_info->ops; 542 + struct can_bittiming *bt = &priv->can.bittiming; 543 + 544 + struct kvaser_usb_busparams busparams; 545 + int tseg1 = bt->prop_seg + bt->phase_seg1; 546 + int tseg2 = bt->phase_seg2; 547 + int sjw = bt->sjw; 548 + int err = -EOPNOTSUPP; 549 + 550 + busparams.bitrate = cpu_to_le32(bt->bitrate); 551 + busparams.sjw = (u8)sjw; 552 + busparams.tseg1 = (u8)tseg1; 553 + busparams.tseg2 = (u8)tseg2; 554 + if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) 555 + busparams.nsamples = 3; 556 + else 557 + busparams.nsamples = 1; 558 + 559 + err = ops->dev_set_bittiming(netdev, &busparams); 560 + if (err) 561 + return err; 562 + 563 + err = kvaser_usb_setup_rx_urbs(priv->dev); 564 + if (err) 565 + return err; 566 + 567 + err = ops->dev_get_busparams(priv); 568 + if (err) { 569 + /* Treat EOPNOTSUPP as success */ 570 + if (err == -EOPNOTSUPP) 571 + err = 0; 572 + return err; 573 + } 574 + 575 + if (memcmp(&busparams, &priv->busparams_nominal, 576 + sizeof(priv->busparams_nominal)) != 0) 577 + err = -EINVAL; 578 + 579 + return err; 580 + } 581 + 582 + static int kvaser_usb_set_data_bittiming(struct net_device *netdev) 583 + { 584 + struct kvaser_usb_net_priv *priv = netdev_priv(netdev); 585 + struct kvaser_usb *dev = priv->dev; 586 + const struct kvaser_usb_dev_ops *ops = dev->driver_info->ops; 587 + struct can_bittiming *dbt = &priv->can.data_bittiming; 588 + 589 + struct kvaser_usb_busparams busparams; 590 + int tseg1 = dbt->prop_seg + dbt->phase_seg1; 591 + int tseg2 = dbt->phase_seg2; 592 + int sjw = dbt->sjw; 593 + int err; 594 + 595 + if (!ops->dev_set_data_bittiming || 596 + !ops->dev_get_data_busparams) 597 + return -EOPNOTSUPP; 598 + 599 + busparams.bitrate = cpu_to_le32(dbt->bitrate); 600 + busparams.sjw = (u8)sjw; 601 + busparams.tseg1 = (u8)tseg1; 602 + busparams.tseg2 = (u8)tseg2; 603 + busparams.nsamples = 1; 604 + 605 + err = ops->dev_set_data_bittiming(netdev, &busparams); 606 + if (err) 607 + return err; 608 + 609 + err = kvaser_usb_setup_rx_urbs(priv->dev); 610 + if (err) 611 + return err; 612 + 613 + err = ops->dev_get_data_busparams(priv); 614 + if (err) 615 + return err; 616 + 617 + if (memcmp(&busparams, &priv->busparams_data, 618 + sizeof(priv->busparams_data)) != 0) 619 + err = -EINVAL; 620 + 621 + return err; 531 622 } 532 623 533 624 static void kvaser_usb_write_bulk_callback(struct urb *urb) ··· 767 684 768 685 static void kvaser_usb_remove_interfaces(struct kvaser_usb *dev) 769 686 { 687 + const struct kvaser_usb_dev_ops *ops = dev->driver_info->ops; 770 688 int i; 771 689 772 690 for (i = 0; i < dev->nchannels; i++) { ··· 782 698 for (i = 0; i < dev->nchannels; i++) { 783 699 if (!dev->nets[i]) 784 700 continue; 701 + 702 + if (ops->dev_remove_channel) 703 + ops->dev_remove_channel(dev->nets[i]); 785 704 786 705 free_candev(dev->nets[i]->netdev); 787 706 } ··· 817 730 init_completion(&priv->start_comp); 818 731 init_completion(&priv->stop_comp); 819 732 init_completion(&priv->flush_comp); 733 + init_completion(&priv->get_busparams_comp); 820 734 priv->can.ctrlmode_supported = 0; 821 735 822 736 priv->dev = dev; ··· 830 742 priv->can.state = CAN_STATE_STOPPED; 831 743 priv->can.clock.freq = dev->cfg->clock.freq; 832 744 priv->can.bittiming_const = dev->cfg->bittiming_const; 833 - priv->can.do_set_bittiming = ops->dev_set_bittiming; 745 + priv->can.do_set_bittiming = kvaser_usb_set_bittiming; 834 746 priv->can.do_set_mode = ops->dev_set_mode; 835 747 if ((driver_info->quirks & KVASER_USB_QUIRK_HAS_TXRX_ERRORS) || 836 748 (priv->dev->card_data.capabilities & KVASER_USB_CAP_BERR_CAP)) ··· 842 754 843 755 if (priv->can.ctrlmode_supported & CAN_CTRLMODE_FD) { 844 756 priv->can.data_bittiming_const = dev->cfg->data_bittiming_const; 845 - priv->can.do_set_data_bittiming = ops->dev_set_data_bittiming; 757 + priv->can.do_set_data_bittiming = kvaser_usb_set_data_bittiming; 846 758 } 847 759 848 760 netdev->flags |= IFF_ECHO; ··· 860 772 861 773 dev->nets[channel] = priv; 862 774 775 + if (ops->dev_init_channel) { 776 + err = ops->dev_init_channel(priv); 777 + if (err) 778 + goto err; 779 + } 780 + 863 781 err = register_candev(netdev); 864 782 if (err) { 865 783 dev_err(&dev->intf->dev, "Failed to register CAN device\n"); 866 - free_candev(netdev); 867 - dev->nets[channel] = NULL; 868 - return err; 784 + goto err; 869 785 } 870 786 871 787 netdev_dbg(netdev, "device registered\n"); 872 788 873 789 return 0; 790 + 791 + err: 792 + free_candev(netdev); 793 + dev->nets[channel] = NULL; 794 + return err; 874 795 } 875 796 876 797 static int kvaser_usb_probe(struct usb_interface *intf,
+130 -30
drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c
··· 45 45 46 46 /* Minihydra command IDs */ 47 47 #define CMD_SET_BUSPARAMS_REQ 16 48 + #define CMD_GET_BUSPARAMS_REQ 17 49 + #define CMD_GET_BUSPARAMS_RESP 18 48 50 #define CMD_GET_CHIP_STATE_REQ 19 49 51 #define CMD_CHIP_STATE_EVENT 20 50 52 #define CMD_SET_DRIVERMODE_REQ 21 ··· 198 196 #define KVASER_USB_HYDRA_BUS_MODE_CANFD_ISO 0x01 199 197 #define KVASER_USB_HYDRA_BUS_MODE_NONISO 0x02 200 198 struct kvaser_cmd_set_busparams { 201 - __le32 bitrate; 202 - u8 tseg1; 203 - u8 tseg2; 204 - u8 sjw; 205 - u8 nsamples; 199 + struct kvaser_usb_busparams busparams_nominal; 206 200 u8 reserved0[4]; 207 - __le32 bitrate_d; 208 - u8 tseg1_d; 209 - u8 tseg2_d; 210 - u8 sjw_d; 211 - u8 nsamples_d; 201 + struct kvaser_usb_busparams busparams_data; 212 202 u8 canfd_mode; 213 203 u8 reserved1[7]; 204 + } __packed; 205 + 206 + /* Busparam type */ 207 + #define KVASER_USB_HYDRA_BUSPARAM_TYPE_CAN 0x00 208 + #define KVASER_USB_HYDRA_BUSPARAM_TYPE_CANFD 0x01 209 + struct kvaser_cmd_get_busparams_req { 210 + u8 type; 211 + u8 reserved[27]; 212 + } __packed; 213 + 214 + struct kvaser_cmd_get_busparams_res { 215 + struct kvaser_usb_busparams busparams; 216 + u8 reserved[20]; 214 217 } __packed; 215 218 216 219 /* Ctrl modes */ ··· 288 281 struct kvaser_cmd_error_event error_event; 289 282 290 283 struct kvaser_cmd_set_busparams set_busparams_req; 284 + struct kvaser_cmd_get_busparams_req get_busparams_req; 285 + struct kvaser_cmd_get_busparams_res get_busparams_res; 291 286 292 287 struct kvaser_cmd_chip_state_event chip_state_event; 293 288 ··· 371 362 struct kvaser_cmd_ext_tx_ack tx_ack; 372 363 } __packed; 373 364 } __packed; 365 + 366 + struct kvaser_usb_net_hydra_priv { 367 + int pending_get_busparams_type; 368 + }; 374 369 375 370 static const struct can_bittiming_const kvaser_usb_hydra_kcan_bittiming_c = { 376 371 .name = "kvaser_usb_kcan", ··· 851 838 return; 852 839 853 840 complete(&priv->flush_comp); 841 + } 842 + 843 + static void kvaser_usb_hydra_get_busparams_reply(const struct kvaser_usb *dev, 844 + const struct kvaser_cmd *cmd) 845 + { 846 + struct kvaser_usb_net_priv *priv; 847 + struct kvaser_usb_net_hydra_priv *hydra; 848 + 849 + priv = kvaser_usb_hydra_net_priv_from_cmd(dev, cmd); 850 + if (!priv) 851 + return; 852 + 853 + hydra = priv->sub_priv; 854 + if (!hydra) 855 + return; 856 + 857 + switch (hydra->pending_get_busparams_type) { 858 + case KVASER_USB_HYDRA_BUSPARAM_TYPE_CAN: 859 + memcpy(&priv->busparams_nominal, &cmd->get_busparams_res.busparams, 860 + sizeof(priv->busparams_nominal)); 861 + break; 862 + case KVASER_USB_HYDRA_BUSPARAM_TYPE_CANFD: 863 + memcpy(&priv->busparams_data, &cmd->get_busparams_res.busparams, 864 + sizeof(priv->busparams_nominal)); 865 + break; 866 + default: 867 + dev_warn(&dev->intf->dev, "Unknown get_busparams_type %d\n", 868 + hydra->pending_get_busparams_type); 869 + break; 870 + } 871 + hydra->pending_get_busparams_type = -1; 872 + 873 + complete(&priv->get_busparams_comp); 854 874 } 855 875 856 876 static void ··· 1372 1326 kvaser_usb_hydra_state_event(dev, cmd); 1373 1327 break; 1374 1328 1329 + case CMD_GET_BUSPARAMS_RESP: 1330 + kvaser_usb_hydra_get_busparams_reply(dev, cmd); 1331 + break; 1332 + 1375 1333 case CMD_ERROR_EVENT: 1376 1334 kvaser_usb_hydra_error_event(dev, cmd); 1377 1335 break; ··· 1572 1522 return err; 1573 1523 } 1574 1524 1575 - static int kvaser_usb_hydra_set_bittiming(struct net_device *netdev) 1525 + static int kvaser_usb_hydra_get_busparams(struct kvaser_usb_net_priv *priv, 1526 + int busparams_type) 1527 + { 1528 + struct kvaser_usb *dev = priv->dev; 1529 + struct kvaser_usb_net_hydra_priv *hydra = priv->sub_priv; 1530 + struct kvaser_cmd *cmd; 1531 + int err; 1532 + 1533 + if (!hydra) 1534 + return -EINVAL; 1535 + 1536 + cmd = kcalloc(1, sizeof(struct kvaser_cmd), GFP_KERNEL); 1537 + if (!cmd) 1538 + return -ENOMEM; 1539 + 1540 + cmd->header.cmd_no = CMD_GET_BUSPARAMS_REQ; 1541 + kvaser_usb_hydra_set_cmd_dest_he 1542 + (cmd, dev->card_data.hydra.channel_to_he[priv->channel]); 1543 + kvaser_usb_hydra_set_cmd_transid 1544 + (cmd, kvaser_usb_hydra_get_next_transid(dev)); 1545 + cmd->get_busparams_req.type = busparams_type; 1546 + hydra->pending_get_busparams_type = busparams_type; 1547 + 1548 + reinit_completion(&priv->get_busparams_comp); 1549 + 1550 + err = kvaser_usb_send_cmd(dev, cmd, kvaser_usb_hydra_cmd_size(cmd)); 1551 + if (err) 1552 + return err; 1553 + 1554 + if (!wait_for_completion_timeout(&priv->get_busparams_comp, 1555 + msecs_to_jiffies(KVASER_USB_TIMEOUT))) 1556 + return -ETIMEDOUT; 1557 + 1558 + return err; 1559 + } 1560 + 1561 + static int kvaser_usb_hydra_get_nominal_busparams(struct kvaser_usb_net_priv *priv) 1562 + { 1563 + return kvaser_usb_hydra_get_busparams(priv, KVASER_USB_HYDRA_BUSPARAM_TYPE_CAN); 1564 + } 1565 + 1566 + static int kvaser_usb_hydra_get_data_busparams(struct kvaser_usb_net_priv *priv) 1567 + { 1568 + return kvaser_usb_hydra_get_busparams(priv, KVASER_USB_HYDRA_BUSPARAM_TYPE_CANFD); 1569 + } 1570 + 1571 + static int kvaser_usb_hydra_set_bittiming(const struct net_device *netdev, 1572 + const struct kvaser_usb_busparams *busparams) 1576 1573 { 1577 1574 struct kvaser_cmd *cmd; 1578 1575 struct kvaser_usb_net_priv *priv = netdev_priv(netdev); 1579 - struct can_bittiming *bt = &priv->can.bittiming; 1580 1576 struct kvaser_usb *dev = priv->dev; 1581 - int tseg1 = bt->prop_seg + bt->phase_seg1; 1582 - int tseg2 = bt->phase_seg2; 1583 - int sjw = bt->sjw; 1584 1577 int err; 1585 1578 1586 1579 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); ··· 1631 1538 return -ENOMEM; 1632 1539 1633 1540 cmd->header.cmd_no = CMD_SET_BUSPARAMS_REQ; 1634 - cmd->set_busparams_req.bitrate = cpu_to_le32(bt->bitrate); 1635 - cmd->set_busparams_req.sjw = (u8)sjw; 1636 - cmd->set_busparams_req.tseg1 = (u8)tseg1; 1637 - cmd->set_busparams_req.tseg2 = (u8)tseg2; 1638 - cmd->set_busparams_req.nsamples = 1; 1541 + memcpy(&cmd->set_busparams_req.busparams_nominal, busparams, 1542 + sizeof(cmd->set_busparams_req.busparams_nominal)); 1639 1543 1640 1544 kvaser_usb_hydra_set_cmd_dest_he 1641 1545 (cmd, dev->card_data.hydra.channel_to_he[priv->channel]); ··· 1646 1556 return err; 1647 1557 } 1648 1558 1649 - static int kvaser_usb_hydra_set_data_bittiming(struct net_device *netdev) 1559 + static int kvaser_usb_hydra_set_data_bittiming(const struct net_device *netdev, 1560 + const struct kvaser_usb_busparams *busparams) 1650 1561 { 1651 1562 struct kvaser_cmd *cmd; 1652 1563 struct kvaser_usb_net_priv *priv = netdev_priv(netdev); 1653 - struct can_bittiming *dbt = &priv->can.data_bittiming; 1654 1564 struct kvaser_usb *dev = priv->dev; 1655 - int tseg1 = dbt->prop_seg + dbt->phase_seg1; 1656 - int tseg2 = dbt->phase_seg2; 1657 - int sjw = dbt->sjw; 1658 1565 int err; 1659 1566 1660 1567 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); ··· 1659 1572 return -ENOMEM; 1660 1573 1661 1574 cmd->header.cmd_no = CMD_SET_BUSPARAMS_FD_REQ; 1662 - cmd->set_busparams_req.bitrate_d = cpu_to_le32(dbt->bitrate); 1663 - cmd->set_busparams_req.sjw_d = (u8)sjw; 1664 - cmd->set_busparams_req.tseg1_d = (u8)tseg1; 1665 - cmd->set_busparams_req.tseg2_d = (u8)tseg2; 1666 - cmd->set_busparams_req.nsamples_d = 1; 1575 + memcpy(&cmd->set_busparams_req.busparams_data, busparams, 1576 + sizeof(cmd->set_busparams_req.busparams_data)); 1667 1577 1668 1578 if (priv->can.ctrlmode & CAN_CTRLMODE_FD) { 1669 1579 if (priv->can.ctrlmode & CAN_CTRLMODE_FD_NON_ISO) ··· 1763 1679 "CMD_MAP_CHANNEL_REQ failed for SYSDBG\n"); 1764 1680 return err; 1765 1681 } 1682 + 1683 + return 0; 1684 + } 1685 + 1686 + static int kvaser_usb_hydra_init_channel(struct kvaser_usb_net_priv *priv) 1687 + { 1688 + struct kvaser_usb_net_hydra_priv *hydra; 1689 + 1690 + hydra = devm_kzalloc(&priv->dev->intf->dev, sizeof(*hydra), GFP_KERNEL); 1691 + if (!hydra) 1692 + return -ENOMEM; 1693 + 1694 + priv->sub_priv = hydra; 1766 1695 1767 1696 return 0; 1768 1697 } ··· 2124 2027 const struct kvaser_usb_dev_ops kvaser_usb_hydra_dev_ops = { 2125 2028 .dev_set_mode = kvaser_usb_hydra_set_mode, 2126 2029 .dev_set_bittiming = kvaser_usb_hydra_set_bittiming, 2030 + .dev_get_busparams = kvaser_usb_hydra_get_nominal_busparams, 2127 2031 .dev_set_data_bittiming = kvaser_usb_hydra_set_data_bittiming, 2032 + .dev_get_data_busparams = kvaser_usb_hydra_get_data_busparams, 2128 2033 .dev_get_berr_counter = kvaser_usb_hydra_get_berr_counter, 2129 2034 .dev_setup_endpoints = kvaser_usb_hydra_setup_endpoints, 2130 2035 .dev_init_card = kvaser_usb_hydra_init_card, 2036 + .dev_init_channel = kvaser_usb_hydra_init_channel, 2131 2037 .dev_get_software_info = kvaser_usb_hydra_get_software_info, 2132 2038 .dev_get_software_details = kvaser_usb_hydra_get_software_details, 2133 2039 .dev_get_card_info = kvaser_usb_hydra_get_card_info,
+415 -49
drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c
··· 21 21 #include <linux/types.h> 22 22 #include <linux/units.h> 23 23 #include <linux/usb.h> 24 + #include <linux/workqueue.h> 24 25 25 26 #include <linux/can.h> 26 27 #include <linux/can/dev.h> ··· 57 56 #define CMD_RX_EXT_MESSAGE 14 58 57 #define CMD_TX_EXT_MESSAGE 15 59 58 #define CMD_SET_BUS_PARAMS 16 59 + #define CMD_GET_BUS_PARAMS 17 60 + #define CMD_GET_BUS_PARAMS_REPLY 18 61 + #define CMD_GET_CHIP_STATE 19 60 62 #define CMD_CHIP_STATE_EVENT 20 61 63 #define CMD_SET_CTRL_MODE 21 62 64 #define CMD_RESET_CHIP 24 ··· 74 70 #define CMD_GET_CARD_INFO_REPLY 35 75 71 #define CMD_GET_SOFTWARE_INFO 38 76 72 #define CMD_GET_SOFTWARE_INFO_REPLY 39 73 + #define CMD_ERROR_EVENT 45 77 74 #define CMD_FLUSH_QUEUE 48 78 75 #define CMD_TX_ACKNOWLEDGE 50 79 76 #define CMD_CAN_ERROR_EVENT 51 80 77 #define CMD_FLUSH_QUEUE_REPLY 68 78 + #define CMD_GET_CAPABILITIES_REQ 95 79 + #define CMD_GET_CAPABILITIES_RESP 96 81 80 82 81 #define CMD_LEAF_LOG_MESSAGE 106 83 82 ··· 89 82 #define KVASER_USB_LEAF_SWOPTION_FREQ_16_MHZ_CLK 0 90 83 #define KVASER_USB_LEAF_SWOPTION_FREQ_32_MHZ_CLK BIT(5) 91 84 #define KVASER_USB_LEAF_SWOPTION_FREQ_24_MHZ_CLK BIT(6) 85 + 86 + #define KVASER_USB_LEAF_SWOPTION_EXT_CAP BIT(12) 92 87 93 88 /* error factors */ 94 89 #define M16C_EF_ACKE BIT(0) ··· 166 157 struct kvaser_cmd_busparams { 167 158 u8 tid; 168 159 u8 channel; 169 - __le32 bitrate; 170 - u8 tseg1; 171 - u8 tseg2; 172 - u8 sjw; 173 - u8 no_samp; 160 + struct kvaser_usb_busparams busparams; 174 161 } __packed; 175 162 176 163 struct kvaser_cmd_tx_can { ··· 235 230 u8 tid; 236 231 } __packed; 237 232 238 - struct leaf_cmd_error_event { 233 + struct leaf_cmd_can_error_event { 239 234 u8 tid; 240 235 u8 flags; 241 236 __le16 time[3]; ··· 247 242 u8 error_factor; 248 243 } __packed; 249 244 250 - struct usbcan_cmd_error_event { 245 + struct usbcan_cmd_can_error_event { 251 246 u8 tid; 252 247 u8 padding; 253 248 u8 tx_errors_count_ch0; ··· 257 252 u8 status_ch0; 258 253 u8 status_ch1; 259 254 __le16 time; 255 + } __packed; 256 + 257 + /* CMD_ERROR_EVENT error codes */ 258 + #define KVASER_USB_LEAF_ERROR_EVENT_TX_QUEUE_FULL 0x8 259 + #define KVASER_USB_LEAF_ERROR_EVENT_PARAM 0x9 260 + 261 + struct leaf_cmd_error_event { 262 + u8 tid; 263 + u8 error_code; 264 + __le16 timestamp[3]; 265 + __le16 padding; 266 + __le16 info1; 267 + __le16 info2; 268 + } __packed; 269 + 270 + struct usbcan_cmd_error_event { 271 + u8 tid; 272 + u8 error_code; 273 + __le16 info1; 274 + __le16 info2; 275 + __le16 timestamp; 276 + __le16 padding; 260 277 } __packed; 261 278 262 279 struct kvaser_cmd_ctrl_mode { ··· 305 278 u8 data[8]; 306 279 } __packed; 307 280 281 + /* Sub commands for cap_req and cap_res */ 282 + #define KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE 0x02 283 + #define KVASER_USB_LEAF_CAP_CMD_ERR_REPORT 0x05 284 + struct kvaser_cmd_cap_req { 285 + __le16 padding0; 286 + __le16 cap_cmd; 287 + __le16 padding1; 288 + __le16 channel; 289 + } __packed; 290 + 291 + /* Status codes for cap_res */ 292 + #define KVASER_USB_LEAF_CAP_STAT_OK 0x00 293 + #define KVASER_USB_LEAF_CAP_STAT_NOT_IMPL 0x01 294 + #define KVASER_USB_LEAF_CAP_STAT_UNAVAIL 0x02 295 + struct kvaser_cmd_cap_res { 296 + __le16 padding; 297 + __le16 cap_cmd; 298 + __le16 status; 299 + __le32 mask; 300 + __le32 value; 301 + } __packed; 302 + 308 303 struct kvaser_cmd { 309 304 u8 len; 310 305 u8 id; ··· 342 293 struct leaf_cmd_softinfo softinfo; 343 294 struct leaf_cmd_rx_can rx_can; 344 295 struct leaf_cmd_chip_state_event chip_state_event; 345 - struct leaf_cmd_error_event error_event; 296 + struct leaf_cmd_can_error_event can_error_event; 346 297 struct leaf_cmd_log_message log_message; 298 + struct leaf_cmd_error_event error_event; 299 + struct kvaser_cmd_cap_req cap_req; 300 + struct kvaser_cmd_cap_res cap_res; 347 301 } __packed leaf; 348 302 349 303 union { 350 304 struct usbcan_cmd_softinfo softinfo; 351 305 struct usbcan_cmd_rx_can rx_can; 352 306 struct usbcan_cmd_chip_state_event chip_state_event; 307 + struct usbcan_cmd_can_error_event can_error_event; 353 308 struct usbcan_cmd_error_event error_event; 354 309 } __packed usbcan; 355 310 ··· 376 323 [CMD_RX_EXT_MESSAGE] = kvaser_fsize(u.leaf.rx_can), 377 324 [CMD_LEAF_LOG_MESSAGE] = kvaser_fsize(u.leaf.log_message), 378 325 [CMD_CHIP_STATE_EVENT] = kvaser_fsize(u.leaf.chip_state_event), 379 - [CMD_CAN_ERROR_EVENT] = kvaser_fsize(u.leaf.error_event), 326 + [CMD_CAN_ERROR_EVENT] = kvaser_fsize(u.leaf.can_error_event), 327 + [CMD_GET_CAPABILITIES_RESP] = kvaser_fsize(u.leaf.cap_res), 328 + [CMD_GET_BUS_PARAMS_REPLY] = kvaser_fsize(u.busparams), 329 + [CMD_ERROR_EVENT] = kvaser_fsize(u.leaf.error_event), 380 330 /* ignored events: */ 381 331 [CMD_FLUSH_QUEUE_REPLY] = CMD_SIZE_ANY, 382 332 }; ··· 393 337 [CMD_RX_STD_MESSAGE] = kvaser_fsize(u.usbcan.rx_can), 394 338 [CMD_RX_EXT_MESSAGE] = kvaser_fsize(u.usbcan.rx_can), 395 339 [CMD_CHIP_STATE_EVENT] = kvaser_fsize(u.usbcan.chip_state_event), 396 - [CMD_CAN_ERROR_EVENT] = kvaser_fsize(u.usbcan.error_event), 340 + [CMD_CAN_ERROR_EVENT] = kvaser_fsize(u.usbcan.can_error_event), 341 + [CMD_ERROR_EVENT] = kvaser_fsize(u.usbcan.error_event), 397 342 /* ignored events: */ 398 343 [CMD_USBCAN_CLOCK_OVERFLOW_EVENT] = CMD_SIZE_ANY, 399 344 }; ··· 420 363 u8 error_state; 421 364 } usbcan; 422 365 }; 366 + }; 367 + 368 + struct kvaser_usb_net_leaf_priv { 369 + struct kvaser_usb_net_priv *net; 370 + 371 + struct delayed_work chip_state_req_work; 372 + 373 + /* started but not reported as bus-on yet */ 374 + bool joining_bus; 423 375 }; 424 376 425 377 static const struct can_bittiming_const kvaser_usb_leaf_m16c_bittiming_const = { ··· 672 606 dev->fw_version = le32_to_cpu(softinfo->fw_version); 673 607 dev->max_tx_urbs = le16_to_cpu(softinfo->max_outstanding_tx); 674 608 609 + if (sw_options & KVASER_USB_LEAF_SWOPTION_EXT_CAP) 610 + dev->card_data.capabilities |= KVASER_USB_CAP_EXT_CAP; 611 + 675 612 if (dev->driver_info->quirks & KVASER_USB_QUIRK_IGNORE_CLK_FREQ) { 676 613 /* Firmware expects bittiming parameters calculated for 16MHz 677 614 * clock, regardless of the actual clock ··· 762 693 return 0; 763 694 } 764 695 696 + static int kvaser_usb_leaf_get_single_capability(struct kvaser_usb *dev, 697 + u16 cap_cmd_req, u16 *status) 698 + { 699 + struct kvaser_usb_dev_card_data *card_data = &dev->card_data; 700 + struct kvaser_cmd *cmd; 701 + u32 value = 0; 702 + u32 mask = 0; 703 + u16 cap_cmd_res; 704 + int err; 705 + int i; 706 + 707 + cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 708 + if (!cmd) 709 + return -ENOMEM; 710 + 711 + cmd->id = CMD_GET_CAPABILITIES_REQ; 712 + cmd->u.leaf.cap_req.cap_cmd = cpu_to_le16(cap_cmd_req); 713 + cmd->len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_cap_req); 714 + 715 + err = kvaser_usb_send_cmd(dev, cmd, cmd->len); 716 + if (err) 717 + goto end; 718 + 719 + err = kvaser_usb_leaf_wait_cmd(dev, CMD_GET_CAPABILITIES_RESP, cmd); 720 + if (err) 721 + goto end; 722 + 723 + *status = le16_to_cpu(cmd->u.leaf.cap_res.status); 724 + 725 + if (*status != KVASER_USB_LEAF_CAP_STAT_OK) 726 + goto end; 727 + 728 + cap_cmd_res = le16_to_cpu(cmd->u.leaf.cap_res.cap_cmd); 729 + switch (cap_cmd_res) { 730 + case KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE: 731 + case KVASER_USB_LEAF_CAP_CMD_ERR_REPORT: 732 + value = le32_to_cpu(cmd->u.leaf.cap_res.value); 733 + mask = le32_to_cpu(cmd->u.leaf.cap_res.mask); 734 + break; 735 + default: 736 + dev_warn(&dev->intf->dev, "Unknown capability command %u\n", 737 + cap_cmd_res); 738 + break; 739 + } 740 + 741 + for (i = 0; i < dev->nchannels; i++) { 742 + if (BIT(i) & (value & mask)) { 743 + switch (cap_cmd_res) { 744 + case KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE: 745 + card_data->ctrlmode_supported |= 746 + CAN_CTRLMODE_LISTENONLY; 747 + break; 748 + case KVASER_USB_LEAF_CAP_CMD_ERR_REPORT: 749 + card_data->capabilities |= 750 + KVASER_USB_CAP_BERR_CAP; 751 + break; 752 + } 753 + } 754 + } 755 + 756 + end: 757 + kfree(cmd); 758 + 759 + return err; 760 + } 761 + 762 + static int kvaser_usb_leaf_get_capabilities_leaf(struct kvaser_usb *dev) 763 + { 764 + int err; 765 + u16 status; 766 + 767 + if (!(dev->card_data.capabilities & KVASER_USB_CAP_EXT_CAP)) { 768 + dev_info(&dev->intf->dev, 769 + "No extended capability support. Upgrade device firmware.\n"); 770 + return 0; 771 + } 772 + 773 + err = kvaser_usb_leaf_get_single_capability(dev, 774 + KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE, 775 + &status); 776 + if (err) 777 + return err; 778 + if (status) 779 + dev_info(&dev->intf->dev, 780 + "KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE failed %u\n", 781 + status); 782 + 783 + err = kvaser_usb_leaf_get_single_capability(dev, 784 + KVASER_USB_LEAF_CAP_CMD_ERR_REPORT, 785 + &status); 786 + if (err) 787 + return err; 788 + if (status) 789 + dev_info(&dev->intf->dev, 790 + "KVASER_USB_LEAF_CAP_CMD_ERR_REPORT failed %u\n", 791 + status); 792 + 793 + return 0; 794 + } 795 + 796 + static int kvaser_usb_leaf_get_capabilities(struct kvaser_usb *dev) 797 + { 798 + int err = 0; 799 + 800 + if (dev->driver_info->family == KVASER_LEAF) 801 + err = kvaser_usb_leaf_get_capabilities_leaf(dev); 802 + 803 + return err; 804 + } 805 + 765 806 static void kvaser_usb_leaf_tx_acknowledge(const struct kvaser_usb *dev, 766 807 const struct kvaser_cmd *cmd) 767 808 { ··· 900 721 context = &priv->tx_contexts[tid % dev->max_tx_urbs]; 901 722 902 723 /* Sometimes the state change doesn't come after a bus-off event */ 903 - if (priv->can.restart_ms && priv->can.state >= CAN_STATE_BUS_OFF) { 724 + if (priv->can.restart_ms && priv->can.state == CAN_STATE_BUS_OFF) { 904 725 struct sk_buff *skb; 905 726 struct can_frame *cf; 906 727 ··· 953 774 return err; 954 775 } 955 776 777 + static void kvaser_usb_leaf_chip_state_req_work(struct work_struct *work) 778 + { 779 + struct kvaser_usb_net_leaf_priv *leaf = 780 + container_of(work, struct kvaser_usb_net_leaf_priv, 781 + chip_state_req_work.work); 782 + struct kvaser_usb_net_priv *priv = leaf->net; 783 + 784 + kvaser_usb_leaf_simple_cmd_async(priv, CMD_GET_CHIP_STATE); 785 + } 786 + 956 787 static void 957 788 kvaser_usb_leaf_rx_error_update_can_state(struct kvaser_usb_net_priv *priv, 958 789 const struct kvaser_usb_err_summary *es, 959 790 struct can_frame *cf) 960 791 { 792 + struct kvaser_usb_net_leaf_priv *leaf = priv->sub_priv; 961 793 struct kvaser_usb *dev = priv->dev; 962 794 struct net_device_stats *stats = &priv->netdev->stats; 963 795 enum can_state cur_state, new_state, tx_state, rx_state; ··· 982 792 new_state = CAN_STATE_BUS_OFF; 983 793 } else if (es->status & M16C_STATE_BUS_PASSIVE) { 984 794 new_state = CAN_STATE_ERROR_PASSIVE; 985 - } else if (es->status & M16C_STATE_BUS_ERROR) { 795 + } else if ((es->status & M16C_STATE_BUS_ERROR) && 796 + cur_state >= CAN_STATE_BUS_OFF) { 986 797 /* Guard against spurious error events after a busoff */ 987 - if (cur_state < CAN_STATE_BUS_OFF) { 988 - if (es->txerr >= 128 || es->rxerr >= 128) 989 - new_state = CAN_STATE_ERROR_PASSIVE; 990 - else if (es->txerr >= 96 || es->rxerr >= 96) 991 - new_state = CAN_STATE_ERROR_WARNING; 992 - else if (cur_state > CAN_STATE_ERROR_ACTIVE) 993 - new_state = CAN_STATE_ERROR_ACTIVE; 994 - } 798 + } else if (es->txerr >= 128 || es->rxerr >= 128) { 799 + new_state = CAN_STATE_ERROR_PASSIVE; 800 + } else if (es->txerr >= 96 || es->rxerr >= 96) { 801 + new_state = CAN_STATE_ERROR_WARNING; 802 + } else { 803 + new_state = CAN_STATE_ERROR_ACTIVE; 995 804 } 996 805 997 - if (!es->status) 998 - new_state = CAN_STATE_ERROR_ACTIVE; 806 + /* 0bfd:0124 FW 4.18.778 was observed to send the initial 807 + * CMD_CHIP_STATE_EVENT after CMD_START_CHIP with M16C_STATE_BUS_OFF 808 + * bit set if the channel was bus-off when it was last stopped (even 809 + * across chip resets). This bit will clear shortly afterwards, without 810 + * triggering a second unsolicited chip state event. 811 + * Ignore this initial bus-off. 812 + */ 813 + if (leaf->joining_bus) { 814 + if (new_state == CAN_STATE_BUS_OFF) { 815 + netdev_dbg(priv->netdev, "ignoring bus-off during startup"); 816 + new_state = cur_state; 817 + } else { 818 + leaf->joining_bus = false; 819 + } 820 + } 999 821 1000 822 if (new_state != cur_state) { 1001 823 tx_state = (es->txerr >= es->rxerr) ? new_state : 0; ··· 1017 815 } 1018 816 1019 817 if (priv->can.restart_ms && 1020 - cur_state >= CAN_STATE_BUS_OFF && 818 + cur_state == CAN_STATE_BUS_OFF && 1021 819 new_state < CAN_STATE_BUS_OFF) 1022 820 priv->can.can_stats.restarts++; 1023 821 ··· 1051 849 struct sk_buff *skb; 1052 850 struct net_device_stats *stats; 1053 851 struct kvaser_usb_net_priv *priv; 852 + struct kvaser_usb_net_leaf_priv *leaf; 1054 853 enum can_state old_state, new_state; 1055 854 1056 855 if (es->channel >= dev->nchannels) { ··· 1061 858 } 1062 859 1063 860 priv = dev->nets[es->channel]; 861 + leaf = priv->sub_priv; 1064 862 stats = &priv->netdev->stats; 863 + 864 + /* Ignore e.g. state change to bus-off reported just after stopping */ 865 + if (!netif_running(priv->netdev)) 866 + return; 1065 867 1066 868 /* Update all of the CAN interface's state and error counters before 1067 869 * trying any memory allocation that can actually fail with -ENOMEM. ··· 1081 873 old_state = priv->can.state; 1082 874 kvaser_usb_leaf_rx_error_update_can_state(priv, es, &tmp_cf); 1083 875 new_state = priv->can.state; 876 + 877 + /* If there are errors, request status updates periodically as we do 878 + * not get automatic notifications of improved state. 879 + * Also request updates if we saw a stale BUS_OFF during startup 880 + * (joining_bus). 881 + */ 882 + if (new_state < CAN_STATE_BUS_OFF && 883 + (es->rxerr || es->txerr || new_state == CAN_STATE_ERROR_PASSIVE || 884 + leaf->joining_bus)) 885 + schedule_delayed_work(&leaf->chip_state_req_work, 886 + msecs_to_jiffies(500)); 1084 887 1085 888 skb = alloc_can_err_skb(priv->netdev, &cf); 1086 889 if (!skb) { ··· 1110 891 } 1111 892 1112 893 if (priv->can.restart_ms && 1113 - old_state >= CAN_STATE_BUS_OFF && 894 + old_state == CAN_STATE_BUS_OFF && 1114 895 new_state < CAN_STATE_BUS_OFF) { 1115 896 cf->can_id |= CAN_ERR_RESTARTED; 1116 897 netif_carrier_on(priv->netdev); ··· 1209 990 1210 991 case CMD_CAN_ERROR_EVENT: 1211 992 es.channel = 0; 1212 - es.status = cmd->u.usbcan.error_event.status_ch0; 1213 - es.txerr = cmd->u.usbcan.error_event.tx_errors_count_ch0; 1214 - es.rxerr = cmd->u.usbcan.error_event.rx_errors_count_ch0; 993 + es.status = cmd->u.usbcan.can_error_event.status_ch0; 994 + es.txerr = cmd->u.usbcan.can_error_event.tx_errors_count_ch0; 995 + es.rxerr = cmd->u.usbcan.can_error_event.rx_errors_count_ch0; 1215 996 es.usbcan.other_ch_status = 1216 - cmd->u.usbcan.error_event.status_ch1; 997 + cmd->u.usbcan.can_error_event.status_ch1; 1217 998 kvaser_usb_leaf_usbcan_conditionally_rx_error(dev, &es); 1218 999 1219 1000 /* The USBCAN firmware supports up to 2 channels. ··· 1221 1002 */ 1222 1003 if (dev->nchannels == MAX_USBCAN_NET_DEVICES) { 1223 1004 es.channel = 1; 1224 - es.status = cmd->u.usbcan.error_event.status_ch1; 1005 + es.status = cmd->u.usbcan.can_error_event.status_ch1; 1225 1006 es.txerr = 1226 - cmd->u.usbcan.error_event.tx_errors_count_ch1; 1007 + cmd->u.usbcan.can_error_event.tx_errors_count_ch1; 1227 1008 es.rxerr = 1228 - cmd->u.usbcan.error_event.rx_errors_count_ch1; 1009 + cmd->u.usbcan.can_error_event.rx_errors_count_ch1; 1229 1010 es.usbcan.other_ch_status = 1230 - cmd->u.usbcan.error_event.status_ch0; 1011 + cmd->u.usbcan.can_error_event.status_ch0; 1231 1012 kvaser_usb_leaf_usbcan_conditionally_rx_error(dev, &es); 1232 1013 } 1233 1014 break; ··· 1244 1025 1245 1026 switch (cmd->id) { 1246 1027 case CMD_CAN_ERROR_EVENT: 1247 - es.channel = cmd->u.leaf.error_event.channel; 1248 - es.status = cmd->u.leaf.error_event.status; 1249 - es.txerr = cmd->u.leaf.error_event.tx_errors_count; 1250 - es.rxerr = cmd->u.leaf.error_event.rx_errors_count; 1251 - es.leaf.error_factor = cmd->u.leaf.error_event.error_factor; 1028 + es.channel = cmd->u.leaf.can_error_event.channel; 1029 + es.status = cmd->u.leaf.can_error_event.status; 1030 + es.txerr = cmd->u.leaf.can_error_event.tx_errors_count; 1031 + es.rxerr = cmd->u.leaf.can_error_event.rx_errors_count; 1032 + es.leaf.error_factor = cmd->u.leaf.can_error_event.error_factor; 1252 1033 break; 1253 1034 case CMD_LEAF_LOG_MESSAGE: 1254 1035 es.channel = cmd->u.leaf.log_message.channel; ··· 1381 1162 netif_rx(skb); 1382 1163 } 1383 1164 1165 + static void kvaser_usb_leaf_error_event_parameter(const struct kvaser_usb *dev, 1166 + const struct kvaser_cmd *cmd) 1167 + { 1168 + u16 info1 = 0; 1169 + 1170 + switch (dev->driver_info->family) { 1171 + case KVASER_LEAF: 1172 + info1 = le16_to_cpu(cmd->u.leaf.error_event.info1); 1173 + break; 1174 + case KVASER_USBCAN: 1175 + info1 = le16_to_cpu(cmd->u.usbcan.error_event.info1); 1176 + break; 1177 + } 1178 + 1179 + /* info1 will contain the offending cmd_no */ 1180 + switch (info1) { 1181 + case CMD_SET_CTRL_MODE: 1182 + dev_warn(&dev->intf->dev, 1183 + "CMD_SET_CTRL_MODE error in parameter\n"); 1184 + break; 1185 + 1186 + case CMD_SET_BUS_PARAMS: 1187 + dev_warn(&dev->intf->dev, 1188 + "CMD_SET_BUS_PARAMS error in parameter\n"); 1189 + break; 1190 + 1191 + default: 1192 + dev_warn(&dev->intf->dev, 1193 + "Unhandled parameter error event cmd_no (%u)\n", 1194 + info1); 1195 + break; 1196 + } 1197 + } 1198 + 1199 + static void kvaser_usb_leaf_error_event(const struct kvaser_usb *dev, 1200 + const struct kvaser_cmd *cmd) 1201 + { 1202 + u8 error_code = 0; 1203 + 1204 + switch (dev->driver_info->family) { 1205 + case KVASER_LEAF: 1206 + error_code = cmd->u.leaf.error_event.error_code; 1207 + break; 1208 + case KVASER_USBCAN: 1209 + error_code = cmd->u.usbcan.error_event.error_code; 1210 + break; 1211 + } 1212 + 1213 + switch (error_code) { 1214 + case KVASER_USB_LEAF_ERROR_EVENT_TX_QUEUE_FULL: 1215 + /* Received additional CAN message, when firmware TX queue is 1216 + * already full. Something is wrong with the driver. 1217 + * This should never happen! 1218 + */ 1219 + dev_err(&dev->intf->dev, 1220 + "Received error event TX_QUEUE_FULL\n"); 1221 + break; 1222 + case KVASER_USB_LEAF_ERROR_EVENT_PARAM: 1223 + kvaser_usb_leaf_error_event_parameter(dev, cmd); 1224 + break; 1225 + 1226 + default: 1227 + dev_warn(&dev->intf->dev, 1228 + "Unhandled error event (%d)\n", error_code); 1229 + break; 1230 + } 1231 + } 1232 + 1384 1233 static void kvaser_usb_leaf_start_chip_reply(const struct kvaser_usb *dev, 1385 1234 const struct kvaser_cmd *cmd) 1386 1235 { ··· 1489 1202 complete(&priv->stop_comp); 1490 1203 } 1491 1204 1205 + static void kvaser_usb_leaf_get_busparams_reply(const struct kvaser_usb *dev, 1206 + const struct kvaser_cmd *cmd) 1207 + { 1208 + struct kvaser_usb_net_priv *priv; 1209 + u8 channel = cmd->u.busparams.channel; 1210 + 1211 + if (channel >= dev->nchannels) { 1212 + dev_err(&dev->intf->dev, 1213 + "Invalid channel number (%d)\n", channel); 1214 + return; 1215 + } 1216 + 1217 + priv = dev->nets[channel]; 1218 + memcpy(&priv->busparams_nominal, &cmd->u.busparams.busparams, 1219 + sizeof(priv->busparams_nominal)); 1220 + 1221 + complete(&priv->get_busparams_comp); 1222 + } 1223 + 1492 1224 static void kvaser_usb_leaf_handle_command(const struct kvaser_usb *dev, 1493 1225 const struct kvaser_cmd *cmd) 1494 1226 { ··· 1544 1238 1545 1239 case CMD_TX_ACKNOWLEDGE: 1546 1240 kvaser_usb_leaf_tx_acknowledge(dev, cmd); 1241 + break; 1242 + 1243 + case CMD_ERROR_EVENT: 1244 + kvaser_usb_leaf_error_event(dev, cmd); 1245 + break; 1246 + 1247 + case CMD_GET_BUS_PARAMS_REPLY: 1248 + kvaser_usb_leaf_get_busparams_reply(dev, cmd); 1547 1249 break; 1548 1250 1549 1251 /* Ignored commands */ ··· 1632 1318 1633 1319 static int kvaser_usb_leaf_start_chip(struct kvaser_usb_net_priv *priv) 1634 1320 { 1321 + struct kvaser_usb_net_leaf_priv *leaf = priv->sub_priv; 1635 1322 int err; 1323 + 1324 + leaf->joining_bus = true; 1636 1325 1637 1326 init_completion(&priv->start_comp); 1638 1327 ··· 1653 1336 1654 1337 static int kvaser_usb_leaf_stop_chip(struct kvaser_usb_net_priv *priv) 1655 1338 { 1339 + struct kvaser_usb_net_leaf_priv *leaf = priv->sub_priv; 1656 1340 int err; 1657 1341 1658 1342 init_completion(&priv->stop_comp); 1343 + 1344 + cancel_delayed_work(&leaf->chip_state_req_work); 1659 1345 1660 1346 err = kvaser_usb_leaf_send_simple_cmd(priv->dev, CMD_STOP_CHIP, 1661 1347 priv->channel); ··· 1706 1386 return 0; 1707 1387 } 1708 1388 1709 - static int kvaser_usb_leaf_set_bittiming(struct net_device *netdev) 1389 + static int kvaser_usb_leaf_init_channel(struct kvaser_usb_net_priv *priv) 1390 + { 1391 + struct kvaser_usb_net_leaf_priv *leaf; 1392 + 1393 + leaf = devm_kzalloc(&priv->dev->intf->dev, sizeof(*leaf), GFP_KERNEL); 1394 + if (!leaf) 1395 + return -ENOMEM; 1396 + 1397 + leaf->net = priv; 1398 + INIT_DELAYED_WORK(&leaf->chip_state_req_work, 1399 + kvaser_usb_leaf_chip_state_req_work); 1400 + 1401 + priv->sub_priv = leaf; 1402 + 1403 + return 0; 1404 + } 1405 + 1406 + static void kvaser_usb_leaf_remove_channel(struct kvaser_usb_net_priv *priv) 1407 + { 1408 + struct kvaser_usb_net_leaf_priv *leaf = priv->sub_priv; 1409 + 1410 + if (leaf) 1411 + cancel_delayed_work_sync(&leaf->chip_state_req_work); 1412 + } 1413 + 1414 + static int kvaser_usb_leaf_set_bittiming(const struct net_device *netdev, 1415 + const struct kvaser_usb_busparams *busparams) 1710 1416 { 1711 1417 struct kvaser_usb_net_priv *priv = netdev_priv(netdev); 1712 - struct can_bittiming *bt = &priv->can.bittiming; 1713 1418 struct kvaser_usb *dev = priv->dev; 1714 1419 struct kvaser_cmd *cmd; 1715 1420 int rc; ··· 1747 1402 cmd->len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_busparams); 1748 1403 cmd->u.busparams.channel = priv->channel; 1749 1404 cmd->u.busparams.tid = 0xff; 1750 - cmd->u.busparams.bitrate = cpu_to_le32(bt->bitrate); 1751 - cmd->u.busparams.sjw = bt->sjw; 1752 - cmd->u.busparams.tseg1 = bt->prop_seg + bt->phase_seg1; 1753 - cmd->u.busparams.tseg2 = bt->phase_seg2; 1754 - 1755 - if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) 1756 - cmd->u.busparams.no_samp = 3; 1757 - else 1758 - cmd->u.busparams.no_samp = 1; 1405 + memcpy(&cmd->u.busparams.busparams, busparams, 1406 + sizeof(cmd->u.busparams.busparams)); 1759 1407 1760 1408 rc = kvaser_usb_send_cmd(dev, cmd, cmd->len); 1761 1409 ··· 1756 1418 return rc; 1757 1419 } 1758 1420 1421 + static int kvaser_usb_leaf_get_busparams(struct kvaser_usb_net_priv *priv) 1422 + { 1423 + int err; 1424 + 1425 + if (priv->dev->driver_info->family == KVASER_USBCAN) 1426 + return -EOPNOTSUPP; 1427 + 1428 + reinit_completion(&priv->get_busparams_comp); 1429 + 1430 + err = kvaser_usb_leaf_send_simple_cmd(priv->dev, CMD_GET_BUS_PARAMS, 1431 + priv->channel); 1432 + if (err) 1433 + return err; 1434 + 1435 + if (!wait_for_completion_timeout(&priv->get_busparams_comp, 1436 + msecs_to_jiffies(KVASER_USB_TIMEOUT))) 1437 + return -ETIMEDOUT; 1438 + 1439 + return 0; 1440 + } 1441 + 1759 1442 static int kvaser_usb_leaf_set_mode(struct net_device *netdev, 1760 1443 enum can_mode mode) 1761 1444 { 1762 1445 struct kvaser_usb_net_priv *priv = netdev_priv(netdev); 1446 + struct kvaser_usb_net_leaf_priv *leaf = priv->sub_priv; 1763 1447 int err; 1764 1448 1765 1449 switch (mode) { 1766 1450 case CAN_MODE_START: 1767 1451 kvaser_usb_unlink_tx_urbs(priv); 1452 + 1453 + leaf->joining_bus = true; 1768 1454 1769 1455 err = kvaser_usb_leaf_simple_cmd_async(priv, CMD_START_CHIP); 1770 1456 if (err) ··· 1841 1479 const struct kvaser_usb_dev_ops kvaser_usb_leaf_dev_ops = { 1842 1480 .dev_set_mode = kvaser_usb_leaf_set_mode, 1843 1481 .dev_set_bittiming = kvaser_usb_leaf_set_bittiming, 1482 + .dev_get_busparams = kvaser_usb_leaf_get_busparams, 1844 1483 .dev_set_data_bittiming = NULL, 1484 + .dev_get_data_busparams = NULL, 1845 1485 .dev_get_berr_counter = kvaser_usb_leaf_get_berr_counter, 1846 1486 .dev_setup_endpoints = kvaser_usb_leaf_setup_endpoints, 1847 1487 .dev_init_card = kvaser_usb_leaf_init_card, 1488 + .dev_init_channel = kvaser_usb_leaf_init_channel, 1489 + .dev_remove_channel = kvaser_usb_leaf_remove_channel, 1848 1490 .dev_get_software_info = kvaser_usb_leaf_get_software_info, 1849 1491 .dev_get_software_details = NULL, 1850 1492 .dev_get_card_info = kvaser_usb_leaf_get_card_info, 1851 - .dev_get_capabilities = NULL, 1493 + .dev_get_capabilities = kvaser_usb_leaf_get_capabilities, 1852 1494 .dev_set_opt_mode = kvaser_usb_leaf_set_opt_mode, 1853 1495 .dev_start_chip = kvaser_usb_leaf_start_chip, 1854 1496 .dev_stop_chip = kvaser_usb_leaf_stop_chip,
+3 -2
drivers/net/can/usb/ucan.c
··· 245 245 /* CAN transmission complete 246 246 * (type == UCAN_IN_TX_COMPLETE) 247 247 */ 248 - struct ucan_tx_complete_entry_t can_tx_complete_msg[0]; 248 + DECLARE_FLEX_ARRAY(struct ucan_tx_complete_entry_t, 249 + can_tx_complete_msg); 249 250 } __aligned(0x4) msg; 250 251 } __packed __aligned(0x4); 251 252 ··· 1582 1581 usb_set_intfdata(intf, NULL); 1583 1582 1584 1583 if (up) { 1585 - unregister_netdev(up->netdev); 1584 + unregister_candev(up->netdev); 1586 1585 free_candev(up->netdev); 1587 1586 } 1588 1587 }
+1 -1
net/can/j1939/transport.c
··· 985 985 /* wait for the EOMA packet to come in */ 986 986 j1939_tp_set_rxtimeout(session, 1250); 987 987 988 - netdev_dbg(session->priv->ndev, "%p: 0x%p\n", __func__, session); 988 + netdev_dbg(session->priv->ndev, "%s: 0x%p\n", __func__, session); 989 989 990 990 return 0; 991 991 }