tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

drm/amdgpu/uvd3.x: fix register definition warnings

drop the duplicate register macros from sid.h and use the
standard ones in the oss register headers.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Alex Deucher 9c39d77c 8c823e4f

+3 -19
+1
drivers/gpu/drm/amd/amdgpu/si.c
··· 44 44 #include "dce_virtual.h" 45 45 #include "gca/gfx_6_0_d.h" 46 46 #include "oss/oss_1_0_d.h" 47 + #include "oss/oss_1_0_sh_mask.h" 47 48 #include "gmc/gmc_6_0_d.h" 48 49 #include "dce/dce_6_0_d.h" 49 50 #include "uvd/uvd_4_0_d.h"
+2
drivers/gpu/drm/amd/amdgpu/si_ih.c
··· 27 27 #include "amdgpu_ih.h" 28 28 #include "sid.h" 29 29 #include "si_ih.h" 30 + #include "oss/oss_1_0_d.h" 31 + #include "oss/oss_1_0_sh_mask.h" 30 32 31 33 static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev); 32 34
-19
drivers/gpu/drm/amd/amdgpu/sid.h
··· 2340 2340 # define NI_INPUT_GAMMA_XVYCC_222 3 2341 2341 # define NI_OVL_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 4) 2342 2342 2343 - #define IH_RB_WPTR__RB_OVERFLOW_MASK 0x1 2344 - #define IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK 0x80000000 2345 - #define SRBM_STATUS__IH_BUSY_MASK 0x20000 2346 - #define SRBM_SOFT_RESET__SOFT_RESET_IH_MASK 0x400 2347 - 2348 2343 #define BLACKOUT_MODE_MASK 0x00000007 2349 2344 #define VGA_RENDER_CONTROL 0xC0 2350 2345 #define R_000300_VGA_RENDER_CONTROL 0xC0 ··· 2426 2431 #define MC_SEQ_MISC0__MT__HBM 0x60000000 2427 2432 #define MC_SEQ_MISC0__MT__DDR3 0xB0000000 2428 2433 2429 - #define SRBM_STATUS__MCB_BUSY_MASK 0x200 2430 - #define SRBM_STATUS__MCB_BUSY__SHIFT 0x9 2431 - #define SRBM_STATUS__MCB_NON_DISPLAY_BUSY_MASK 0x400 2432 - #define SRBM_STATUS__MCB_NON_DISPLAY_BUSY__SHIFT 0xa 2433 - #define SRBM_STATUS__MCC_BUSY_MASK 0x800 2434 - #define SRBM_STATUS__MCC_BUSY__SHIFT 0xb 2435 - #define SRBM_STATUS__MCD_BUSY_MASK 0x1000 2436 - #define SRBM_STATUS__MCD_BUSY__SHIFT 0xc 2437 - #define SRBM_STATUS__VMC_BUSY_MASK 0x100 2438 - #define SRBM_STATUS__VMC_BUSY__SHIFT 0x8 2439 - 2440 - 2441 2434 #define GRBM_STATUS__GUI_ACTIVE_MASK 0x80000000 2442 2435 #define CP_INT_CNTL_RING__TIME_STAMP_INT_ENABLE_MASK 0x4000000 2443 2436 #define CP_INT_CNTL_RING0__PRIV_REG_INT_ENABLE_MASK 0x800000 ··· 2450 2467 2451 2468 #define PCIE_BUS_CLK 10000 2452 2469 #define TCLK (PCIE_BUS_CLK / 10) 2453 - #define CC_DRM_ID_STRAPS__ATI_REV_ID_MASK 0xf0000000 2454 - #define CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT 0x1c 2455 2470 #define PCIE_PORT_INDEX 0xe 2456 2471 #define PCIE_PORT_DATA 0xf 2457 2472 #define EVERGREEN_PIF_PHY0_INDEX 0x8