tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
MIPS: Loongson-3: Add chipset ACPI platform driver
This add south-bridge (SB700/SB710/SB800 chipset) ACPI platform driver
for Loongson-3. This will be used by EC (Embedded Controller, used by
laptops) driver and STR (Suspend To RAM).
[ralf@linux-mips.org: Fix build error if !CONFIG_CPU_LOONGSON3. Build
doesn't like it if no obj-* variable is defined at all in a Makefile.
Obviously this has not been tested on other platforms.]
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9619/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
authored by
Huacai Chen
and committed by
Ralf Baechle
9c057b3e
64f09aa9
+161
+6
arch/mips/loongson/common/pci.c
+6
arch/mips/loongson/common/pci.c
···
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#endif
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}
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extern int sbx00_acpi_init(void);
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static int __init pcibios_init(void)
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{
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setup_pcimap();
···
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loongson_pci_mem_resource.end = loongson_sysconf.pci_mem_end_addr;
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#endif
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register_pci_controller(&loongson_pci_controller);
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#ifdef CONFIG_CPU_LOONGSON3
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sbx00_acpi_init();
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#endif
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return 0;
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}
+4
drivers/platform/mips/Kconfig
+4
drivers/platform/mips/Kconfig
+1
drivers/platform/mips/Makefile
+1
drivers/platform/mips/Makefile
+150
drivers/platform/mips/acpi_init.c
+150
drivers/platform/mips/acpi_init.c
···
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/export.h>
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#define SBX00_ACPI_IO_BASE 0x800
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#define SBX00_ACPI_IO_SIZE 0x100
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#define ACPI_PM_EVT_BLK (SBX00_ACPI_IO_BASE + 0x00) /* 4 bytes */
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#define ACPI_PM_CNT_BLK (SBX00_ACPI_IO_BASE + 0x04) /* 2 bytes */
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#define ACPI_PMA_CNT_BLK (SBX00_ACPI_IO_BASE + 0x0F) /* 1 byte */
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#define ACPI_PM_TMR_BLK (SBX00_ACPI_IO_BASE + 0x18) /* 4 bytes */
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#define ACPI_GPE0_BLK (SBX00_ACPI_IO_BASE + 0x10) /* 8 bytes */
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#define ACPI_END (SBX00_ACPI_IO_BASE + 0x80)
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#define PM_INDEX 0xCD6
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#define PM_DATA 0xCD7
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#define PM2_INDEX 0xCD0
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#define PM2_DATA 0xCD1
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/*
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* SCI interrupt need acpi space, allocate here
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*/
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static int __init register_acpi_resource(void)
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{
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request_region(SBX00_ACPI_IO_BASE, SBX00_ACPI_IO_SIZE, "acpi");
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return 0;
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}
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static void pmio_write_index(u16 index, u8 reg, u8 value)
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{
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outb(reg, index);
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outb(value, index + 1);
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}
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static u8 pmio_read_index(u16 index, u8 reg)
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{
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outb(reg, index);
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return inb(index + 1);
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}
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void pm_iowrite(u8 reg, u8 value)
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{
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pmio_write_index(PM_INDEX, reg, value);
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}
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EXPORT_SYMBOL(pm_iowrite);
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u8 pm_ioread(u8 reg)
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{
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return pmio_read_index(PM_INDEX, reg);
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}
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EXPORT_SYMBOL(pm_ioread);
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void pm2_iowrite(u8 reg, u8 value)
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{
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pmio_write_index(PM2_INDEX, reg, value);
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}
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EXPORT_SYMBOL(pm2_iowrite);
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u8 pm2_ioread(u8 reg)
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{
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return pmio_read_index(PM2_INDEX, reg);
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}
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EXPORT_SYMBOL(pm2_ioread);
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static void acpi_hw_clear_status(void)
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{
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u16 value;
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/* PMStatus: Clear WakeStatus/PwrBtnStatus */
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value = inw(ACPI_PM_EVT_BLK);
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value |= (1 << 8 | 1 << 15);
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outw(value, ACPI_PM_EVT_BLK);
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/* GPEStatus: Clear all generated events */
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outl(inl(ACPI_GPE0_BLK), ACPI_GPE0_BLK);
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}
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void acpi_registers_setup(void)
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{
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u32 value;
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/* PM Status Base */
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pm_iowrite(0x20, ACPI_PM_EVT_BLK & 0xff);
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pm_iowrite(0x21, ACPI_PM_EVT_BLK >> 8);
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/* PM Control Base */
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pm_iowrite(0x22, ACPI_PM_CNT_BLK & 0xff);
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pm_iowrite(0x23, ACPI_PM_CNT_BLK >> 8);
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/* GPM Base */
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pm_iowrite(0x28, ACPI_GPE0_BLK & 0xff);
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pm_iowrite(0x29, ACPI_GPE0_BLK >> 8);
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/* ACPI End */
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pm_iowrite(0x2e, ACPI_END & 0xff);
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pm_iowrite(0x2f, ACPI_END >> 8);
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/* IO Decode: When AcpiDecodeEnable set, South-Bridge uses the contents
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* of the PM registers at index 0x20~0x2B to decode ACPI I/O address. */
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pm_iowrite(0x0e, 1 << 3);
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/* SCI_EN set */
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outw(1, ACPI_PM_CNT_BLK);
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/* Enable to generate SCI */
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pm_iowrite(0x10, pm_ioread(0x10) | 1);
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/* GPM3/GPM9 enable */
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value = inl(ACPI_GPE0_BLK + 4);
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outl(value | (1 << 14) | (1 << 22), ACPI_GPE0_BLK + 4);
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/* Set GPM9 as input */
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pm_iowrite(0x8d, pm_ioread(0x8d) & (~(1 << 1)));
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/* Set GPM9 as non-output */
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pm_iowrite(0x94, pm_ioread(0x94) | (1 << 3));
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/* GPM3 config ACPI trigger SCIOUT */
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pm_iowrite(0x33, pm_ioread(0x33) & (~(3 << 4)));
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/* GPM9 config ACPI trigger SCIOUT */
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pm_iowrite(0x3d, pm_ioread(0x3d) & (~(3 << 2)));
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/* GPM3 config falling edge trigger */
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pm_iowrite(0x37, pm_ioread(0x37) & (~(1 << 6)));
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/* No wait for STPGNT# in ACPI Sx state */
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pm_iowrite(0x7c, pm_ioread(0x7c) | (1 << 6));
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/* Set GPM3 pull-down enable */
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value = pm2_ioread(0xf6);
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value |= ((1 << 7) | (1 << 3));
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pm2_iowrite(0xf6, value);
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/* Set GPM9 pull-down enable */
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value = pm2_ioread(0xf8);
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value |= ((1 << 5) | (1 << 1));
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pm2_iowrite(0xf8, value);
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}
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int __init sbx00_acpi_init(void)
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{
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register_acpi_resource();
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acpi_registers_setup();
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acpi_hw_clear_status();
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return 0;
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}