cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()

Align the end size to cache boundary size in ax45mp_dma_cache_wback()
callback likewise done in ax45mp_dma_cache_inv() callback.

Additionally return early in case of start == end.

Fixes: d34599bcd2e4 ("cache: Add L2 cache management for Andes AX45MP RISC-V core")
Reported-by: Pavel Machek <[e-mail]>
Link: https://lore.kernel.org/cip-dev/[e-mail]/
Signed-off-by: Lad Prabhakar <[e-mail]>
Signed-off-by: Conor Dooley <[e-mail]>

drivers/cache/ax45mp_cache.c

···
 	unsigned long line_size;
 	unsigned long flags;
 
+	if (unlikely(start == end))
+		return;
+
 	line_size = ax45mp_priv.ax45mp_cache_line_size;
 	start = start & (~(line_size - 1));
+	end = ((end + line_size - 1) & (~(line_size - 1)));
 	local_irq_save(flags);
 	ax45mp_cpu_dcache_wb_range(start, end);
 	local_irq_restore(flags);