Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'xtensa-20200206' of git://github.com/jcmvbkbc/linux-xtensa

Pull xtensa updates from Max Filippov:

- reorganize exception vectors placement

- small cleanups (drop unused functions/headers/defconfig entries,
spelling fixes)

* tag 'xtensa-20200206' of git://github.com/jcmvbkbc/linux-xtensa:
xtensa: ISS: improve simcall assembly
xtensa: reorganize vectors placement
xtensa: separate SMP and XIP support
xtensa: move fast exception handlers close to vectors
arch/xtensa: fix Kconfig typos for HAVE_SMP
xtensa: clean up optional XCHAL_* definitions
xtensa: drop unused function fast_coprocessor_double
xtensa: drop empty platform_* functions from platforms
xtensa: clean up platform headers
xtensa: drop set_except_vector declaration
xtensa: configs: Cleanup old Kconfig IO scheduler options

+142 -140
+35 -9
arch/xtensa/Kconfig
··· 180 180 depends on XTENSA_VARIANT_CUSTOM 181 181 select XTENSA_MX 182 182 help 183 - This option is use to indicate that the system-on-a-chip (SOC) 183 + This option is used to indicate that the system-on-a-chip (SOC) 184 184 supports Multiprocessing. Multiprocessor support implemented above 185 185 the CPU core definition and currently needs to be selected manually. 186 186 187 - Multiprocessor support in implemented with external cache and 187 + Multiprocessor support is implemented with external cache and 188 188 interrupt controllers. 189 189 190 190 The MX interrupt distributer adds Interprocessor Interrupts ··· 572 572 573 573 If unsure, leave the default value here. 574 574 575 - config VECTORS_OFFSET 576 - hex "Kernel vectors offset" 577 - default 0x00003000 578 - depends on !XIP_KERNEL 575 + choice 576 + prompt "Relocatable vectors location" 577 + default XTENSA_VECTORS_IN_TEXT 579 578 help 580 - This is the offset of the kernel image from the relocatable vectors 581 - base. 579 + Choose whether relocatable vectors are merged into the kernel .text 580 + or placed separately at runtime. This option does not affect 581 + configurations without VECBASE register where vectors are always 582 + placed at their hardware-defined locations. 582 583 583 - If unsure, leave the default value here. 584 + config XTENSA_VECTORS_IN_TEXT 585 + bool "Merge relocatable vectors into kernel text" 586 + depends on !MTD_XIP 587 + help 588 + This option puts relocatable vectors into the kernel .text section 589 + with proper alignment. 590 + This is a safe choice for most configurations. 591 + 592 + config XTENSA_VECTORS_SEPARATE 593 + bool "Put relocatable vectors at fixed address" 594 + help 595 + This option puts relocatable vectors at specific virtual address. 596 + Vectors are merged with the .init data in the kernel image and 597 + are copied into their designated location during kernel startup. 598 + Use it to put vectors into IRAM or out of FLASH on kernels with 599 + XIP-aware MTD support. 600 + 601 + endchoice 602 + 603 + config VECTORS_ADDR 604 + hex "Kernel vectors virtual address" 605 + default 0x00000000 606 + depends on XTENSA_VECTORS_SEPARATE 607 + help 608 + This is the virtual address of the (relocatable) vectors base. 609 + It must be within KSEG if MMU is used. 584 610 585 611 config XIP_DATA_ADDR 586 612 hex "XIP kernel data virtual address"
-2
arch/xtensa/configs/audio_kc705_defconfig
··· 21 21 CONFIG_OPROFILE=y 22 22 CONFIG_MODULES=y 23 23 CONFIG_MODULE_UNLOAD=y 24 - # CONFIG_IOSCHED_DEADLINE is not set 25 - # CONFIG_IOSCHED_CFQ is not set 26 24 CONFIG_XTENSA_VARIANT_CUSTOM=y 27 25 CONFIG_XTENSA_VARIANT_CUSTOM_NAME="test_kc705_hifi" 28 26 CONFIG_XTENSA_UNALIGNED_USER=y
-2
arch/xtensa/configs/cadence_csp_defconfig
··· 27 27 CONFIG_MODULE_FORCE_LOAD=y 28 28 CONFIG_MODULE_UNLOAD=y 29 29 CONFIG_MODULE_FORCE_UNLOAD=y 30 - # CONFIG_IOSCHED_DEADLINE is not set 31 - # CONFIG_IOSCHED_CFQ is not set 32 30 CONFIG_XTENSA_VARIANT_CUSTOM=y 33 31 CONFIG_XTENSA_VARIANT_CUSTOM_NAME="csp" 34 32 CONFIG_XTENSA_UNALIGNED_USER=y
-2
arch/xtensa/configs/generic_kc705_defconfig
··· 21 21 CONFIG_OPROFILE=y 22 22 CONFIG_MODULES=y 23 23 CONFIG_MODULE_UNLOAD=y 24 - # CONFIG_IOSCHED_DEADLINE is not set 25 - # CONFIG_IOSCHED_CFQ is not set 26 24 CONFIG_XTENSA_VARIANT_DC233C=y 27 25 CONFIG_XTENSA_UNALIGNED_USER=y 28 26 CONFIG_PREEMPT=y
-2
arch/xtensa/configs/iss_defconfig
··· 1 1 CONFIG_SYSVIPC=y 2 2 CONFIG_LOG_BUF_SHIFT=14 3 3 CONFIG_EXPERT=y 4 - # CONFIG_IOSCHED_DEADLINE is not set 5 - # CONFIG_IOSCHED_CFQ is not set 6 4 # CONFIG_PCI is not set 7 5 CONFIG_CMDLINE_BOOL=y 8 6 CONFIG_CMDLINE="console=ttyS0,38400 eth0=tuntap,,tap0 ip=192.168.168.5:192.168.168.1 root=nfs nfsroot=192.168.168.1:/opt/montavista/pro/devkit/xtensa/linux_be/target memmap=128M@0"
-2
arch/xtensa/configs/nommu_kc705_defconfig
··· 25 25 CONFIG_PERF_EVENTS=y 26 26 CONFIG_MODULES=y 27 27 CONFIG_MODULE_UNLOAD=y 28 - # CONFIG_IOSCHED_DEADLINE is not set 29 - # CONFIG_IOSCHED_CFQ is not set 30 28 CONFIG_XTENSA_VARIANT_CUSTOM=y 31 29 CONFIG_XTENSA_VARIANT_CUSTOM_NAME="de212" 32 30 # CONFIG_XTENSA_VARIANT_MMU is not set
-3
arch/xtensa/configs/smp_lx200_defconfig
··· 21 21 CONFIG_OPROFILE=y 22 22 CONFIG_MODULES=y 23 23 CONFIG_MODULE_UNLOAD=y 24 - # CONFIG_IOSCHED_DEADLINE is not set 25 - # CONFIG_IOSCHED_CFQ is not set 26 24 CONFIG_XTENSA_VARIANT_CUSTOM=y 27 25 CONFIG_XTENSA_VARIANT_CUSTOM_NAME="test_mmuhifi_c3" 28 26 CONFIG_XTENSA_UNALIGNED_USER=y ··· 30 32 CONFIG_HOTPLUG_CPU=y 31 33 # CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX is not set 32 34 # CONFIG_PCI is not set 33 - CONFIG_VECTORS_OFFSET=0x00002000 34 35 CONFIG_XTENSA_PLATFORM_XTFPGA=y 35 36 CONFIG_CMDLINE_BOOL=y 36 37 CONFIG_CMDLINE="earlycon=uart8250,mmio32native,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=96M@0"
-1
arch/xtensa/configs/virt_defconfig
··· 19 19 CONFIG_PERF_EVENTS=y 20 20 CONFIG_XTENSA_VARIANT_DC233C=y 21 21 CONFIG_XTENSA_UNALIGNED_USER=y 22 - CONFIG_VECTORS_OFFSET=0x00002000 23 22 CONFIG_XTENSA_KSEG_512M=y 24 23 CONFIG_HIGHMEM=y 25 24 CONFIG_CMDLINE_BOOL=y
+2
arch/xtensa/include/asm/asmmacro.h
··· 237 237 #error Unsupported Xtensa ABI 238 238 #endif 239 239 240 + #define __XTENSA_HANDLER .section ".exception.text", "ax" 241 + 240 242 #endif /* _XTENSA_ASMMACRO_H */
+8
arch/xtensa/include/asm/core.h
··· 10 10 #define XCHAL_HAVE_EXCLUSIVE 0 11 11 #endif 12 12 13 + #ifndef XCHAL_HAVE_EXTERN_REGS 14 + #define XCHAL_HAVE_EXTERN_REGS 0 15 + #endif 16 + 13 17 #ifndef XCHAL_HAVE_MPU 14 18 #define XCHAL_HAVE_MPU 0 19 + #endif 20 + 21 + #ifndef XCHAL_HAVE_VECBASE 22 + #define XCHAL_HAVE_VECBASE 0 15 23 #endif 16 24 17 25 #ifndef XCHAL_SPANNING_WAY
-2
arch/xtensa/include/asm/platform.h
··· 12 12 #define _XTENSA_PLATFORM_H 13 13 14 14 #include <linux/types.h> 15 - #include <linux/pci.h> 16 - 17 15 #include <asm/bootparam.h> 18 16 19 17 /*
-4
arch/xtensa/include/asm/processor.h
··· 237 237 v; \ 238 238 }) 239 239 240 - #ifndef XCHAL_HAVE_EXTERN_REGS 241 - #define XCHAL_HAVE_EXTERN_REGS 0 242 - #endif 243 - 244 240 #if XCHAL_HAVE_EXTERN_REGS 245 241 246 242 static inline void set_er(unsigned long value, unsigned long addr)
+3 -3
arch/xtensa/include/asm/vectors.h
··· 34 34 #endif 35 35 36 36 #define RESET_VECTOR1_VADDR (XCHAL_RESET_VECTOR1_VADDR) 37 - #ifdef CONFIG_VECTORS_OFFSET 38 - #define VECBASE_VADDR (KERNELOFFSET - CONFIG_VECTORS_OFFSET) 37 + #ifdef CONFIG_VECTORS_ADDR 38 + #define VECBASE_VADDR (CONFIG_VECTORS_ADDR) 39 39 #else 40 40 #define VECBASE_VADDR _vecbase 41 41 #endif 42 42 43 - #if defined(XCHAL_HAVE_VECBASE) && XCHAL_HAVE_VECBASE 43 + #if XCHAL_HAVE_VECBASE 44 44 45 45 #define VECTOR_VADDR(offset) (VECBASE_VADDR + offset) 46 46
-2
arch/xtensa/include/uapi/asm/setup.h
··· 14 14 15 15 #define COMMAND_LINE_SIZE 256 16 16 17 - extern void set_except_vector(int n, void *addr); 18 - 19 17 #endif
+2 -10
arch/xtensa/kernel/coprocessor.S
··· 58 58 .endif; \ 59 59 .long THREAD_XTREGS_CP##x 60 60 61 + __XTENSA_HANDLER 62 + 61 63 SAVE_CP_REGS(0) 62 64 SAVE_CP_REGS(1) 63 65 SAVE_CP_REGS(2) ··· 78 76 LOAD_CP_REGS(6) 79 77 LOAD_CP_REGS(7) 80 78 81 - .section ".rodata", "a" 82 79 .align 4 83 80 .Lsave_cp_regs_jump_table: 84 81 SAVE_CP_REGS_TAB(0) ··· 98 97 LOAD_CP_REGS_TAB(5) 99 98 LOAD_CP_REGS_TAB(6) 100 99 LOAD_CP_REGS_TAB(7) 101 - 102 - .previous 103 100 104 101 /* 105 102 * coprocessor_flush(struct thread_info*, index) ··· 143 144 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC 144 145 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception 145 146 */ 146 - 147 - ENTRY(fast_coprocessor_double) 148 - 149 - wsr a0, excsave1 150 - call0 unrecoverable_exception 151 - 152 - ENDPROC(fast_coprocessor_double) 153 147 154 148 ENTRY(fast_coprocessor) 155 149
+12 -6
arch/xtensa/kernel/entry.S
··· 939 939 940 940 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */ 941 941 942 + __XTENSA_HANDLER 943 + .literal_position 944 + 942 945 /* 943 946 * Fast-handler for alloca exceptions 944 947 * ··· 1027 1024 ENTRY(fast_illegal_instruction_user) 1028 1025 1029 1026 rsr a0, ps 1030 - bbsi.l a0, PS_WOE_BIT, user_exception 1027 + bbsi.l a0, PS_WOE_BIT, 1f 1031 1028 s32i a3, a2, PT_AREG3 1032 1029 movi a3, PS_WOE_MASK 1033 1030 or a0, a0, a3 ··· 1036 1033 l32i a0, a2, PT_AREG0 1037 1034 rsr a2, depc 1038 1035 rfe 1036 + 1: 1037 + call0 user_exception 1039 1038 1040 1039 ENDPROC(fast_illegal_instruction_user) 1041 1040 #endif ··· 1076 1071 _beqz a0, fast_syscall_spill_registers 1077 1072 _beqi a0, __NR_xtensa, fast_syscall_xtensa 1078 1073 1079 - j user_exception 1074 + call0 user_exception 1080 1075 1081 1076 ENDPROC(fast_syscall_user) 1082 1077 ··· 1767 1762 1768 1763 rsr a2, ps 1769 1764 bbsi.l a2, PS_UM_BIT, 1f 1770 - j _kernel_exception 1771 - 1: j _user_exception 1765 + call0 _kernel_exception 1766 + 1: call0 _user_exception 1772 1767 1773 1768 ENDPROC(fast_second_level_miss) 1774 1769 ··· 1864 1859 1865 1860 rsr a2, ps 1866 1861 bbsi.l a2, PS_UM_BIT, 1f 1867 - j _kernel_exception 1868 - 1: j _user_exception 1862 + call0 _kernel_exception 1863 + 1: call0 _user_exception 1869 1864 1870 1865 ENDPROC(fast_store_prohibited) 1871 1866 1872 1867 #endif /* CONFIG_MMU */ 1873 1868 1869 + .text 1874 1870 /* 1875 1871 * System Calls. 1876 1872 *
+2 -3
arch/xtensa/kernel/platform.c
··· 12 12 * Chris Zankel <chris@zankel.net> 13 13 */ 14 14 15 + #include <linux/printk.h> 15 16 #include <linux/types.h> 16 - #include <linux/pci.h> 17 - #include <linux/time.h> 18 17 #include <asm/platform.h> 19 18 #include <asm/timex.h> 20 - #include <asm/param.h> /* HZ */ 21 19 22 20 #define _F(r,f,a,b) \ 23 21 r __platform_##f a b; \ ··· 26 28 * (Please, refer to include/asm-xtensa/platform.h for more information) 27 29 */ 28 30 31 + _F(void, init, (bp_tag_t *first), { }); 29 32 _F(void, setup, (char** cmd), { }); 30 33 _F(void, restart, (void), { while(1); }); 31 34 _F(void, halt, (void), { while(1); });
+6 -2
arch/xtensa/kernel/setup.c
··· 284 284 extern char _UserExceptionVector_text_end; 285 285 extern char _DoubleExceptionVector_text_start; 286 286 extern char _DoubleExceptionVector_text_end; 287 + extern char _exception_text_start; 288 + extern char _exception_text_end; 287 289 #if XCHAL_EXCM_LEVEL >= 2 288 290 extern char _Level2InterruptVector_text_start; 289 291 extern char _Level2InterruptVector_text_end; ··· 349 347 mem_reserve(__pa(_xip_start), __pa(_xip_end)); 350 348 #endif 351 349 352 - #ifdef CONFIG_VECTORS_OFFSET 350 + #ifdef CONFIG_VECTORS_ADDR 353 351 mem_reserve(__pa(&_WindowVectors_text_start), 354 352 __pa(&_WindowVectors_text_end)); 355 353 ··· 365 363 mem_reserve(__pa(&_DoubleExceptionVector_text_start), 366 364 __pa(&_DoubleExceptionVector_text_end)); 367 365 366 + mem_reserve(__pa(&_exception_text_start), 367 + __pa(&_exception_text_end)); 368 368 #if XCHAL_EXCM_LEVEL >= 2 369 369 mem_reserve(__pa(&_Level2InterruptVector_text_start), 370 370 __pa(&_Level2InterruptVector_text_end)); ··· 388 384 __pa(&_Level6InterruptVector_text_end)); 389 385 #endif 390 386 391 - #endif /* CONFIG_VECTORS_OFFSET */ 387 + #endif /* CONFIG_VECTORS_ADDR */ 392 388 393 389 #ifdef CONFIG_SMP 394 390 mem_reserve(__pa(&_SecondaryResetVector_text_start),
+2 -1
arch/xtensa/kernel/vectors.S
··· 43 43 */ 44 44 45 45 #include <linux/linkage.h> 46 + #include <asm/asmmacro.h> 46 47 #include <asm/ptrace.h> 47 48 #include <asm/current.h> 48 49 #include <asm/asm-offsets.h> ··· 478 477 479 478 ENDPROC(_DoubleExceptionVector) 480 479 481 - .text 482 480 /* 483 481 * Fixup handler for TLB miss in double exception handler for window owerflow. 484 482 * We get here with windowbase set to the window that was being spilled and ··· 505 505 * a3: exctable, original value in excsave1 506 506 */ 507 507 508 + __XTENSA_HANDLER 508 509 .literal_position 509 510 510 511 ENTRY(window_overflow_restore_a0_fixup)
+62 -42
arch/xtensa/kernel/vmlinux.lds.S
··· 47 47 LONG(sym ## _end); \ 48 48 LONG(LOADADDR(section)) 49 49 50 + #if !defined(CONFIG_VECTORS_ADDR) && XCHAL_HAVE_VECBASE 51 + #define MERGED_VECTORS 1 52 + #else 53 + #define MERGED_VECTORS 0 54 + #endif 55 + 50 56 /* 51 - * Macro to define a section for a vector. When CONFIG_VECTORS_OFFSET is 52 - * defined code for every vector is located with other init data. At startup 57 + * Macro to define a section for a vector. When MERGED_VECTORS is 0 58 + * code for every vector is located with other init data. At startup 53 59 * time head.S copies code for every vector to its final position according 54 60 * to description recorded in the corresponding RELOCATE_ENTRY. 55 61 */ 56 62 57 - #ifdef CONFIG_VECTORS_OFFSET 58 - #define SECTION_VECTOR(sym, section, addr, prevsec) \ 63 + #define SECTION_VECTOR4(sym, section, addr, prevsec) \ 59 64 section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \ 60 65 { \ 61 66 . = ALIGN(4); \ ··· 68 63 *(section) \ 69 64 sym ## _end = ABSOLUTE(.); \ 70 65 } 71 - #else 72 - #define SECTION_VECTOR(section, addr) \ 66 + 67 + #define SECTION_VECTOR2(section, addr) \ 73 68 . = addr; \ 74 69 *(section) 75 - #endif 76 70 77 71 /* 78 72 * Mapping of input sections to output sections when linking. ··· 90 86 /* The HEAD_TEXT section must be the first section! */ 91 87 HEAD_TEXT 92 88 93 - #ifndef CONFIG_VECTORS_OFFSET 94 - . = ALIGN(PAGE_SIZE); 95 - _vecbase = .; 89 + #if MERGED_VECTORS 90 + . = ALIGN(PAGE_SIZE); 91 + _vecbase = .; 96 92 97 - SECTION_VECTOR (.WindowVectors.text, WINDOW_VECTORS_VADDR) 93 + SECTION_VECTOR2 (.WindowVectors.text, WINDOW_VECTORS_VADDR) 98 94 #if XCHAL_EXCM_LEVEL >= 2 99 - SECTION_VECTOR (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR) 95 + SECTION_VECTOR2 (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR) 100 96 #endif 101 97 #if XCHAL_EXCM_LEVEL >= 3 102 - SECTION_VECTOR (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR) 98 + SECTION_VECTOR2 (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR) 103 99 #endif 104 100 #if XCHAL_EXCM_LEVEL >= 4 105 - SECTION_VECTOR (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR) 101 + SECTION_VECTOR2 (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR) 106 102 #endif 107 103 #if XCHAL_EXCM_LEVEL >= 5 108 - SECTION_VECTOR (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR) 104 + SECTION_VECTOR2 (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR) 109 105 #endif 110 106 #if XCHAL_EXCM_LEVEL >= 6 111 - SECTION_VECTOR (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR) 107 + SECTION_VECTOR2 (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR) 112 108 #endif 113 - SECTION_VECTOR (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR) 114 - SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR) 115 - SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR) 116 - SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR) 109 + SECTION_VECTOR2 (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR) 110 + SECTION_VECTOR2 (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR) 111 + SECTION_VECTOR2 (.UserExceptionVector.text, USER_VECTOR_VADDR) 112 + SECTION_VECTOR2 (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR) 113 + 114 + *(.exception.text) 117 115 #endif 118 116 119 117 IRQENTRY_TEXT ··· 165 159 . = ALIGN(16); 166 160 __boot_reloc_table_start = ABSOLUTE(.); 167 161 168 - #ifdef CONFIG_VECTORS_OFFSET 162 + #if !MERGED_VECTORS 169 163 RELOCATE_ENTRY(_WindowVectors_text, 170 164 .WindowVectors.text); 171 165 #if XCHAL_EXCM_LEVEL >= 2 ··· 196 190 .DoubleExceptionVector.text); 197 191 RELOCATE_ENTRY(_DebugInterruptVector_text, 198 192 .DebugInterruptVector.text); 193 + RELOCATE_ENTRY(_exception_text, 194 + .exception.text); 199 195 #endif 200 196 #ifdef CONFIG_XIP_KERNEL 201 197 RELOCATE_ENTRY(_xip_data, .data); 202 198 RELOCATE_ENTRY(_xip_init_data, .init.data); 203 - #else 199 + #endif 204 200 #if defined(CONFIG_SMP) 205 201 RELOCATE_ENTRY(_SecondaryResetVector_text, 206 202 .SecondaryResetVector.text); 207 - #endif 208 203 #endif 209 204 210 205 __boot_reloc_table_end = ABSOLUTE(.) ; ··· 223 216 . = ALIGN(4); 224 217 .dummy : { LONG(0) } 225 218 226 - #ifdef CONFIG_VECTORS_OFFSET 219 + #undef LAST 220 + #define LAST .dummy 221 + 222 + #if !MERGED_VECTORS 227 223 /* The vectors are relocated to the real position at startup time */ 228 224 229 - SECTION_VECTOR (_WindowVectors_text, 225 + SECTION_VECTOR4 (_WindowVectors_text, 230 226 .WindowVectors.text, 231 227 WINDOW_VECTORS_VADDR, 232 228 .dummy) 233 - SECTION_VECTOR (_DebugInterruptVector_text, 229 + SECTION_VECTOR4 (_DebugInterruptVector_text, 234 230 .DebugInterruptVector.text, 235 231 DEBUG_VECTOR_VADDR, 236 232 .WindowVectors.text) 237 233 #undef LAST 238 234 #define LAST .DebugInterruptVector.text 239 235 #if XCHAL_EXCM_LEVEL >= 2 240 - SECTION_VECTOR (_Level2InterruptVector_text, 236 + SECTION_VECTOR4 (_Level2InterruptVector_text, 241 237 .Level2InterruptVector.text, 242 238 INTLEVEL2_VECTOR_VADDR, 243 239 LAST) ··· 248 238 # define LAST .Level2InterruptVector.text 249 239 #endif 250 240 #if XCHAL_EXCM_LEVEL >= 3 251 - SECTION_VECTOR (_Level3InterruptVector_text, 241 + SECTION_VECTOR4 (_Level3InterruptVector_text, 252 242 .Level3InterruptVector.text, 253 243 INTLEVEL3_VECTOR_VADDR, 254 244 LAST) ··· 256 246 # define LAST .Level3InterruptVector.text 257 247 #endif 258 248 #if XCHAL_EXCM_LEVEL >= 4 259 - SECTION_VECTOR (_Level4InterruptVector_text, 249 + SECTION_VECTOR4 (_Level4InterruptVector_text, 260 250 .Level4InterruptVector.text, 261 251 INTLEVEL4_VECTOR_VADDR, 262 252 LAST) ··· 264 254 # define LAST .Level4InterruptVector.text 265 255 #endif 266 256 #if XCHAL_EXCM_LEVEL >= 5 267 - SECTION_VECTOR (_Level5InterruptVector_text, 257 + SECTION_VECTOR4 (_Level5InterruptVector_text, 268 258 .Level5InterruptVector.text, 269 259 INTLEVEL5_VECTOR_VADDR, 270 260 LAST) ··· 272 262 # define LAST .Level5InterruptVector.text 273 263 #endif 274 264 #if XCHAL_EXCM_LEVEL >= 6 275 - SECTION_VECTOR (_Level6InterruptVector_text, 265 + SECTION_VECTOR4 (_Level6InterruptVector_text, 276 266 .Level6InterruptVector.text, 277 267 INTLEVEL6_VECTOR_VADDR, 278 268 LAST) 279 269 # undef LAST 280 270 # define LAST .Level6InterruptVector.text 281 271 #endif 282 - SECTION_VECTOR (_KernelExceptionVector_text, 272 + SECTION_VECTOR4 (_KernelExceptionVector_text, 283 273 .KernelExceptionVector.text, 284 274 KERNEL_VECTOR_VADDR, 285 275 LAST) 286 276 #undef LAST 287 - SECTION_VECTOR (_UserExceptionVector_text, 277 + SECTION_VECTOR4 (_UserExceptionVector_text, 288 278 .UserExceptionVector.text, 289 279 USER_VECTOR_VADDR, 290 280 .KernelExceptionVector.text) 291 - SECTION_VECTOR (_DoubleExceptionVector_text, 281 + SECTION_VECTOR4 (_DoubleExceptionVector_text, 292 282 .DoubleExceptionVector.text, 293 283 DOUBLEEXC_VECTOR_VADDR, 294 284 .UserExceptionVector.text) 295 - 296 - . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3; 285 + #define LAST .DoubleExceptionVector.text 297 286 298 287 #endif 299 - #if !defined(CONFIG_XIP_KERNEL) && defined(CONFIG_SMP) 288 + #if defined(CONFIG_SMP) 300 289 301 - SECTION_VECTOR (_SecondaryResetVector_text, 290 + SECTION_VECTOR4 (_SecondaryResetVector_text, 302 291 .SecondaryResetVector.text, 303 292 RESET_VECTOR1_VADDR, 304 - .DoubleExceptionVector.text) 305 - 306 - . = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text); 293 + LAST) 294 + #undef LAST 295 + #define LAST .SecondaryResetVector.text 307 296 308 297 #endif 298 + #if !MERGED_VECTORS 299 + SECTION_VECTOR4 (_exception_text, 300 + .exception.text, 301 + , 302 + LAST) 303 + #undef LAST 304 + #define LAST .exception.text 309 305 306 + #endif 307 + . = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ 3; 308 + 309 + .dummy1 : AT(ADDR(.dummy1)) { LONG(0) } 310 310 . = ALIGN(PAGE_SIZE); 311 311 312 312 #ifndef CONFIG_XIP_KERNEL ··· 334 314 335 315 #undef LOAD_OFFSET 336 316 #define LOAD_OFFSET \ 337 - (CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy) + SIZEOF(.dummy) + 3) & ~ 3) 317 + (CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy1) + SIZEOF(.dummy1) + 3) & ~ 3) 338 318 339 319 _xip_data_start = .; 340 320 _sdata = .;
+3 -5
arch/xtensa/platforms/iss/include/platform/simcall.h
··· 66 66 67 67 static inline int __simc(int a, int b, int c, int d) 68 68 { 69 - int ret; 70 69 register int a1 asm("a2") = a; 71 70 register int b1 asm("a3") = b; 72 71 register int c1 asm("a4") = c; 73 72 register int d1 asm("a5") = d; 74 73 __asm__ __volatile__ ( 75 74 "simcall\n" 76 - "mov %0, a2\n" 77 - "mov %1, a3\n" 78 - : "=a" (ret), "=a" (errno), "+r"(a1), "+r"(b1) 75 + : "+r"(a1), "+r"(b1) 79 76 : "r"(c1), "r"(d1) 80 77 : "memory"); 81 - return ret; 78 + errno = b1; 79 + return a1; 82 80 } 83 81 84 82 static inline int simc_exit(int exit_code)
+4 -21
arch/xtensa/platforms/iss/setup.c
··· 11 11 * Copyright 2001 - 2005 Tensilica Inc. 12 12 * Copyright 2017 Cadence Design Systems Inc. 13 13 */ 14 - #include <linux/memblock.h> 15 - #include <linux/stddef.h> 16 - #include <linux/kernel.h> 17 14 #include <linux/init.h> 18 - #include <linux/errno.h> 19 - #include <linux/reboot.h> 20 - #include <linux/kdev_t.h> 21 - #include <linux/types.h> 22 - #include <linux/major.h> 23 - #include <linux/blkdev.h> 24 - #include <linux/console.h> 25 - #include <linux/delay.h> 26 - #include <linux/stringify.h> 15 + #include <linux/kernel.h> 27 16 #include <linux/notifier.h> 17 + #include <linux/printk.h> 18 + #include <linux/string.h> 28 19 29 20 #include <asm/platform.h> 30 - #include <asm/bootparam.h> 31 21 #include <asm/setup.h> 32 22 33 23 #include <platform/simcall.h> 34 24 35 - 36 - void __init platform_init(bp_tag_t* bootparam) 37 - { 38 - } 39 25 40 26 void platform_halt(void) 41 27 { ··· 34 48 pr_info(" ** Called platform_power_off() **\n"); 35 49 simc_exit(0); 36 50 } 51 + 37 52 void platform_restart(void) 38 53 { 39 54 /* Flush and reset the mmu, simulate a processor reset, and 40 55 * jump to the reset vector. */ 41 56 cpu_reset(); 42 57 /* control never gets here */ 43 - } 44 - 45 - void platform_heartbeat(void) 46 - { 47 58 } 48 59 49 60 static int
+1 -16
arch/xtensa/platforms/xtfpga/setup.c
··· 24 24 #include <linux/of.h> 25 25 #include <linux/clk-provider.h> 26 26 #include <linux/of_address.h> 27 + #include <linux/slab.h> 27 28 28 29 #include <asm/timex.h> 29 30 #include <asm/processor.h> ··· 55 54 * jump to the reset vector. */ 56 55 cpu_reset(); 57 56 /* control never gets here */ 58 - } 59 - 60 - void __init platform_setup(char **cmdline) 61 - { 62 - } 63 - 64 - /* early initialization */ 65 - 66 - void __init platform_init(bp_tag_t *first) 67 - { 68 - } 69 - 70 - /* Heartbeat. */ 71 - 72 - void platform_heartbeat(void) 73 - { 74 57 } 75 58 76 59 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT