Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: sun6i: Change pinctrl nodes to avoid warning

All our pinctrl nodes were using a node name convention with a unit-address
to differentiate the different muxing options. However, since those nodes
didn't have a reg property, they were generating warnings in DTC.

In order to accomodate for this, convert the old nodes to the syntax we've
been using for the new SoCs, including removing the letter suffix of the
node labels to the bank of those pins to make things more readable.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

+68 -68
+1 -1
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
··· 72 72 73 73 &uart0 { 74 74 pinctrl-names = "default"; 75 - pinctrl-0 = <&uart0_pins_a>; 75 + pinctrl-0 = <&uart0_ph_pins>; 76 76 status = "okay"; 77 77 }; 78 78
+6 -6
arch/arm/boot/dts/sun6i-a31-colombus.dts
··· 77 77 78 78 &gmac { 79 79 pinctrl-names = "default"; 80 - pinctrl-0 = <&gmac_pins_rgmii_a>; 80 + pinctrl-0 = <&gmac_rgmii_pins>; 81 81 phy = <&phy1>; 82 82 phy-mode = "rgmii"; 83 83 status = "okay"; ··· 89 89 90 90 &i2c0 { 91 91 pinctrl-names = "default"; 92 - pinctrl-0 = <&i2c0_pins_a>; 92 + pinctrl-0 = <&i2c0_pins>; 93 93 status = "fail"; 94 94 }; 95 95 96 96 &i2c1 { 97 97 pinctrl-names = "default"; 98 - pinctrl-0 = <&i2c1_pins_a>; 98 + pinctrl-0 = <&i2c1_pins>; 99 99 status = "okay"; 100 100 }; 101 101 102 102 &i2c2 { 103 103 pinctrl-names = "default"; 104 - pinctrl-0 = <&i2c2_pins_a>; 104 + pinctrl-0 = <&i2c2_pins>; 105 105 status = "okay"; 106 106 107 107 mma8452: mma8452@1d { ··· 114 114 115 115 &mmc0 { 116 116 pinctrl-names = "default"; 117 - pinctrl-0 = <&mmc0_pins_a>; 117 + pinctrl-0 = <&mmc0_pins>; 118 118 vmmc-supply = <&reg_vcc3v0>; 119 119 bus-width = <4>; 120 120 cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ ··· 136 136 137 137 &uart0 { 138 138 pinctrl-names = "default"; 139 - pinctrl-0 = <&uart0_pins_a>; 139 + pinctrl-0 = <&uart0_ph_pins>; 140 140 status = "okay"; 141 141 }; 142 142
+8 -8
arch/arm/boot/dts/sun6i-a31-hummingbird.dts
··· 160 160 161 161 &gmac { 162 162 pinctrl-names = "default"; 163 - pinctrl-0 = <&gmac_pins_rgmii_a>; 163 + pinctrl-0 = <&gmac_rgmii_pins>; 164 164 phy = <&phy1>; 165 165 phy-mode = "rgmii"; 166 166 snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; ··· 185 185 186 186 &i2c0 { 187 187 pinctrl-names = "default"; 188 - pinctrl-0 = <&i2c0_pins_a>; 188 + pinctrl-0 = <&i2c0_pins>; 189 189 /* pull-ups and devices require AXP221 DLDO3 */ 190 190 status = "failed"; 191 191 }; 192 192 193 193 &i2c1 { 194 194 pinctrl-names = "default"; 195 - pinctrl-0 = <&i2c1_pins_a>; 195 + pinctrl-0 = <&i2c1_pins>; 196 196 status = "okay"; 197 197 }; 198 198 199 199 &i2c2 { 200 200 pinctrl-names = "default"; 201 - pinctrl-0 = <&i2c2_pins_a>; 201 + pinctrl-0 = <&i2c2_pins>; 202 202 status = "okay"; 203 203 204 204 pcf8563: rtc@51 { ··· 209 209 210 210 &ir { 211 211 pinctrl-names = "default"; 212 - pinctrl-0 = <&ir_pins_a>; 212 + pinctrl-0 = <&s_ir_rx_pin>; 213 213 status = "okay"; 214 214 }; 215 215 216 216 &mmc0 { 217 217 pinctrl-names = "default"; 218 - pinctrl-0 = <&mmc0_pins_a>; 218 + pinctrl-0 = <&mmc0_pins>; 219 219 vmmc-supply = <&reg_dcdc1>; 220 220 bus-width = <4>; 221 221 cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ ··· 224 224 225 225 &mmc1 { 226 226 pinctrl-names = "default"; 227 - pinctrl-0 = <&mmc1_pins_a>; 227 + pinctrl-0 = <&mmc1_pins>; 228 228 vmmc-supply = <&reg_aldo1>; 229 229 mmc-pwrseq = <&wifi_pwrseq>; 230 230 bus-width = <4>; ··· 331 331 332 332 &uart0 { 333 333 pinctrl-names = "default"; 334 - pinctrl-0 = <&uart0_pins_a>; 334 + pinctrl-0 = <&uart0_ph_pins>; 335 335 status = "okay"; 336 336 }; 337 337
+5 -5
arch/arm/boot/dts/sun6i-a31-i7.dts
··· 116 116 117 117 &gmac { 118 118 pinctrl-names = "default"; 119 - pinctrl-0 = <&gmac_pins_mii_a>; 119 + pinctrl-0 = <&gmac_mii_pins>; 120 120 phy = <&phy1>; 121 121 phy-mode = "mii"; 122 122 status = "okay"; ··· 138 138 139 139 &ir { 140 140 pinctrl-names = "default"; 141 - pinctrl-0 = <&ir_pins_a>; 141 + pinctrl-0 = <&s_ir_rx_pin>; 142 142 status = "okay"; 143 143 }; 144 144 145 145 &mmc0 { 146 146 pinctrl-names = "default"; 147 - pinctrl-0 = <&mmc0_pins_a>; 147 + pinctrl-0 = <&mmc0_pins>; 148 148 vmmc-supply = <&reg_vcc3v3>; 149 149 bus-width = <4>; 150 150 cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */ ··· 158 158 159 159 &spdif { 160 160 pinctrl-names = "default"; 161 - pinctrl-0 = <&spdif_pins_a>; 161 + pinctrl-0 = <&spdif_tx_pin>; 162 162 spdif-out = "okay"; 163 163 status = "okay"; 164 164 }; ··· 169 169 170 170 &uart0 { 171 171 pinctrl-names = "default"; 172 - pinctrl-0 = <&uart0_pins_a>; 172 + pinctrl-0 = <&uart0_ph_pins>; 173 173 status = "okay"; 174 174 }; 175 175
+4 -4
arch/arm/boot/dts/sun6i-a31-m9.dts
··· 83 83 84 84 &gmac { 85 85 pinctrl-names = "default"; 86 - pinctrl-0 = <&gmac_pins_mii_a>; 86 + pinctrl-0 = <&gmac_mii_pins>; 87 87 phy = <&phy1>; 88 88 phy-mode = "mii"; 89 89 phy-supply = <&reg_dldo1>; ··· 96 96 97 97 &ir { 98 98 pinctrl-names = "default"; 99 - pinctrl-0 = <&ir_pins_a>; 99 + pinctrl-0 = <&s_ir_rx_pin>; 100 100 status = "okay"; 101 101 }; 102 102 103 103 &mmc0 { 104 104 pinctrl-names = "default"; 105 - pinctrl-0 = <&mmc0_pins_a>; 105 + pinctrl-0 = <&mmc0_pins>; 106 106 vmmc-supply = <&reg_dcdc1>; 107 107 bus-width = <4>; 108 108 cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */ ··· 201 201 202 202 &uart0 { 203 203 pinctrl-names = "default"; 204 - pinctrl-0 = <&uart0_pins_a>; 204 + pinctrl-0 = <&uart0_ph_pins>; 205 205 status = "okay"; 206 206 }; 207 207
+4 -4
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
··· 83 83 84 84 &gmac { 85 85 pinctrl-names = "default"; 86 - pinctrl-0 = <&gmac_pins_mii_a>; 86 + pinctrl-0 = <&gmac_mii_pins>; 87 87 phy = <&phy1>; 88 88 phy-mode = "mii"; 89 89 phy-supply = <&reg_dldo1>; ··· 96 96 97 97 &ir { 98 98 pinctrl-names = "default"; 99 - pinctrl-0 = <&ir_pins_a>; 99 + pinctrl-0 = <&s_ir_rx_pin>; 100 100 status = "okay"; 101 101 }; 102 102 103 103 &mmc0 { 104 104 pinctrl-names = "default"; 105 - pinctrl-0 = <&mmc0_pins_a>; 105 + pinctrl-0 = <&mmc0_pins>; 106 106 vmmc-supply = <&reg_dcdc1>; 107 107 bus-width = <4>; 108 108 cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */ ··· 201 201 202 202 &uart0 { 203 203 pinctrl-names = "default"; 204 - pinctrl-0 = <&uart0_pins_a>; 204 + pinctrl-0 = <&uart0_ph_pins>; 205 205 status = "okay"; 206 206 }; 207 207
+17 -17
arch/arm/boot/dts/sun6i-a31.dtsi
··· 606 606 #interrupt-cells = <3>; 607 607 #gpio-cells = <3>; 608 608 609 - gmac_pins_gmii_a: gmac_gmii@0 { 609 + gmac_gmii_pins: gmac-gmii-pins { 610 610 pins = "PA0", "PA1", "PA2", "PA3", 611 611 "PA4", "PA5", "PA6", "PA7", 612 612 "PA8", "PA9", "PA10", "PA11", ··· 622 622 drive-strength = <30>; 623 623 }; 624 624 625 - gmac_pins_mii_a: gmac_mii@0 { 625 + gmac_mii_pins: gmac-mii-pins { 626 626 pins = "PA0", "PA1", "PA2", "PA3", 627 627 "PA8", "PA9", "PA11", 628 628 "PA12", "PA13", "PA14", "PA19", ··· 631 631 function = "gmac"; 632 632 }; 633 633 634 - gmac_pins_rgmii_a: gmac_rgmii@0 { 634 + gmac_rgmii_pins: gmac-rgmii-pins { 635 635 pins = "PA0", "PA1", "PA2", "PA3", 636 636 "PA9", "PA10", "PA11", 637 637 "PA12", "PA13", "PA14", "PA19", ··· 644 644 drive-strength = <40>; 645 645 }; 646 646 647 - i2c0_pins_a: i2c0@0 { 647 + i2c0_pins: i2c0-pins { 648 648 pins = "PH14", "PH15"; 649 649 function = "i2c0"; 650 650 }; 651 651 652 - i2c1_pins_a: i2c1@0 { 652 + i2c1_pins: i2c1-pins { 653 653 pins = "PH16", "PH17"; 654 654 function = "i2c1"; 655 655 }; 656 656 657 - i2c2_pins_a: i2c2@0 { 657 + i2c2_pins: i2c2-pins { 658 658 pins = "PH18", "PH19"; 659 659 function = "i2c2"; 660 660 }; 661 661 662 - lcd0_rgb888_pins: lcd0_rgb888 { 662 + lcd0_rgb888_pins: lcd0-rgb888-pins { 663 663 pins = "PD0", "PD1", "PD2", "PD3", 664 664 "PD4", "PD5", "PD6", "PD7", 665 665 "PD8", "PD9", "PD10", "PD11", ··· 670 670 function = "lcd0"; 671 671 }; 672 672 673 - mmc0_pins_a: mmc0@0 { 673 + mmc0_pins: mmc0-pins { 674 674 pins = "PF0", "PF1", "PF2", 675 675 "PF3", "PF4", "PF5"; 676 676 function = "mmc0"; ··· 678 678 bias-pull-up; 679 679 }; 680 680 681 - mmc1_pins_a: mmc1@0 { 681 + mmc1_pins: mmc1-pins { 682 682 pins = "PG0", "PG1", "PG2", "PG3", 683 683 "PG4", "PG5"; 684 684 function = "mmc1"; ··· 686 686 bias-pull-up; 687 687 }; 688 688 689 - mmc2_pins_a: mmc2@0 { 689 + mmc2_4bit_pins: mmc2-4bit-pins { 690 690 pins = "PC6", "PC7", "PC8", "PC9", 691 691 "PC10", "PC11"; 692 692 function = "mmc2"; ··· 694 694 bias-pull-up; 695 695 }; 696 696 697 - mmc2_8bit_emmc_pins: mmc2@1 { 697 + mmc2_8bit_emmc_pins: mmc2-8bit-emmc-pins { 698 698 pins = "PC6", "PC7", "PC8", "PC9", 699 699 "PC10", "PC11", "PC12", 700 700 "PC13", "PC14", "PC15", ··· 704 704 bias-pull-up; 705 705 }; 706 706 707 - mmc3_8bit_emmc_pins: mmc3@1 { 707 + mmc3_8bit_emmc_pins: mmc3-8bit-emmc-pins { 708 708 pins = "PC6", "PC7", "PC8", "PC9", 709 709 "PC10", "PC11", "PC12", 710 710 "PC13", "PC14", "PC15", ··· 714 714 bias-pull-up; 715 715 }; 716 716 717 - spdif_pins_a: spdif@0 { 717 + spdif_tx_pin: spdif-tx-pin { 718 718 pins = "PH28"; 719 719 function = "spdif"; 720 720 }; 721 721 722 - uart0_pins_a: uart0@0 { 722 + uart0_ph_pins: uart0-ph-pins { 723 723 pins = "PH20", "PH21"; 724 724 function = "uart0"; 725 725 }; ··· 1372 1372 #size-cells = <0>; 1373 1373 #gpio-cells = <3>; 1374 1374 1375 - ir_pins_a: ir@0 { 1375 + s_ir_rx_pin: s-ir-rx-pin { 1376 1376 pins = "PL4"; 1377 1377 function = "s_ir"; 1378 1378 }; 1379 1379 1380 - p2wi_pins: p2wi { 1380 + s_p2wi_pins: s-p2wi-pins { 1381 1381 pins = "PL0", "PL1"; 1382 1382 function = "s_p2wi"; 1383 1383 }; ··· 1391 1391 clock-frequency = <100000>; 1392 1392 resets = <&apb0_rst 3>; 1393 1393 pinctrl-names = "default"; 1394 - pinctrl-0 = <&p2wi_pins>; 1394 + pinctrl-0 = <&s_p2wi_pins>; 1395 1395 status = "disabled"; 1396 1396 #address-cells = <1>; 1397 1397 #size-cells = <0>;
+3 -3
arch/arm/boot/dts/sun6i-a31s-cs908.dts
··· 66 66 67 67 &gmac { 68 68 pinctrl-names = "default"; 69 - pinctrl-0 = <&gmac_pins_mii_a>; 69 + pinctrl-0 = <&gmac_mii_pins>; 70 70 phy = <&phy1>; 71 71 phy-mode = "mii"; 72 72 status = "okay"; ··· 77 77 78 78 &ir { 79 79 pinctrl-names = "default"; 80 - pinctrl-0 = <&ir_pins_a>; 80 + pinctrl-0 = <&s_ir_rx_pin>; 81 81 status = "okay"; 82 82 }; 83 83 ··· 87 87 88 88 &uart0 { 89 89 pinctrl-names = "default"; 90 - pinctrl-0 = <&uart0_pins_a>; 90 + pinctrl-0 = <&uart0_ph_pins>; 91 91 status = "okay"; 92 92 }; 93 93
+1 -1
arch/arm/boot/dts/sun6i-a31s-inet-q972.dts
··· 55 55 56 56 &i2c1 { 57 57 pinctrl-names = "default"; 58 - pinctrl-0 = <&i2c1_pins_a>; 58 + pinctrl-0 = <&i2c1_pins>; 59 59 status = "okay"; 60 60 61 61 ft5406ee8: touchscreen@38 {
+4 -4
arch/arm/boot/dts/sun6i-a31s-primo81.dts
··· 91 91 &i2c0 { 92 92 /* pull-ups and device VDDIO use AXP221 DLDO3 */ 93 93 pinctrl-names = "default"; 94 - pinctrl-0 = <&i2c0_pins_a>; 94 + pinctrl-0 = <&i2c0_pins>; 95 95 status = "failed"; 96 96 }; 97 97 98 98 &i2c1 { 99 99 pinctrl-names = "default"; 100 - pinctrl-0 = <&i2c1_pins_a>; 100 + pinctrl-0 = <&i2c1_pins>; 101 101 status = "okay"; 102 102 103 103 ctp@5d { ··· 111 111 112 112 &i2c2 { 113 113 pinctrl-names = "default"; 114 - pinctrl-0 = <&i2c2_pins_a>; 114 + pinctrl-0 = <&i2c2_pins>; 115 115 status = "okay"; 116 116 117 117 accelerometer@1c { ··· 146 146 147 147 &mmc0 { 148 148 pinctrl-names = "default"; 149 - pinctrl-0 = <&mmc0_pins_a>; 149 + pinctrl-0 = <&mmc0_pins>; 150 150 vmmc-supply = <&reg_dcdc1>; 151 151 bus-width = <4>; 152 152 cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
+1 -1
arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
··· 135 135 /* UART0 pads available on core board */ 136 136 &uart0 { 137 137 pinctrl-names = "default"; 138 - pinctrl-0 = <&uart0_pins_a>; 138 + pinctrl-0 = <&uart0_ph_pins>; 139 139 status = "okay"; 140 140 }; 141 141
+4 -4
arch/arm/boot/dts/sun6i-a31s-sina31s.dts
··· 114 114 115 115 &gmac { 116 116 pinctrl-names = "default"; 117 - pinctrl-0 = <&gmac_pins_mii_a>; 117 + pinctrl-0 = <&gmac_mii_pins>; 118 118 phy = <&phy1>; 119 119 phy-mode = "mii"; 120 120 phy-supply = <&reg_dldo1>; ··· 137 137 138 138 &ir { 139 139 pinctrl-names = "default"; 140 - pinctrl-0 = <&ir_pins_a>; 140 + pinctrl-0 = <&s_ir_rx_pin>; 141 141 status = "okay"; 142 142 }; 143 143 ··· 162 162 163 163 &mmc0 { 164 164 pinctrl-names = "default"; 165 - pinctrl-0 = <&mmc0_pins_a>; 165 + pinctrl-0 = <&mmc0_pins>; 166 166 vmmc-supply = <&reg_dcdc1>; 167 167 bus-width = <4>; 168 168 cd-gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */ ··· 181 181 182 182 &spdif { 183 183 pinctrl-names = "default"; 184 - pinctrl-0 = <&spdif_pins_a>; 184 + pinctrl-0 = <&spdif_tx_pin>; 185 185 status = "okay"; 186 186 }; 187 187
+5 -5
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
··· 91 91 92 92 &gmac { 93 93 pinctrl-names = "default"; 94 - pinctrl-0 = <&gmac_pins_rgmii_a>; 94 + pinctrl-0 = <&gmac_rgmii_pins>; 95 95 phy = <&phy1>; 96 96 phy-mode = "rgmii"; 97 97 phy-supply = <&reg_dldo1>; ··· 107 107 108 108 &ir { 109 109 pinctrl-names = "default"; 110 - pinctrl-0 = <&ir_pins_a>; 110 + pinctrl-0 = <&s_ir_rx_pin>; 111 111 status = "okay"; 112 112 }; 113 113 114 114 &mmc0 { 115 115 pinctrl-names = "default"; 116 - pinctrl-0 = <&mmc0_pins_a>; 116 + pinctrl-0 = <&mmc0_pins>; 117 117 vmmc-supply = <&reg_dcdc1>; 118 118 bus-width = <4>; 119 119 cd-gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */ ··· 122 122 123 123 &mmc2 { 124 124 pinctrl-names = "default"; 125 - pinctrl-0 = <&mmc2_pins_a>; 125 + pinctrl-0 = <&mmc2_4bit_pins>; 126 126 vmmc-supply = <&reg_aldo1>; 127 127 mmc-pwrseq = <&mmc2_pwrseq>; 128 128 bus-width = <4>; ··· 254 254 255 255 &uart0 { 256 256 pinctrl-names = "default"; 257 - pinctrl-0 = <&uart0_pins_a>; 257 + pinctrl-0 = <&uart0_ph_pins>; 258 258 status = "okay"; 259 259 }; 260 260
+4 -4
arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
··· 63 63 64 64 &i2c1 { 65 65 pinctrl-names = "default"; 66 - pinctrl-0 = <&i2c1_pins_a>; 66 + pinctrl-0 = <&i2c1_pins>; 67 67 status = "okay"; 68 68 }; 69 69 70 70 &i2c2 { 71 71 pinctrl-names = "default"; 72 - pinctrl-0 = <&i2c2_pins_a>; 72 + pinctrl-0 = <&i2c2_pins>; 73 73 status = "okay"; 74 74 }; 75 75 ··· 91 91 92 92 &mmc0 { 93 93 pinctrl-names = "default"; 94 - pinctrl-0 = <&mmc0_pins_a>; 94 + pinctrl-0 = <&mmc0_pins>; 95 95 vmmc-supply = <&reg_vcc3v0>; 96 96 bus-width = <4>; 97 97 cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ ··· 177 177 178 178 &uart0 { 179 179 pinctrl-names = "default"; 180 - pinctrl-0 = <&uart0_pins_a>; 180 + pinctrl-0 = <&uart0_ph_pins>; 181 181 status = "okay"; 182 182 }; 183 183
+1 -1
arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
··· 66 66 67 67 &mmc0 { 68 68 pinctrl-names = "default"; 69 - pinctrl-0 = <&mmc0_pins_a>; 69 + pinctrl-0 = <&mmc0_pins>; 70 70 vmmc-supply = <&reg_dcdc1>; 71 71 bus-width = <4>; 72 72 cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */