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ARM: dts: rockchip: remove #address-cells and #size-cells from i2s nodes

An experimental test with the command below gives
for example this error:

arch/arm/boot/dts/rk3036-evb.dt.yaml: i2s@10220000:
'#address-cells', '#size-cells'
do not match any of the regexes: 'pinctrl-[0-9]+'

'#address-cells' and '#size-cells' are not a valid property
for i2s nodes, so remove them.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200311162524.19748-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

authored by

Johan Jonker and committed by
Heiko Stuebner 9b505cf5 d4502e63

-18
-2
arch/arm/boot/dts/rk3036.dtsi
··· 281 281 compatible = "rockchip,rk3036-i2s", "rockchip,rk3066-i2s"; 282 282 reg = <0x10220000 0x4000>; 283 283 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 284 - #address-cells = <1>; 285 - #size-cells = <0>; 286 284 clock-names = "i2s_clk", "i2s_hclk"; 287 285 clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>; 288 286 dmas = <&pdma 0>, <&pdma 1>;
-6
arch/arm/boot/dts/rk3066a.dtsi
··· 156 156 compatible = "rockchip,rk3066-i2s"; 157 157 reg = <0x10118000 0x2000>; 158 158 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 159 - #address-cells = <1>; 160 - #size-cells = <0>; 161 159 pinctrl-names = "default"; 162 160 pinctrl-0 = <&i2s0_bus>; 163 161 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; ··· 172 174 compatible = "rockchip,rk3066-i2s"; 173 175 reg = <0x1011a000 0x2000>; 174 176 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 175 - #address-cells = <1>; 176 - #size-cells = <0>; 177 177 pinctrl-names = "default"; 178 178 pinctrl-0 = <&i2s1_bus>; 179 179 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>; ··· 188 192 compatible = "rockchip,rk3066-i2s"; 189 193 reg = <0x1011c000 0x2000>; 190 194 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 191 - #address-cells = <1>; 192 - #size-cells = <0>; 193 195 pinctrl-names = "default"; 194 196 pinctrl-0 = <&i2s2_bus>; 195 197 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>;
-2
arch/arm/boot/dts/rk3188.dtsi
··· 166 166 compatible = "rockchip,rk3188-i2s", "rockchip,rk3066-i2s"; 167 167 reg = <0x1011a000 0x2000>; 168 168 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 169 - #address-cells = <1>; 170 - #size-cells = <0>; 171 169 pinctrl-names = "default"; 172 170 pinctrl-0 = <&i2s0_bus>; 173 171 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
-6
arch/arm/boot/dts/rk322x.dtsi
··· 152 152 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; 153 153 reg = <0x100b0000 0x4000>; 154 154 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 155 - #address-cells = <1>; 156 - #size-cells = <0>; 157 155 clock-names = "i2s_clk", "i2s_hclk"; 158 156 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>; 159 157 dmas = <&pdma 14>, <&pdma 15>; ··· 165 167 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; 166 168 reg = <0x100c0000 0x4000>; 167 169 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 168 - #address-cells = <1>; 169 - #size-cells = <0>; 170 170 clock-names = "i2s_clk", "i2s_hclk"; 171 171 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>; 172 172 dmas = <&pdma 11>, <&pdma 12>; ··· 189 193 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; 190 194 reg = <0x100e0000 0x4000>; 191 195 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 192 - #address-cells = <1>; 193 - #size-cells = <0>; 194 196 clock-names = "i2s_clk", "i2s_hclk"; 195 197 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>; 196 198 dmas = <&pdma 0>, <&pdma 1>;
-2
arch/arm/boot/dts/rk3288.dtsi
··· 968 968 reg = <0x0 0xff890000 0x0 0x10000>; 969 969 #sound-dai-cells = <0>; 970 970 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 971 - #address-cells = <1>; 972 - #size-cells = <0>; 973 971 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; 974 972 clock-names = "i2s_clk", "i2s_hclk"; 975 973 dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>;