tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

ARM: dts: am335x-lxm: Use AM33XX_IOPAD pinmux macro

Use the pinmux IOPAD macro to define the register absolute physical
address instead of the offset from the padconf base address. This
makes the DTS easier to read since matches the addresses listed in
the Technical Reference Manual.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

authored by

Javier Martinez Canillas and committed by
Tony Lindgren 9b0aebdd 06e08fda

+60 -60
+60 -60
arch/arm/boot/dts/am335x-lxm.dts
··· 46 46 &am33xx_pinmux { 47 47 mmc1_pins: pinmux_mmc1_pins { 48 48 pinctrl-single,pins = < 49 - 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */ 50 - 0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */ 51 - 0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */ 52 - 0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */ 53 - 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */ 54 - 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */ 49 + AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */ 50 + AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */ 51 + AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */ 52 + AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */ 53 + AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */ 54 + AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */ 55 55 >; 56 56 }; 57 57 58 58 i2c0_pins: pinmux_i2c0_pins { 59 59 pinctrl-single,pins = < 60 - 0x188 (PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 61 - 0x18c (PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 60 + AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 61 + AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 62 62 >; 63 63 }; 64 64 65 65 cpsw_default: cpsw_default { 66 66 pinctrl-single,pins = < 67 67 /* Slave 1 */ 68 - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */ 69 - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_crs_dv */ 70 - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rxer */ 71 - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_txen */ 72 - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td1 */ 73 - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td0 */ 74 - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd1 */ 75 - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd0 */ 76 - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk */ 68 + AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */ 69 + AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_crs_dv */ 70 + AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rxer */ 71 + AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_txen */ 72 + AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td1 */ 73 + AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td0 */ 74 + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd1 */ 75 + AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd0 */ 76 + AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk */ 77 77 78 78 /* Slave 2 */ 79 - 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */ 80 - 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */ 81 - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */ 82 - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */ 83 - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */ 84 - 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */ 85 - 0x74 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */ 86 - 0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */ 87 - 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */ 79 + AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */ 80 + AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */ 81 + AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */ 82 + AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */ 83 + AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */ 84 + AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */ 85 + AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */ 86 + AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */ 87 + AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */ 88 88 >; 89 89 }; 90 90 91 91 cpsw_sleep: cpsw_sleep { 92 92 pinctrl-single,pins = < 93 93 /* Slave 1 reset value */ 94 - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */ 95 - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_crs_dv */ 96 - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rxer */ 97 - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_txen */ 98 - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td1 */ 99 - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td0 */ 100 - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd1 */ 101 - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd0 */ 102 - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk */ 94 + AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */ 95 + AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_crs_dv */ 96 + AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rxer */ 97 + AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_txen */ 98 + AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td1 */ 99 + AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td0 */ 100 + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd1 */ 101 + AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd0 */ 102 + AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk */ 103 103 104 104 /* Slave 2 reset value*/ 105 - 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_txen */ 106 - 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td1 */ 107 - 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td0 */ 108 - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd1 */ 109 - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd0 */ 110 - 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_crs_dv */ 111 - 0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rxer */ 112 - 0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */ 113 - 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_refclk */ 105 + AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_txen */ 106 + AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td1 */ 107 + AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td0 */ 108 + AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd1 */ 109 + AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd0 */ 110 + AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_crs_dv */ 111 + AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rxer */ 112 + AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */ 113 + AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_refclk */ 114 114 >; 115 115 }; 116 116 117 117 davinci_mdio_default: davinci_mdio_default { 118 118 pinctrl-single,pins = < 119 119 /* MDIO */ 120 - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 121 - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 120 + AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 121 + AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 122 122 >; 123 123 }; 124 124 125 125 davinci_mdio_sleep: davinci_mdio_sleep { 126 126 pinctrl-single,pins = < 127 127 /* MDIO reset value */ 128 - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 129 - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 128 + AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 129 + AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 130 130 >; 131 131 }; 132 132 133 133 emmc_pins: pinmux_emmc_pins { 134 134 pinctrl-single,pins = < 135 - 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 136 - 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 137 - 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 138 - 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 139 - 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 140 - 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 141 - 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 142 - 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 143 - 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 144 - 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 135 + AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 136 + AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 137 + AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 138 + AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 139 + AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 140 + AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 141 + AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 142 + AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 143 + AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 144 + AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 145 145 >; 146 146 }; 147 147 148 148 uart0_pins: pinmux_uart0_pins { 149 149 pinctrl-single,pins = < 150 - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 151 - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 150 + AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 151 + AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 152 152 >; 153 153 }; 154 154 };