Merge branch 's3c2410' of git://aeryn.fluff.org.uk/bjdooks/linux.git

authored by Russell King and committed by Russell King 9abc6461 f8787fdc

+20 -18
+5 -5
arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
··· 48 #define S3C2443_CLKSRC_I2S_EPLLREF3 (3<<14) 49 #define S3C2443_CLKSRC_I2S_MASK (3<<14) 50 51 - #define S3C2443_CLKSRC_EPLLREF_XTAL (2<<8) 52 - #define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<8) 53 - #define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<8) 54 - #define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<8) 55 - #define S3C2443_CLKSRC_EPLLREF_MASK (3<<8) 56 57 #define S3C2443_CLKSRC_ESYSCLK_EPLL (1<<6) 58 #define S3C2443_CLKSRC_MSYSCLK_MPLL (1<<4)
··· 48 #define S3C2443_CLKSRC_I2S_EPLLREF3 (3<<14) 49 #define S3C2443_CLKSRC_I2S_MASK (3<<14) 50 51 + #define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7) 52 + #define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7) 53 + #define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7) 54 + #define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7) 55 + #define S3C2443_CLKSRC_EPLLREF_MASK (3<<7) 56 57 #define S3C2443_CLKSRC_ESYSCLK_EPLL (1<<6) 58 #define S3C2443_CLKSRC_MSYSCLK_MPLL (1<<4)
+2 -1
arch/arm/mach-s3c2410/nor-simtec.c
··· 30 #include <mach/bast-map.h> 31 #include <mach/bast-cpld.h> 32 33 34 static void simtec_nor_vpp(struct map_info *map, int vpp) 35 { ··· 51 local_irq_restore(flags); 52 } 53 54 - struct physmap_flash_data simtec_nor_pdata = { 55 .width = 2, 56 .set_vpp = simtec_nor_vpp, 57 .nr_parts = 0,
··· 30 #include <mach/bast-map.h> 31 #include <mach/bast-cpld.h> 32 33 + #include "nor-simtec.h" 34 35 static void simtec_nor_vpp(struct map_info *map, int vpp) 36 { ··· 50 local_irq_restore(flags); 51 } 52 53 + static struct physmap_flash_data simtec_nor_pdata = { 54 .width = 2, 55 .set_vpp = simtec_nor_vpp, 56 .nr_parts = 0,
+1 -1
arch/arm/mach-s3c2412/mach-jive.c
··· 395 } 396 397 static struct s3c2410_spigpio_info jive_lcd_spi = { 398 - .bus_num = 0, 399 .pin_clk = S3C2410_GPG8, 400 .pin_mosi = S3C2410_GPB8, 401 .chip_select = jive_lcd_spi_chipselect,
··· 395 } 396 397 static struct s3c2410_spigpio_info jive_lcd_spi = { 398 + .bus_num = 1, 399 .pin_clk = S3C2410_GPG8, 400 .pin_mosi = S3C2410_GPB8, 401 .chip_select = jive_lcd_spi_chipselect,
+6 -6
arch/arm/plat-s3c24xx/gpiolib.c
··· 39 * drivers themsevles. 40 */ 41 42 - int s3c24xx_gpiolib_input(struct gpio_chip *chip, unsigned offset) 43 { 44 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); 45 void __iomem *base = ourchip->base; ··· 58 return 0; 59 } 60 61 - int s3c24xx_gpiolib_output(struct gpio_chip *chip, 62 unsigned offset, int value) 63 { 64 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); ··· 86 return 0; 87 } 88 89 - void s3c24xx_gpiolib_set(struct gpio_chip *chip, unsigned offset, int value) 90 { 91 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); 92 void __iomem *base = ourchip->base; ··· 105 local_irq_restore(flags); 106 } 107 108 - int s3c24xx_gpiolib_get(struct gpio_chip *chip, unsigned offset) 109 { 110 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); 111 unsigned long val; ··· 151 return 0; 152 } 153 154 - 155 - struct s3c24xx_gpio_chip gpios[] = { 156 [0] = { 157 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), 158 .chip = {
··· 39 * drivers themsevles. 40 */ 41 42 + static int s3c24xx_gpiolib_input(struct gpio_chip *chip, unsigned offset) 43 { 44 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); 45 void __iomem *base = ourchip->base; ··· 58 return 0; 59 } 60 61 + static int s3c24xx_gpiolib_output(struct gpio_chip *chip, 62 unsigned offset, int value) 63 { 64 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); ··· 86 return 0; 87 } 88 89 + static void s3c24xx_gpiolib_set(struct gpio_chip *chip, 90 + unsigned offset, int value) 91 { 92 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); 93 void __iomem *base = ourchip->base; ··· 104 local_irq_restore(flags); 105 } 106 107 + static int s3c24xx_gpiolib_get(struct gpio_chip *chip, unsigned offset) 108 { 109 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); 110 unsigned long val; ··· 150 return 0; 151 } 152 153 + static struct s3c24xx_gpio_chip gpios[] = { 154 [0] = { 155 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), 156 .chip = {
+3 -3
arch/arm/plat-s3c24xx/pwm-clock.c
··· 89 90 /* TODO - add set rate calls. */ 91 92 - struct clk clk_timer_scaler[] = { 93 [0] = { 94 .name = "pwm-scaler0", 95 .id = -1, ··· 102 }, 103 }; 104 105 - struct clk clk_timer_tclk[] = { 106 [0] = { 107 .name = "pwm-tclk0", 108 .id = -1, ··· 232 return 0; 233 } 234 235 - struct pwm_tdiv_clk clk_timer_tdiv[] = { 236 [0] = { 237 .clk = { 238 .name = "pwm-tdiv",
··· 89 90 /* TODO - add set rate calls. */ 91 92 + static struct clk clk_timer_scaler[] = { 93 [0] = { 94 .name = "pwm-scaler0", 95 .id = -1, ··· 102 }, 103 }; 104 105 + static struct clk clk_timer_tclk[] = { 106 [0] = { 107 .name = "pwm-tclk0", 108 .id = -1, ··· 232 return 0; 233 } 234 235 + static struct pwm_tdiv_clk clk_timer_tdiv[] = { 236 [0] = { 237 .clk = { 238 .name = "pwm-tdiv",
+3 -2
arch/arm/plat-s3c24xx/pwm.c
··· 19 #include <linux/io.h> 20 #include <linux/pwm.h> 21 22 #include <asm/plat-s3c/regs-timer.h> 23 24 struct pwm_device { ··· 39 unsigned char pwm_id; 40 }; 41 42 - #define pwm_dbg(_pwm, msg...) dev_info(&(_pwm)->pdev->dev, msg) 43 44 static struct clk *clk_scaler[2]; 45 ··· 169 170 EXPORT_SYMBOL(pwm_disable); 171 172 - unsigned long pwm_calc_tin(struct pwm_device *pwm, unsigned long freq) 173 { 174 unsigned long tin_parent_rate; 175 unsigned int div;
··· 19 #include <linux/io.h> 20 #include <linux/pwm.h> 21 22 + #include <asm/plat-s3c24xx/devs.h> 23 #include <asm/plat-s3c/regs-timer.h> 24 25 struct pwm_device { ··· 38 unsigned char pwm_id; 39 }; 40 41 + #define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg) 42 43 static struct clk *clk_scaler[2]; 44 ··· 168 169 EXPORT_SYMBOL(pwm_disable); 170 171 + static unsigned long pwm_calc_tin(struct pwm_device *pwm, unsigned long freq) 172 { 173 unsigned long tin_parent_rate; 174 unsigned int div;