Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: firmware: arm,scmi: Add properties for i.MX95 Pinctrl OEM extensions

i.MX95 Pinctrl is managed by System Control Management Interface(SCMI)
firmware using OEM extensions. No functions, no groups are provided by
the firmware. So add i.MX95 specific properties.

To keep aligned with current i.MX pinctrl bindings, still use "fsl,pins"
for i.MX95.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Link: https://lore.kernel.org/r/20240521-pinctrl-scmi-imx95-v1-1-9a1175d735fd@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Peng Fan and committed by
Linus Walleij
997f2cde d85e2ccd

+56 -1
+3 -1
Documentation/devicetree/bindings/firmware/arm,scmi.yaml
··· 251 251 type: object 252 252 allOf: 253 253 - $ref: '#/$defs/protocol-node' 254 - - $ref: /schemas/pinctrl/pinctrl.yaml 254 + - anyOf: 255 + - $ref: /schemas/pinctrl/pinctrl.yaml 256 + - $ref: /schemas/firmware/nxp,imx95-scmi-pinctrl.yaml 255 257 256 258 unevaluatedProperties: false 257 259
+53
Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + # Copyright 2024 NXP 3 + %YAML 1.2 4 + --- 5 + $id: http://devicetree.org/schemas/firmware/nxp,imx95-scmi-pinctrl.yaml# 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 + 8 + title: i.MX System Control and Management Interface (SCMI) Pinctrl Protocol 9 + 10 + maintainers: 11 + - Peng Fan <peng.fan@nxp.com> 12 + 13 + allOf: 14 + - $ref: /schemas/pinctrl/pinctrl.yaml 15 + 16 + patternProperties: 17 + 'grp$': 18 + type: object 19 + description: 20 + Pinctrl node's client devices use subnodes for desired pin configuration. 21 + Client device subnodes use below standard properties. 22 + 23 + unevaluatedProperties: false 24 + 25 + properties: 26 + fsl,pins: 27 + description: 28 + each entry consists of 6 integers and represents the mux and config 29 + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg 30 + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can 31 + be found in <arch/arm64/boot/dts/freescale/imx95-pinfunc.h>. The last 32 + integer CONFIG is the pad setting value like pull-up on this pin. 33 + Please refer to i.MX95 Reference Manual for detailed CONFIG settings. 34 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 35 + items: 36 + items: 37 + - description: | 38 + "mux_reg" indicates the offset of mux register. 39 + - description: | 40 + "conf_reg" indicates the offset of pad configuration register. 41 + - description: | 42 + "input_reg" indicates the offset of select input register. 43 + - description: | 44 + "mux_val" indicates the mux value to be applied. 45 + - description: | 46 + "input_val" indicates the select input value to be applied. 47 + - description: | 48 + "pad_setting" indicates the pad configuration value to be applied. 49 + 50 + required: 51 + - fsl,pins 52 + 53 + additionalProperties: true