Merge branch 'pci/dt-bindings'

- Increase qcom iommu-map maxItems to accommodate SDX55 (five entries) and
SDM845 (sixteen entries) (Krzysztof Kozlowski)

- Describe qcom,pcie-sc8180x clocks and resets accurately (Krzysztof
Kozlowski)

- Describe qcom,pcie-sm8150 clocks and resets accurately (Krzysztof
Kozlowski)

- Correct the qcom "reset-name" property, previously incorrectly called
"reset-names" (Krzysztof Kozlowski)

- Document rockchip optional PCIe reference clock input (Heiko Stuebner)

- Document qcom,pcie-sm8650, based on qcom,pcie-sm8550 (Neil Armstrong)

* pci/dt-bindings:
dt-bindings: PCI: qcom: Document the SM8650 PCIe Controller
dt-bindings: PCI: dwc: rockchip: Document optional PCIe reference clock input
dt-bindings: PCI: qcom: Correct reset-names property
dt-bindings: PCI: qcom: Correct clocks for SM8150
dt-bindings: PCI: qcom: Correct clocks for SC8180x
dt-bindings: PCI: qcom: Adjust iommu-map for different SoC

Documentation/devicetree/bindings/pci/qcom,pcie.yaml

···
           - qcom,pcie-sm8450-pcie1
           - qcom,pcie-sm8550
       - items:
+          - enum:
+              - qcom,pcie-sm8650
+          - const: qcom,pcie-sm8550
+      - items:
           - const: qcom,pcie-msm8998
           - const: qcom,pcie-msm8996
 
···
     maxItems: 8
 
   iommu-map:
-    maxItems: 2
+    minItems: 1
+    maxItems: 16
 
   # Common definitions for clocks, clock-names and reset.
   # Platform constraints are described later.
···
     minItems: 1
     maxItems: 12
 
-  resets-names:
+  reset-names:
     minItems: 1
     maxItems: 12
 
···
         compatible:
           contains:
             enum:
+              - qcom,pcie-sc8180x
+    then:
+      properties:
+        clocks:
+          minItems: 8
+          maxItems: 8
+        clock-names:
+          items:
+            - const: pipe # PIPE clock
+            - const: aux # Auxiliary clock
+            - const: cfg # Configuration clock
+            - const: bus_master # Master AXI clock
+            - const: bus_slave # Slave AXI clock
+            - const: slave_q2a # Slave Q2A clock
+            - const: ref # REFERENCE clock
+            - const: tbu # PCIe TBU clock
+        resets:
+          maxItems: 1
+        reset-names:
+          items:
+            - const: pci # PCIe core reset
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
               - qcom,pcie-sdm845
     then:
       oneOf:
···
         compatible:
           contains:
             enum:
-              - qcom,pcie-sc8180x
               - qcom,pcie-sm8150
+    then:
+      properties:
+        clocks:
+          minItems: 8
+          maxItems: 8
+        clock-names:
+          items:
+            - const: pipe # PIPE clock
+            - const: aux # Auxiliary clock
+            - const: cfg # Configuration clock
+            - const: bus_master # Master AXI clock
+            - const: bus_slave # Slave AXI clock
+            - const: slave_q2a # Slave Q2A clock
+            - const: tbu # PCIe TBU clock
+            - const: ref # REFERENCE clock
+        resets:
+          maxItems: 1
+        reset-names:
+          items:
+            - const: pci # PCIe core reset
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
               - qcom,pcie-sm8250
     then:
       oneOf:

Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml

···
       - description: APB clock for PCIe
       - description: Auxiliary clock for PCIe
       - description: PIPE clock
+      - description: Reference clock for PCIe
 
   clock-names:
     minItems: 5
···
       - const: pclk
       - const: aux
       - const: pipe
+      - const: ref
 
   interrupts:
     items: