Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ASoC: tlv320aic32x4: Support for master clock

Add support for a master clock passed through DT. The master clock of
the codec is only active when the codec is in use.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>

authored by

Markus Pargmann and committed by
Mark Brown
98b664e2 4d16700d

+25
+4
Documentation/devicetree/bindings/sound/tlv320aic32x4.txt
··· 8 8 9 9 Optional properties: 10 10 - reset-gpios: Reset-GPIO phandle with args as described in gpio/gpio.txt 11 + - clocks/clock-names: Clock named 'mclk' for the master clock of the codec. 12 + See clock/clock-bindings.txt for information about the detailed format. 11 13 12 14 13 15 Example: ··· 17 15 codec: tlv320aic32x4@18 { 18 16 compatible = "ti,tlv320aic32x4"; 19 17 reg = <0x18>; 18 + clocks = <&clks 201>; 19 + clock-names = "mclk"; 20 20 };
+21
sound/soc/codecs/tlv320aic32x4.c
··· 33 33 #include <linux/i2c.h> 34 34 #include <linux/cdev.h> 35 35 #include <linux/slab.h> 36 + #include <linux/clk.h> 36 37 37 38 #include <sound/tlv320aic32x4.h> 38 39 #include <sound/core.h> ··· 68 67 u32 micpga_routing; 69 68 bool swapdacs; 70 69 int rstn_gpio; 70 + struct clk *mclk; 71 71 }; 72 72 73 73 /* 0dB min, 0.5dB steps */ ··· 489 487 static int aic32x4_set_bias_level(struct snd_soc_codec *codec, 490 488 enum snd_soc_bias_level level) 491 489 { 490 + struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); 491 + int ret; 492 + 492 493 switch (level) { 493 494 case SND_SOC_BIAS_ON: 495 + /* Switch on master clock */ 496 + ret = clk_prepare_enable(aic32x4->mclk); 497 + if (ret) { 498 + dev_err(codec->dev, "Failed to enable master clock\n"); 499 + return ret; 500 + } 501 + 494 502 /* Switch on PLL */ 495 503 snd_soc_update_bits(codec, AIC32X4_PLLPR, 496 504 AIC32X4_PLLEN, AIC32X4_PLLEN); ··· 551 539 /* Switch off BCLK_N Divider */ 552 540 snd_soc_update_bits(codec, AIC32X4_BCLKN, 553 541 AIC32X4_BCLKEN, 0); 542 + 543 + /* Switch off master clock */ 544 + clk_disable_unprepare(aic32x4->mclk); 554 545 break; 555 546 case SND_SOC_BIAS_OFF: 556 547 break; ··· 730 715 aic32x4->swapdacs = false; 731 716 aic32x4->micpga_routing = 0; 732 717 aic32x4->rstn_gpio = -1; 718 + } 719 + 720 + aic32x4->mclk = devm_clk_get(&i2c->dev, "mclk"); 721 + if (IS_ERR(aic32x4->mclk)) { 722 + dev_err(&i2c->dev, "Failed getting the mclk. The current implementation does not support the usage of this codec without mclk\n"); 723 + return PTR_ERR(aic32x4->mclk); 733 724 } 734 725 735 726 if (gpio_is_valid(aic32x4->rstn_gpio)) {