Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[SCSI] isci: change sas phy timeouts from 54us to 59us

Need the following workaround in the driver for interoperability with
the older Intel SSD drives and any other SATA drive that may exhibit the
same behavior. This is a corner case where SCU speed is limited to
either 3G or 1.5G and the drive has a period of DC idle when it switches
speed during SATA speed negotiation. Workaround :change PHYTOV[31:24]
from 0x36 to 0x3B.

Signed-off-by: Marcin Tomczak <marcin.tomczak@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>

authored by

Marcin Tomczak and committed by
James Bottomley
985af6f7 ee33e2b7

+25
+13
drivers/scsi/isci/phy.c
··· 104 104 u32 parity_count = 0; 105 105 u32 llctl, link_rate; 106 106 u32 clksm_value = 0; 107 + u32 sp_timeouts = 0; 107 108 108 109 iphy->link_layer_registers = reg; 109 110 ··· 211 210 } 212 211 llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate); 213 212 writel(llctl, &iphy->link_layer_registers->link_layer_control); 213 + 214 + sp_timeouts = readl(&iphy->link_layer_registers->sas_phy_timeouts); 215 + 216 + /* Clear the default 0x36 (54us) RATE_CHANGE timeout value. */ 217 + sp_timeouts &= ~SCU_SAS_PHYTOV_GEN_VAL(RATE_CHANGE, 0xFF); 218 + 219 + /* Set RATE_CHANGE timeout value to 0x3B (59us). This ensures SCU can 220 + * lock with 3Gb drive when SCU max rate is set to 1.5Gb. 221 + */ 222 + sp_timeouts |= SCU_SAS_PHYTOV_GEN_VAL(RATE_CHANGE, 0x3B); 223 + 224 + writel(sp_timeouts, &iphy->link_layer_registers->sas_phy_timeouts); 214 225 215 226 if (is_a2(ihost->pdev)) { 216 227 /* Program the max ARB time for the PHY to 700us so we inter-operate with
+12
drivers/scsi/isci/registers.h
··· 1299 1299 #define SCU_AFE_XCVRCR_OFFSET 0x00DC 1300 1300 #define SCU_AFE_LUTCR_OFFSET 0x00E0 1301 1301 1302 + #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_ALIGN_DETECTION_SHIFT (0UL) 1303 + #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_ALIGN_DETECTION_MASK (0x000000FFUL) 1304 + #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_HOT_PLUG_SHIFT (8UL) 1305 + #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_HOT_PLUG_MASK (0x0000FF00UL) 1306 + #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_COMSAS_DETECTION_SHIFT (16UL) 1307 + #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_COMSAS_DETECTION_MASK (0x00FF0000UL) 1308 + #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_RATE_CHANGE_SHIFT (24UL) 1309 + #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_RATE_CHANGE_MASK (0xFF000000UL) 1310 + 1311 + #define SCU_SAS_PHYTOV_GEN_VAL(name, value) \ 1312 + SCU_GEN_VALUE(SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_##name, value) 1313 + 1302 1314 #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_SHIFT (0) 1303 1315 #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_MASK (0x00000003) 1304 1316 #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1 (0)