Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915: Always use intel_get_crtc_for_pipe()

Replace the open coded dev_priv->pipe_to_crtc_mapping[] usage with
intel_get_crtc_for_pipe().

Mostly done with coccinelle, with a few manual tweaks

@@
expression E1, E2;
@@
(
- E1->pipe_to_crtc_mapping[E2]
+ intel_get_crtc_for_pipe(E1, E2)
|
- E1->plane_to_crtc_mapping[E2]
+ intel_get_crtc_for_plane(E1, E2)
)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1477946245-14134-12-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

+26 -19
+3 -2
drivers/gpu/drm/i915/i915_debugfs.c
··· 4065 4065 bool enable) 4066 4066 { 4067 4067 struct drm_device *dev = &dev_priv->drm; 4068 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[PIPE_A]; 4068 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A); 4069 4069 struct intel_crtc_state *pipe_config; 4070 4070 struct drm_atomic_state *state; 4071 4071 int ret = 0; ··· 4203 4203 /* real source -> none transition */ 4204 4204 if (source == INTEL_PIPE_CRC_SOURCE_NONE) { 4205 4205 struct intel_pipe_crc_entry *entries; 4206 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 4206 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, 4207 + pipe); 4207 4208 4208 4209 DRM_DEBUG_DRIVER("stopping CRCs for pipe %c\n", 4209 4210 pipe_name(pipe));
+4 -2
drivers/gpu/drm/i915/i915_irq.c
··· 725 725 struct drm_i915_private *dev_priv = to_i915(dev); 726 726 i915_reg_t high_frame, low_frame; 727 727 u32 high1, high2, low, pixel, vbl_start, hsync_start, htotal; 728 - struct intel_crtc *intel_crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 728 + struct intel_crtc *intel_crtc = intel_get_crtc_for_pipe(dev_priv, 729 + pipe); 729 730 const struct drm_display_mode *mode = &intel_crtc->base.hwmode; 730 731 731 732 htotal = mode->crtc_htotal; ··· 831 830 const struct drm_display_mode *mode) 832 831 { 833 832 struct drm_i915_private *dev_priv = to_i915(dev); 834 - struct intel_crtc *intel_crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 833 + struct intel_crtc *intel_crtc = intel_get_crtc_for_pipe(dev_priv, 834 + pipe); 835 835 int position; 836 836 int vbl_start, vbl_end, hsync_start, htotal, vtotal; 837 837 bool in_vbl = true;
+12 -9
drivers/gpu/drm/i915/intel_display.c
··· 1030 1030 enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, 1031 1031 enum pipe pipe) 1032 1032 { 1033 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 1033 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 1034 1034 1035 1035 return crtc->config->cpu_transcoder; 1036 1036 } ··· 1785 1785 static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv, 1786 1786 enum pipe pipe) 1787 1787 { 1788 - struct intel_crtc *intel_crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 1788 + struct intel_crtc *intel_crtc = intel_get_crtc_for_pipe(dev_priv, 1789 + pipe); 1789 1790 i915_reg_t reg; 1790 1791 uint32_t val, pipeconf_val; 1791 1792 ··· 11663 11662 void intel_finish_page_flip_cs(struct drm_i915_private *dev_priv, int pipe) 11664 11663 { 11665 11664 struct drm_device *dev = &dev_priv->drm; 11666 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 11665 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 11667 11666 struct intel_flip_work *work; 11668 11667 unsigned long flags; 11669 11668 ··· 11689 11688 void intel_finish_page_flip_mmio(struct drm_i915_private *dev_priv, int pipe) 11690 11689 { 11691 11690 struct drm_device *dev = &dev_priv->drm; 11692 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 11691 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 11693 11692 struct intel_flip_work *work; 11694 11693 unsigned long flags; 11695 11694 ··· 12119 12118 void intel_check_page_flip(struct drm_i915_private *dev_priv, int pipe) 12120 12119 { 12121 12120 struct drm_device *dev = &dev_priv->drm; 12122 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 12121 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 12123 12122 struct intel_flip_work *work; 12124 12123 12125 12124 WARN_ON(!in_interrupt()); ··· 14178 14177 return; 14179 14178 14180 14179 for_each_pipe(dev_priv, pipe) { 14181 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 14180 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, 14181 + pipe); 14182 14182 14183 14183 if (!((1 << pipe) & crtc_mask)) 14184 14184 continue; ··· 14194 14192 } 14195 14193 14196 14194 for_each_pipe(dev_priv, pipe) { 14197 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 14195 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, 14196 + pipe); 14198 14197 long lret; 14199 14198 14200 14199 if (!((1 << pipe) & crtc_mask)) ··· 16870 16867 pipe = 0; 16871 16868 16872 16869 if (encoder->get_hw_state(encoder, &pipe)) { 16873 - crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 16870 + crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 16874 16871 16875 16872 encoder->base.crtc = &crtc->base; 16876 16873 crtc->config->output_types |= 1 << encoder->type; ··· 16972 16969 } 16973 16970 16974 16971 for_each_pipe(dev_priv, pipe) { 16975 - crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 16972 + crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 16976 16973 16977 16974 intel_sanitize_crtc(crtc); 16978 16975 intel_dump_pipe_config(crtc, crtc->config,
+6 -5
drivers/gpu/drm/i915/intel_fifo_underrun.c
··· 57 57 assert_spin_locked(&dev_priv->irq_lock); 58 58 59 59 for_each_pipe(dev_priv, pipe) { 60 - crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 60 + crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 61 61 62 62 if (crtc->cpu_fifo_underrun_disabled) 63 63 return false; ··· 75 75 assert_spin_locked(&dev_priv->irq_lock); 76 76 77 77 for_each_pipe(dev_priv, pipe) { 78 - crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 78 + crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 79 79 80 80 if (crtc->pch_fifo_underrun_disabled) 81 81 return false; ··· 245 245 enum pipe pipe, bool enable) 246 246 { 247 247 struct drm_i915_private *dev_priv = to_i915(dev); 248 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 248 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 249 249 bool old; 250 250 251 251 assert_spin_locked(&dev_priv->irq_lock); ··· 313 313 enum transcoder pch_transcoder, 314 314 bool enable) 315 315 { 316 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pch_transcoder]; 316 + struct intel_crtc *crtc = 317 + intel_get_crtc_for_pipe(dev_priv, (enum pipe) pch_transcoder); 317 318 unsigned long flags; 318 319 bool old; 319 320 ··· 357 356 void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, 358 357 enum pipe pipe) 359 358 { 360 - struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 359 + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 361 360 362 361 /* We may be called too early in init, thanks BIOS! */ 363 362 if (crtc == NULL)
+1 -1
drivers/gpu/drm/i915/intel_pm.c
··· 3065 3065 3066 3066 /* Since we're now guaranteed to only have one active CRTC... */ 3067 3067 pipe = ffs(intel_state->active_crtcs) - 1; 3068 - crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 3068 + crtc = intel_get_crtc_for_pipe(dev_priv, pipe); 3069 3069 cstate = to_intel_crtc_state(crtc->base.state); 3070 3070 3071 3071 if (crtc->base.state->adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)