platform/mellanox: Rename field to improve code readability

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Rename field 'counter' in 'mlxreg_core_hotplug_platform_data' to count.

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://lore.kernel.org/r/20250412091843.33943-2-vadimp@nvidia.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

authored by

Vadim Pasternak and committed by

Ilpo Järvinen 11 months ago 98152782 8c173c39

+20 -20

4 changed files

expand all

drivers

platform

mellanox

mlx-platform.c

mlxreg-hotplug.c

nvsw-sn2201.c

include

linux

platform_data

mlxreg.h

+13 -13

drivers/platform/mellanox/mlx-platform.c

··· 852 852 static 853 853 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_data = { 854 854 .items = mlxplat_mlxcpld_default_items, 855 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_items), 855 + .count = ARRAY_SIZE(mlxplat_mlxcpld_default_items), 856 856 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 857 857 .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, 858 858 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 892 892 static 893 893 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_wc_data = { 894 894 .items = mlxplat_mlxcpld_default_wc_items, 895 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_wc_items), 895 + .count = ARRAY_SIZE(mlxplat_mlxcpld_default_wc_items), 896 896 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 897 897 .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, 898 898 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 902 902 static 903 903 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_comex_data = { 904 904 .items = mlxplat_mlxcpld_comex_items, 905 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_comex_items), 905 + .count = ARRAY_SIZE(mlxplat_mlxcpld_comex_items), 906 906 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 907 907 .mask = MLXPLAT_CPLD_AGGR_MASK_CARR_DEF, 908 908 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRCX_OFFSET, ··· 949 949 static 950 950 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn21xx_data = { 951 951 .items = mlxplat_mlxcpld_msn21xx_items, 952 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_items), 952 + .count = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_items), 953 953 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 954 954 .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, 955 955 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 1058 1058 static 1059 1059 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn274x_data = { 1060 1060 .items = mlxplat_mlxcpld_msn274x_items, 1061 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_items), 1061 + .count = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_items), 1062 1062 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 1063 1063 .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, 1064 1064 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 1105 1105 static 1106 1106 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn201x_data = { 1107 1107 .items = mlxplat_mlxcpld_msn201x_items, 1108 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn201x_items), 1108 + .count = ARRAY_SIZE(mlxplat_mlxcpld_msn201x_items), 1109 1109 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 1110 1110 .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, 1111 1111 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 1229 1229 static 1230 1230 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_ng_data = { 1231 1231 .items = mlxplat_mlxcpld_default_ng_items, 1232 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_items), 1232 + .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_items), 1233 1233 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 1234 1234 .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, 1235 1235 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 1389 1389 static 1390 1390 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = { 1391 1391 .items = mlxplat_mlxcpld_ext_items, 1392 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_ext_items), 1392 + .count = ARRAY_SIZE(mlxplat_mlxcpld_ext_items), 1393 1393 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 1394 1394 .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, 1395 1395 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 1399 1399 static 1400 1400 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ng800_data = { 1401 1401 .items = mlxplat_mlxcpld_ng800_items, 1402 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_ng800_items), 1402 + .count = ARRAY_SIZE(mlxplat_mlxcpld_ng800_items), 1403 1403 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 1404 1404 .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, 1405 1405 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 2240 2240 static 2241 2241 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_modular_data = { 2242 2242 .items = mlxplat_mlxcpld_modular_items, 2243 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_items), 2243 + .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_items), 2244 2244 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 2245 2245 .mask = MLXPLAT_CPLD_AGGR_MASK_MODULAR, 2246 2246 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 2272 2272 static 2273 2273 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = { 2274 2274 .items = mlxplat_mlxcpld_chassis_blade_items, 2275 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_items), 2275 + .count = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_items), 2276 2276 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 2277 2277 .mask = MLXPLAT_CPLD_AGGR_MASK_COMEX, 2278 2278 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 2363 2363 static 2364 2364 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_rack_switch_data = { 2365 2365 .items = mlxplat_mlxcpld_rack_switch_items, 2366 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_rack_switch_items), 2366 + .count = ARRAY_SIZE(mlxplat_mlxcpld_rack_switch_items), 2367 2367 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 2368 2368 .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, 2369 2369 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ··· 2518 2518 static 2519 2519 struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_l1_switch_data = { 2520 2520 .items = mlxplat_mlxcpld_l1_switch_events_items, 2521 - .counter = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_events_items), 2521 + .count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_events_items), 2522 2522 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, 2523 2523 .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, 2524 2524 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,

+4 -4

drivers/platform/mellanox/mlxreg-hotplug.c

··· 262 262 item = pdata->items; 263 263 264 264 /* Go over all kinds of items - psu, pwr, fan. */ 265 - for (i = 0; i < pdata->counter; i++, item++) { 265 + for (i = 0; i < pdata->count; i++, item++) { 266 266 if (item->capability) { 267 267 /* 268 268 * Read group capability register to get actual number ··· 541 541 goto unmask_event; 542 542 543 543 /* Handle topology and health configuration changes. */ 544 - for (i = 0; i < pdata->counter; i++, item++) { 544 + for (i = 0; i < pdata->count; i++, item++) { 545 545 if (aggr_asserted & item->aggr_mask) { 546 546 if (item->health) 547 547 mlxreg_hotplug_health_work_helper(priv, item); ··· 590 590 pdata = dev_get_platdata(&priv->pdev->dev); 591 591 item = pdata->items; 592 592 593 - for (i = 0; i < pdata->counter; i++, item++) { 593 + for (i = 0; i < pdata->count; i++, item++) { 594 594 /* Clear group presense event. */ 595 595 ret = regmap_write(priv->regmap, item->reg + 596 596 MLXREG_HOTPLUG_EVENT_OFF, 0); ··· 674 674 0); 675 675 676 676 /* Clear topology configurations. */ 677 - for (i = 0; i < pdata->counter; i++, item++) { 677 + for (i = 0; i < pdata->count; i++, item++) { 678 678 data = item->data; 679 679 /* Mask group presense event. */ 680 680 regmap_write(priv->regmap, data->reg + MLXREG_HOTPLUG_MASK_OFF,

+1 -1

drivers/platform/mellanox/nvsw-sn2201.c

··· 517 517 static 518 518 struct mlxreg_core_hotplug_platform_data nvsw_sn2201_hotplug = { 519 519 .items = nvsw_sn2201_items, 520 - .counter = ARRAY_SIZE(nvsw_sn2201_items), 520 + .count = ARRAY_SIZE(nvsw_sn2201_items), 521 521 .cell = NVSW_SN2201_SYS_INT_STATUS_OFFSET, 522 522 .mask = NVSW_SN2201_CPLD_AGGR_MASK_DEF, 523 523 };

+2 -2

include/linux/platform_data/mlxreg.h

··· 209 209 * @items: same type components with the hotplug capability; 210 210 * @irq: platform interrupt number; 211 211 * @regmap: register map of parent device; 212 - * @counter: number of the components with the hotplug capability; 212 + * @count: number of the components with the hotplug capability; 213 213 * @cell: location of top aggregation interrupt register; 214 214 * @mask: top aggregation interrupt common mask; 215 215 * @cell_low: location of low aggregation interrupt register; ··· 224 224 struct mlxreg_core_item *items; 225 225 int irq; 226 226 void *regmap; 227 - int counter; 227 + int count; 228 228 u32 cell; 229 229 u32 mask; 230 230 u32 cell_low;