Merge HEAD from master.kernel.org:/home/rmk/linux-2.6-serial.git

+395 -527
+167 -174
drivers/parport/parport_serial.c
··· 23 23 #include <linux/pci.h> 24 24 #include <linux/parport.h> 25 25 #include <linux/parport_pc.h> 26 - #include <linux/serial.h> 27 - #include <linux/serialP.h> 28 - #include <linux/list.h> 29 26 #include <linux/8250_pci.h> 30 - 31 - #include <asm/serial.h> 32 27 33 28 enum parport_pc_pci_cards { 34 29 titan_110l = 0, ··· 163 168 }; 164 169 MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl); 165 170 166 - struct pci_board_no_ids { 167 - int flags; 168 - int num_ports; 169 - int base_baud; 170 - int uart_offset; 171 - int reg_shift; 172 - int (*init_fn)(struct pci_dev *dev, struct pci_board_no_ids *board, 173 - int enable); 174 - int first_uart_offset; 175 - }; 176 - 177 - static int __devinit siig10x_init_fn(struct pci_dev *dev, struct pci_board_no_ids *board, int enable) 178 - { 179 - return pci_siig10x_fn(dev, enable); 180 - } 181 - 182 - static int __devinit siig20x_init_fn(struct pci_dev *dev, struct pci_board_no_ids *board, int enable) 183 - { 184 - return pci_siig20x_fn(dev, enable); 185 - } 186 - 187 - static int __devinit netmos_serial_init(struct pci_dev *dev, struct pci_board_no_ids *board, int enable) 188 - { 189 - board->num_ports = dev->subsystem_device & 0xf; 190 - return 0; 191 - } 192 - 193 - static struct pci_board_no_ids pci_boards[] __devinitdata = { 194 - /* 195 - * PCI Flags, Number of Ports, Base (Maximum) Baud Rate, 196 - * Offset to get to next UART's registers, 197 - * Register shift to use for memory-mapped I/O, 198 - * Initialization function, first UART offset 199 - */ 200 - 201 - // Cards not tested are marked n/t 202 - // If you have one of these cards and it works for you, please tell me.. 203 - 204 - /* titan_110l */ { SPCI_FL_BASE1 | SPCI_FL_BASE_TABLE, 1, 921600 }, 205 - /* titan_210l */ { SPCI_FL_BASE1 | SPCI_FL_BASE_TABLE, 2, 921600 }, 206 - /* netmos_9xx5_combo */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200, 0, 0, netmos_serial_init }, 207 - /* netmos_9855 */ { SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 1, 115200, 0, 0, netmos_serial_init }, 208 - /* avlab_1s1p (n/t) */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, 209 - /* avlab_1s1p_650 (nt)*/{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, 210 - /* avlab_1s1p_850 (nt)*/{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, 211 - /* avlab_1s2p (n/t) */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, 212 - /* avlab_1s2p_650 (nt)*/{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, 213 - /* avlab_1s2p_850 (nt)*/{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, 214 - /* avlab_2s1p (n/t) */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 115200 }, 215 - /* avlab_2s1p_650 (nt)*/{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 115200 }, 216 - /* avlab_2s1p_850 (nt)*/{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 115200 }, 217 - /* siig_1s1p_10x */ { SPCI_FL_BASE2, 1, 460800, 0, 0, siig10x_init_fn }, 218 - /* siig_2s1p_10x */ { SPCI_FL_BASE2, 1, 921600, 0, 0, siig10x_init_fn }, 219 - /* siig_2p1s_20x */ { SPCI_FL_BASE0, 1, 921600, 0, 0, siig20x_init_fn }, 220 - /* siig_1s1p_20x */ { SPCI_FL_BASE0, 1, 921600, 0, 0, siig20x_init_fn }, 221 - /* siig_2s1p_20x */ { SPCI_FL_BASE0, 1, 921600, 0, 0, siig20x_init_fn }, 171 + /* 172 + * This table describes the serial "geometry" of these boards. Any 173 + * quirks for these can be found in drivers/serial/8250_pci.c 174 + * 175 + * Cards not tested are marked n/t 176 + * If you have one of these cards and it works for you, please tell me.. 177 + */ 178 + static struct pciserial_board pci_parport_serial_boards[] __devinitdata = { 179 + [titan_110l] = { 180 + .flags = FL_BASE1 | FL_BASE_BARS, 181 + .num_ports = 1, 182 + .base_baud = 921600, 183 + .uart_offset = 8, 184 + }, 185 + [titan_210l] = { 186 + .flags = FL_BASE1 | FL_BASE_BARS, 187 + .num_ports = 2, 188 + .base_baud = 921600, 189 + .uart_offset = 8, 190 + }, 191 + [netmos_9xx5_combo] = { 192 + .flags = FL_BASE0 | FL_BASE_BARS, 193 + .num_ports = 1, 194 + .base_baud = 115200, 195 + .uart_offset = 8, 196 + }, 197 + [netmos_9855] = { 198 + .flags = FL_BASE2 | FL_BASE_BARS, 199 + .num_ports = 1, 200 + .base_baud = 115200, 201 + .uart_offset = 8, 202 + }, 203 + [avlab_1s1p] = { /* n/t */ 204 + .flags = FL_BASE0 | FL_BASE_BARS, 205 + .num_ports = 1, 206 + .base_baud = 115200, 207 + .uart_offset = 8, 208 + }, 209 + [avlab_1s1p_650] = { /* nt */ 210 + .flags = FL_BASE0 | FL_BASE_BARS, 211 + .num_ports = 1, 212 + .base_baud = 115200, 213 + .uart_offset = 8, 214 + }, 215 + [avlab_1s1p_850] = { /* nt */ 216 + .flags = FL_BASE0 | FL_BASE_BARS, 217 + .num_ports = 1, 218 + .base_baud = 115200, 219 + .uart_offset = 8, 220 + }, 221 + [avlab_1s2p] = { /* n/t */ 222 + .flags = FL_BASE0 | FL_BASE_BARS, 223 + .num_ports = 1, 224 + .base_baud = 115200, 225 + .uart_offset = 8, 226 + }, 227 + [avlab_1s2p_650] = { /* nt */ 228 + .flags = FL_BASE0 | FL_BASE_BARS, 229 + .num_ports = 1, 230 + .base_baud = 115200, 231 + .uart_offset = 8, 232 + }, 233 + [avlab_1s2p_850] = { /* nt */ 234 + .flags = FL_BASE0 | FL_BASE_BARS, 235 + .num_ports = 1, 236 + .base_baud = 115200, 237 + .uart_offset = 8, 238 + }, 239 + [avlab_2s1p] = { /* n/t */ 240 + .flags = FL_BASE0 | FL_BASE_BARS, 241 + .num_ports = 2, 242 + .base_baud = 115200, 243 + .uart_offset = 8, 244 + }, 245 + [avlab_2s1p_650] = { /* nt */ 246 + .flags = FL_BASE0 | FL_BASE_BARS, 247 + .num_ports = 2, 248 + .base_baud = 115200, 249 + .uart_offset = 8, 250 + }, 251 + [avlab_2s1p_850] = { /* nt */ 252 + .flags = FL_BASE0 | FL_BASE_BARS, 253 + .num_ports = 2, 254 + .base_baud = 115200, 255 + .uart_offset = 8, 256 + }, 257 + [siig_1s1p_10x] = { 258 + .flags = FL_BASE2, 259 + .num_ports = 1, 260 + .base_baud = 460800, 261 + .uart_offset = 8, 262 + }, 263 + [siig_2s1p_10x] = { 264 + .flags = FL_BASE2, 265 + .num_ports = 1, 266 + .base_baud = 921600, 267 + .uart_offset = 8, 268 + }, 269 + [siig_2p1s_20x] = { 270 + .flags = FL_BASE0, 271 + .num_ports = 1, 272 + .base_baud = 921600, 273 + .uart_offset = 8, 274 + }, 275 + [siig_1s1p_20x] = { 276 + .flags = FL_BASE0, 277 + .num_ports = 1, 278 + .base_baud = 921600, 279 + .uart_offset = 8, 280 + }, 281 + [siig_2s1p_20x] = { 282 + .flags = FL_BASE0, 283 + .num_ports = 1, 284 + .base_baud = 921600, 285 + .uart_offset = 8, 286 + }, 222 287 }; 223 288 224 289 struct parport_serial_private { 225 - int num_ser; 226 - int line[20]; 227 - struct pci_board_no_ids ser; 290 + struct serial_private *serial; 228 291 int num_par; 229 292 struct parport *port[PARPORT_MAX]; 230 293 struct parport_pc_pci par; 231 294 }; 232 295 233 - static int __devinit get_pci_port (struct pci_dev *dev, 234 - struct pci_board_no_ids *board, 235 - struct serial_struct *req, 236 - int idx) 237 - { 238 - unsigned long port; 239 - int base_idx; 240 - int max_port; 241 - int offset; 242 - 243 - base_idx = SPCI_FL_GET_BASE(board->flags); 244 - if (board->flags & SPCI_FL_BASE_TABLE) 245 - base_idx += idx; 246 - 247 - if (board->flags & SPCI_FL_REGION_SZ_CAP) { 248 - max_port = pci_resource_len(dev, base_idx) / 8; 249 - if (idx >= max_port) 250 - return 1; 251 - } 252 - 253 - offset = board->first_uart_offset; 254 - 255 - /* Timedia/SUNIX uses a mixture of BARs and offsets */ 256 - /* Ugh, this is ugly as all hell --- TYT */ 257 - if(dev->vendor == PCI_VENDOR_ID_TIMEDIA ) /* 0x1409 */ 258 - switch(idx) { 259 - case 0: base_idx=0; 260 - break; 261 - case 1: base_idx=0; offset=8; 262 - break; 263 - case 2: base_idx=1; 264 - break; 265 - case 3: base_idx=1; offset=8; 266 - break; 267 - case 4: /* BAR 2*/ 268 - case 5: /* BAR 3 */ 269 - case 6: /* BAR 4*/ 270 - case 7: base_idx=idx-2; /* BAR 5*/ 271 - } 272 - 273 - port = pci_resource_start(dev, base_idx) + offset; 274 - 275 - if ((board->flags & SPCI_FL_BASE_TABLE) == 0) 276 - port += idx * (board->uart_offset ? board->uart_offset : 8); 277 - 278 - if (pci_resource_flags (dev, base_idx) & IORESOURCE_IO) { 279 - int high_bits_offset = ((sizeof(long)-sizeof(int))*8); 280 - req->port = port; 281 - if (high_bits_offset) 282 - req->port_high = port >> high_bits_offset; 283 - else 284 - req->port_high = 0; 285 - return 0; 286 - } 287 - req->io_type = SERIAL_IO_MEM; 288 - req->iomem_base = ioremap(port, board->uart_offset); 289 - req->iomem_reg_shift = board->reg_shift; 290 - req->port = 0; 291 - return req->iomem_base ? 0 : 1; 292 - } 293 - 294 296 /* Register the serial port(s) of a PCI card. */ 295 297 static int __devinit serial_register (struct pci_dev *dev, 296 298 const struct pci_device_id *id) 297 299 { 298 - struct pci_board_no_ids *board; 299 300 struct parport_serial_private *priv = pci_get_drvdata (dev); 300 - struct serial_struct serial_req; 301 - int base_baud; 302 - int k; 303 - int success = 0; 301 + struct pciserial_board *board; 302 + struct serial_private *serial; 304 303 305 - priv->ser = pci_boards[id->driver_data]; 306 - board = &priv->ser; 307 - if (board->init_fn && ((board->init_fn) (dev, board, 1) != 0)) 308 - return 1; 304 + board = &pci_parport_serial_boards[id->driver_data]; 305 + serial = pciserial_init_ports(dev, board); 309 306 310 - base_baud = board->base_baud; 311 - if (!base_baud) 312 - base_baud = BASE_BAUD; 313 - memset (&serial_req, 0, sizeof (serial_req)); 307 + if (IS_ERR(serial)) 308 + return PTR_ERR(serial); 314 309 315 - for (k = 0; k < board->num_ports; k++) { 316 - int line; 317 - 318 - if (priv->num_ser == ARRAY_SIZE (priv->line)) { 319 - printk (KERN_WARNING 320 - "parport_serial: %s: only %u serial lines " 321 - "supported (%d reported)\n", pci_name (dev), 322 - ARRAY_SIZE (priv->line), board->num_ports); 323 - break; 324 - } 325 - 326 - serial_req.irq = dev->irq; 327 - if (get_pci_port (dev, board, &serial_req, k)) 328 - break; 329 - serial_req.flags = ASYNC_SKIP_TEST | ASYNC_AUTOPROBE; 330 - serial_req.baud_base = base_baud; 331 - line = register_serial (&serial_req); 332 - if (line < 0) { 333 - printk (KERN_DEBUG 334 - "parport_serial: register_serial failed\n"); 335 - continue; 336 - } 337 - priv->line[priv->num_ser++] = line; 338 - success = 1; 339 - } 340 - 341 - return success ? 0 : 1; 310 + priv->serial = serial; 311 + return 0; 342 312 } 343 313 344 314 /* Register the parallel port(s) of a PCI card. */ ··· 371 411 priv = kmalloc (sizeof *priv, GFP_KERNEL); 372 412 if (!priv) 373 413 return -ENOMEM; 374 - priv->num_ser = priv->num_par = 0; 414 + memset(priv, 0, sizeof(struct parport_serial_private)); 375 415 pci_set_drvdata (dev, priv); 376 416 377 417 err = pci_enable_device (dev); ··· 404 444 struct parport_serial_private *priv = pci_get_drvdata (dev); 405 445 int i; 406 446 407 - // Serial ports 408 - for (i = 0; i < priv->num_ser; i++) { 409 - unregister_serial (priv->line[i]); 447 + pci_set_drvdata(dev, NULL); 410 448 411 - if (priv->ser.init_fn) 412 - (priv->ser.init_fn) (dev, &priv->ser, 0); 413 - } 414 - pci_set_drvdata (dev, NULL); 415 - 449 + // Serial ports 450 + if (priv->serial) 451 + pciserial_remove_ports(priv->serial); 452 + 416 453 // Parallel ports 417 454 for (i = 0; i < priv->num_par; i++) 418 455 parport_pc_unregister_port (priv->port[i]); ··· 418 461 return; 419 462 } 420 463 464 + static int parport_serial_pci_suspend(struct pci_dev *dev, pm_message_t state) 465 + { 466 + struct parport_serial_private *priv = pci_get_drvdata(dev); 467 + 468 + if (priv->serial) 469 + pciserial_suspend_ports(priv->serial); 470 + 471 + /* FIXME: What about parport? */ 472 + 473 + pci_save_state(dev); 474 + pci_set_power_state(dev, pci_choose_state(dev, state)); 475 + return 0; 476 + } 477 + 478 + static int parport_serial_pci_resume(struct pci_dev *dev) 479 + { 480 + struct parport_serial_private *priv = pci_get_drvdata(dev); 481 + 482 + pci_set_power_state(dev, PCI_D0); 483 + pci_restore_state(dev); 484 + 485 + /* 486 + * The device may have been disabled. Re-enable it. 487 + */ 488 + pci_enable_device(dev); 489 + 490 + if (priv->serial) 491 + pciserial_resume_ports(priv->serial); 492 + 493 + /* FIXME: What about parport? */ 494 + 495 + return 0; 496 + } 497 + 421 498 static struct pci_driver parport_serial_pci_driver = { 422 499 .name = "parport_serial", 423 500 .id_table = parport_serial_pci_tbl, 424 501 .probe = parport_serial_pci_probe, 425 502 .remove = __devexit_p(parport_serial_pci_remove), 503 + .suspend = parport_serial_pci_suspend, 504 + .resume = parport_serial_pci_resume, 426 505 }; 427 506 428 507
+191 -311
drivers/serial/8250_pci.c
··· 34 34 #undef SERIAL_DEBUG_PCI 35 35 36 36 /* 37 - * Definitions for PCI support. 38 - */ 39 - #define FL_BASE_MASK 0x0007 40 - #define FL_BASE0 0x0000 41 - #define FL_BASE1 0x0001 42 - #define FL_BASE2 0x0002 43 - #define FL_BASE3 0x0003 44 - #define FL_BASE4 0x0004 45 - #define FL_GET_BASE(x) (x & FL_BASE_MASK) 46 - 47 - /* Use successive BARs (PCI base address registers), 48 - else use offset into some specified BAR */ 49 - #define FL_BASE_BARS 0x0008 50 - 51 - /* do not assign an irq */ 52 - #define FL_NOIRQ 0x0080 53 - 54 - /* Use the Base address register size to cap number of ports */ 55 - #define FL_REGION_SZ_CAP 0x0100 56 - 57 - struct pci_board { 58 - unsigned int flags; 59 - unsigned int num_ports; 60 - unsigned int base_baud; 61 - unsigned int uart_offset; 62 - unsigned int reg_shift; 63 - unsigned int first_offset; 64 - }; 65 - 66 - /* 67 37 * init function returns: 68 38 * > 0 - number of ports 69 39 * = 0 - use board->num_ports ··· 45 75 u32 subvendor; 46 76 u32 subdevice; 47 77 int (*init)(struct pci_dev *dev); 48 - int (*setup)(struct pci_dev *dev, struct pci_board *board, 49 - struct uart_port *port, int idx); 78 + int (*setup)(struct serial_private *, struct pciserial_board *, 79 + struct uart_port *, int); 50 80 void (*exit)(struct pci_dev *dev); 51 81 }; 52 82 53 83 #define PCI_NUM_BAR_RESOURCES 6 54 84 55 85 struct serial_private { 86 + struct pci_dev *dev; 56 87 unsigned int nr; 57 88 void __iomem *remapped_bar[PCI_NUM_BAR_RESOURCES]; 58 89 struct pci_serial_quirk *quirk; ··· 72 101 } 73 102 74 103 static int 75 - setup_port(struct pci_dev *dev, struct uart_port *port, 104 + setup_port(struct serial_private *priv, struct uart_port *port, 76 105 int bar, int offset, int regshift) 77 106 { 78 - struct serial_private *priv = pci_get_drvdata(dev); 107 + struct pci_dev *dev = priv->dev; 79 108 unsigned long base, len; 80 109 81 110 if (bar >= PCI_NUM_BAR_RESOURCES) 82 111 return -EINVAL; 83 112 113 + base = pci_resource_start(dev, bar); 114 + 84 115 if (pci_resource_flags(dev, bar) & IORESOURCE_MEM) { 85 - base = pci_resource_start(dev, bar); 86 116 len = pci_resource_len(dev, bar); 87 117 88 118 if (!priv->remapped_bar[bar]) ··· 92 120 return -ENOMEM; 93 121 94 122 port->iotype = UPIO_MEM; 123 + port->iobase = 0; 95 124 port->mapbase = base + offset; 96 125 port->membase = priv->remapped_bar[bar] + offset; 97 126 port->regshift = regshift; 98 127 } else { 99 - base = pci_resource_start(dev, bar) + offset; 100 128 port->iotype = UPIO_PORT; 101 - port->iobase = base; 129 + port->iobase = base + offset; 130 + port->mapbase = 0; 131 + port->membase = NULL; 132 + port->regshift = 0; 102 133 } 103 134 return 0; 104 135 } ··· 111 136 * Not that ugly ;) -- HW 112 137 */ 113 138 static int 114 - afavlab_setup(struct pci_dev *dev, struct pci_board *board, 139 + afavlab_setup(struct serial_private *priv, struct pciserial_board *board, 115 140 struct uart_port *port, int idx) 116 141 { 117 142 unsigned int bar, offset = board->first_offset; ··· 124 149 offset += (idx - 4) * board->uart_offset; 125 150 } 126 151 127 - return setup_port(dev, port, bar, offset, board->reg_shift); 152 + return setup_port(priv, port, bar, offset, board->reg_shift); 128 153 } 129 154 130 155 /* ··· 164 189 * some serial ports are supposed to be hidden on certain models. 165 190 */ 166 191 static int 167 - pci_hp_diva_setup(struct pci_dev *dev, struct pci_board *board, 192 + pci_hp_diva_setup(struct serial_private *priv, struct pciserial_board *board, 168 193 struct uart_port *port, int idx) 169 194 { 170 195 unsigned int offset = board->first_offset; 171 196 unsigned int bar = FL_GET_BASE(board->flags); 172 197 173 - switch (dev->subsystem_device) { 198 + switch (priv->dev->subsystem_device) { 174 199 case PCI_DEVICE_ID_HP_DIVA_MAESTRO: 175 200 if (idx == 3) 176 201 idx++; ··· 187 212 188 213 offset += idx * board->uart_offset; 189 214 190 - return setup_port(dev, port, bar, offset, board->reg_shift); 215 + return setup_port(priv, port, bar, offset, board->reg_shift); 191 216 } 192 217 193 218 /* ··· 282 307 283 308 /* SBS Technologies Inc. PMC-OCTPRO and P-OCTAL cards */ 284 309 static int 285 - sbs_setup(struct pci_dev *dev, struct pci_board *board, 310 + sbs_setup(struct serial_private *priv, struct pciserial_board *board, 286 311 struct uart_port *port, int idx) 287 312 { 288 313 unsigned int bar, offset = board->first_offset; ··· 298 323 } else /* we have only 8 ports on PMC-OCTALPRO */ 299 324 return 1; 300 325 301 - return setup_port(dev, port, bar, offset, board->reg_shift); 326 + return setup_port(priv, port, bar, offset, board->reg_shift); 302 327 } 303 328 304 329 /* ··· 364 389 * - 10x cards have control registers in IO and/or memory space; 365 390 * - 20x cards have control registers in standard PCI configuration space. 366 391 * 392 + * Note: all 10x cards have PCI device ids 0x10.. 393 + * all 20x cards have PCI device ids 0x20.. 394 + * 367 395 * There are also Quartet Serial cards which use Oxford Semiconductor 368 396 * 16954 quad UART PCI chip clocked by 18.432 MHz quartz. 369 397 * ··· 423 445 return 0; 424 446 } 425 447 426 - int pci_siig10x_fn(struct pci_dev *dev, int enable) 448 + static int pci_siig_init(struct pci_dev *dev) 427 449 { 428 - int ret = 0; 429 - if (enable) 430 - ret = pci_siig10x_init(dev); 431 - return ret; 432 - } 450 + unsigned int type = dev->device & 0xff00; 433 451 434 - int pci_siig20x_fn(struct pci_dev *dev, int enable) 435 - { 436 - int ret = 0; 437 - if (enable) 438 - ret = pci_siig20x_init(dev); 439 - return ret; 440 - } 452 + if (type == 0x1000) 453 + return pci_siig10x_init(dev); 454 + else if (type == 0x2000) 455 + return pci_siig20x_init(dev); 441 456 442 - EXPORT_SYMBOL(pci_siig10x_fn); 443 - EXPORT_SYMBOL(pci_siig20x_fn); 457 + moan_device("Unknown SIIG card", dev); 458 + return -ENODEV; 459 + } 444 460 445 461 /* 446 462 * Timedia has an explosion of boards, and to avoid the PCI table from ··· 495 523 * Ugh, this is ugly as all hell --- TYT 496 524 */ 497 525 static int 498 - pci_timedia_setup(struct pci_dev *dev, struct pci_board *board, 526 + pci_timedia_setup(struct serial_private *priv, struct pciserial_board *board, 499 527 struct uart_port *port, int idx) 500 528 { 501 529 unsigned int bar = 0, offset = board->first_offset; ··· 521 549 bar = idx - 2; 522 550 } 523 551 524 - return setup_port(dev, port, bar, offset, board->reg_shift); 552 + return setup_port(priv, port, bar, offset, board->reg_shift); 525 553 } 526 554 527 555 /* 528 556 * Some Titan cards are also a little weird 529 557 */ 530 558 static int 531 - titan_400l_800l_setup(struct pci_dev *dev, struct pci_board *board, 559 + titan_400l_800l_setup(struct serial_private *priv, 560 + struct pciserial_board *board, 532 561 struct uart_port *port, int idx) 533 562 { 534 563 unsigned int bar, offset = board->first_offset; ··· 546 573 offset = (idx - 2) * board->uart_offset; 547 574 } 548 575 549 - return setup_port(dev, port, bar, offset, board->reg_shift); 576 + return setup_port(priv, port, bar, offset, board->reg_shift); 550 577 } 551 578 552 579 static int __devinit pci_xircom_init(struct pci_dev *dev) ··· 566 593 } 567 594 568 595 static int 569 - pci_default_setup(struct pci_dev *dev, struct pci_board *board, 596 + pci_default_setup(struct serial_private *priv, struct pciserial_board *board, 570 597 struct uart_port *port, int idx) 571 598 { 572 599 unsigned int bar, offset = board->first_offset, maxnr; ··· 577 604 else 578 605 offset += idx * board->uart_offset; 579 606 580 - maxnr = (pci_resource_len(dev, bar) - board->first_offset) / 607 + maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) / 581 608 (8 << board->reg_shift); 582 609 583 610 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) 584 611 return 1; 585 612 586 - return setup_port(dev, port, bar, offset, board->reg_shift); 613 + return setup_port(priv, port, bar, offset, board->reg_shift); 587 614 } 588 615 589 616 /* This should be in linux/pci_ids.h */ ··· 727 754 .setup = sbs_setup, 728 755 .exit = __devexit_p(sbs_exit), 729 756 }, 730 - 731 757 /* 732 758 * SIIG cards. 733 - * It is not clear whether these could be collapsed. 734 759 */ 735 760 { 736 761 .vendor = PCI_VENDOR_ID_SIIG, 737 - .device = PCI_DEVICE_ID_SIIG_1S_10x_550, 762 + .device = PCI_ANY_ID, 738 763 .subvendor = PCI_ANY_ID, 739 764 .subdevice = PCI_ANY_ID, 740 - .init = pci_siig10x_init, 741 - .setup = pci_default_setup, 742 - }, 743 - { 744 - .vendor = PCI_VENDOR_ID_SIIG, 745 - .device = PCI_DEVICE_ID_SIIG_1S_10x_650, 746 - .subvendor = PCI_ANY_ID, 747 - .subdevice = PCI_ANY_ID, 748 - .init = pci_siig10x_init, 749 - .setup = pci_default_setup, 750 - }, 751 - { 752 - .vendor = PCI_VENDOR_ID_SIIG, 753 - .device = PCI_DEVICE_ID_SIIG_1S_10x_850, 754 - .subvendor = PCI_ANY_ID, 755 - .subdevice = PCI_ANY_ID, 756 - .init = pci_siig10x_init, 757 - .setup = pci_default_setup, 758 - }, 759 - { 760 - .vendor = PCI_VENDOR_ID_SIIG, 761 - .device = PCI_DEVICE_ID_SIIG_2S_10x_550, 762 - .subvendor = PCI_ANY_ID, 763 - .subdevice = PCI_ANY_ID, 764 - .init = pci_siig10x_init, 765 - .setup = pci_default_setup, 766 - }, 767 - { 768 - .vendor = PCI_VENDOR_ID_SIIG, 769 - .device = PCI_DEVICE_ID_SIIG_2S_10x_650, 770 - .subvendor = PCI_ANY_ID, 771 - .subdevice = PCI_ANY_ID, 772 - .init = pci_siig10x_init, 773 - .setup = pci_default_setup, 774 - }, 775 - { 776 - .vendor = PCI_VENDOR_ID_SIIG, 777 - .device = PCI_DEVICE_ID_SIIG_2S_10x_850, 778 - .subvendor = PCI_ANY_ID, 779 - .subdevice = PCI_ANY_ID, 780 - .init = pci_siig10x_init, 781 - .setup = pci_default_setup, 782 - }, 783 - { 784 - .vendor = PCI_VENDOR_ID_SIIG, 785 - .device = PCI_DEVICE_ID_SIIG_4S_10x_550, 786 - .subvendor = PCI_ANY_ID, 787 - .subdevice = PCI_ANY_ID, 788 - .init = pci_siig10x_init, 789 - .setup = pci_default_setup, 790 - }, 791 - { 792 - .vendor = PCI_VENDOR_ID_SIIG, 793 - .device = PCI_DEVICE_ID_SIIG_4S_10x_650, 794 - .subvendor = PCI_ANY_ID, 795 - .subdevice = PCI_ANY_ID, 796 - .init = pci_siig10x_init, 797 - .setup = pci_default_setup, 798 - }, 799 - { 800 - .vendor = PCI_VENDOR_ID_SIIG, 801 - .device = PCI_DEVICE_ID_SIIG_4S_10x_850, 802 - .subvendor = PCI_ANY_ID, 803 - .subdevice = PCI_ANY_ID, 804 - .init = pci_siig10x_init, 805 - .setup = pci_default_setup, 806 - }, 807 - { 808 - .vendor = PCI_VENDOR_ID_SIIG, 809 - .device = PCI_DEVICE_ID_SIIG_1S_20x_550, 810 - .subvendor = PCI_ANY_ID, 811 - .subdevice = PCI_ANY_ID, 812 - .init = pci_siig20x_init, 813 - .setup = pci_default_setup, 814 - }, 815 - { 816 - .vendor = PCI_VENDOR_ID_SIIG, 817 - .device = PCI_DEVICE_ID_SIIG_1S_20x_650, 818 - .subvendor = PCI_ANY_ID, 819 - .subdevice = PCI_ANY_ID, 820 - .init = pci_siig20x_init, 821 - .setup = pci_default_setup, 822 - }, 823 - { 824 - .vendor = PCI_VENDOR_ID_SIIG, 825 - .device = PCI_DEVICE_ID_SIIG_1S_20x_850, 826 - .subvendor = PCI_ANY_ID, 827 - .subdevice = PCI_ANY_ID, 828 - .init = pci_siig20x_init, 829 - .setup = pci_default_setup, 830 - }, 831 - { 832 - .vendor = PCI_VENDOR_ID_SIIG, 833 - .device = PCI_DEVICE_ID_SIIG_2S_20x_550, 834 - .subvendor = PCI_ANY_ID, 835 - .subdevice = PCI_ANY_ID, 836 - .init = pci_siig20x_init, 837 - .setup = pci_default_setup, 838 - }, 839 - { .vendor = PCI_VENDOR_ID_SIIG, 840 - .device = PCI_DEVICE_ID_SIIG_2S_20x_650, 841 - .subvendor = PCI_ANY_ID, 842 - .subdevice = PCI_ANY_ID, 843 - .init = pci_siig20x_init, 844 - .setup = pci_default_setup, 845 - }, 846 - { 847 - .vendor = PCI_VENDOR_ID_SIIG, 848 - .device = PCI_DEVICE_ID_SIIG_2S_20x_850, 849 - .subvendor = PCI_ANY_ID, 850 - .subdevice = PCI_ANY_ID, 851 - .init = pci_siig20x_init, 852 - .setup = pci_default_setup, 853 - }, 854 - { 855 - .vendor = PCI_VENDOR_ID_SIIG, 856 - .device = PCI_DEVICE_ID_SIIG_4S_20x_550, 857 - .subvendor = PCI_ANY_ID, 858 - .subdevice = PCI_ANY_ID, 859 - .init = pci_siig20x_init, 860 - .setup = pci_default_setup, 861 - }, 862 - { 863 - .vendor = PCI_VENDOR_ID_SIIG, 864 - .device = PCI_DEVICE_ID_SIIG_4S_20x_650, 865 - .subvendor = PCI_ANY_ID, 866 - .subdevice = PCI_ANY_ID, 867 - .init = pci_siig20x_init, 868 - .setup = pci_default_setup, 869 - }, 870 - { 871 - .vendor = PCI_VENDOR_ID_SIIG, 872 - .device = PCI_DEVICE_ID_SIIG_4S_20x_850, 873 - .subvendor = PCI_ANY_ID, 874 - .subdevice = PCI_ANY_ID, 875 - .init = pci_siig20x_init, 765 + .init = pci_siig_init, 876 766 .setup = pci_default_setup, 877 767 }, 878 768 /* ··· 826 990 } 827 991 828 992 static _INLINE_ int 829 - get_pci_irq(struct pci_dev *dev, struct pci_board *board, int idx) 993 + get_pci_irq(struct pci_dev *dev, struct pciserial_board *board) 830 994 { 831 995 if (board->flags & FL_NOIRQ) 832 996 return 0; ··· 951 1115 * see first lines of serial_in() and serial_out() in 8250.c 952 1116 */ 953 1117 954 - static struct pci_board pci_boards[] __devinitdata = { 1118 + static struct pciserial_board pci_boards[] __devinitdata = { 955 1119 [pbn_default] = { 956 1120 .flags = FL_BASE0, 957 1121 .num_ports = 1, ··· 1411 1575 * serial specs. Returns 0 on success, 1 on failure. 1412 1576 */ 1413 1577 static int __devinit 1414 - serial_pci_guess_board(struct pci_dev *dev, struct pci_board *board) 1578 + serial_pci_guess_board(struct pci_dev *dev, struct pciserial_board *board) 1415 1579 { 1416 1580 int num_iomem, num_port, first_port = -1, i; 1417 1581 ··· 1476 1640 } 1477 1641 1478 1642 static inline int 1479 - serial_pci_matches(struct pci_board *board, struct pci_board *guessed) 1643 + serial_pci_matches(struct pciserial_board *board, 1644 + struct pciserial_board *guessed) 1480 1645 { 1481 1646 return 1482 1647 board->num_ports == guessed->num_ports && ··· 1487 1650 board->first_offset == guessed->first_offset; 1488 1651 } 1489 1652 1653 + struct serial_private * 1654 + pciserial_init_ports(struct pci_dev *dev, struct pciserial_board *board) 1655 + { 1656 + struct uart_port serial_port; 1657 + struct serial_private *priv; 1658 + struct pci_serial_quirk *quirk; 1659 + int rc, nr_ports, i; 1660 + 1661 + nr_ports = board->num_ports; 1662 + 1663 + /* 1664 + * Find an init and setup quirks. 1665 + */ 1666 + quirk = find_quirk(dev); 1667 + 1668 + /* 1669 + * Run the new-style initialization function. 1670 + * The initialization function returns: 1671 + * <0 - error 1672 + * 0 - use board->num_ports 1673 + * >0 - number of ports 1674 + */ 1675 + if (quirk->init) { 1676 + rc = quirk->init(dev); 1677 + if (rc < 0) { 1678 + priv = ERR_PTR(rc); 1679 + goto err_out; 1680 + } 1681 + if (rc) 1682 + nr_ports = rc; 1683 + } 1684 + 1685 + priv = kmalloc(sizeof(struct serial_private) + 1686 + sizeof(unsigned int) * nr_ports, 1687 + GFP_KERNEL); 1688 + if (!priv) { 1689 + priv = ERR_PTR(-ENOMEM); 1690 + goto err_deinit; 1691 + } 1692 + 1693 + memset(priv, 0, sizeof(struct serial_private) + 1694 + sizeof(unsigned int) * nr_ports); 1695 + 1696 + priv->dev = dev; 1697 + priv->quirk = quirk; 1698 + 1699 + memset(&serial_port, 0, sizeof(struct uart_port)); 1700 + serial_port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; 1701 + serial_port.uartclk = board->base_baud * 16; 1702 + serial_port.irq = get_pci_irq(dev, board); 1703 + serial_port.dev = &dev->dev; 1704 + 1705 + for (i = 0; i < nr_ports; i++) { 1706 + if (quirk->setup(priv, board, &serial_port, i)) 1707 + break; 1708 + 1709 + #ifdef SERIAL_DEBUG_PCI 1710 + printk("Setup PCI port: port %x, irq %d, type %d\n", 1711 + serial_port.iobase, serial_port.irq, serial_port.iotype); 1712 + #endif 1713 + 1714 + priv->line[i] = serial8250_register_port(&serial_port); 1715 + if (priv->line[i] < 0) { 1716 + printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), priv->line[i]); 1717 + break; 1718 + } 1719 + } 1720 + 1721 + priv->nr = i; 1722 + 1723 + return priv; 1724 + 1725 + err_deinit: 1726 + if (quirk->exit) 1727 + quirk->exit(dev); 1728 + err_out: 1729 + return priv; 1730 + } 1731 + EXPORT_SYMBOL_GPL(pciserial_init_ports); 1732 + 1733 + void pciserial_remove_ports(struct serial_private *priv) 1734 + { 1735 + struct pci_serial_quirk *quirk; 1736 + int i; 1737 + 1738 + for (i = 0; i < priv->nr; i++) 1739 + serial8250_unregister_port(priv->line[i]); 1740 + 1741 + for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) { 1742 + if (priv->remapped_bar[i]) 1743 + iounmap(priv->remapped_bar[i]); 1744 + priv->remapped_bar[i] = NULL; 1745 + } 1746 + 1747 + /* 1748 + * Find the exit quirks. 1749 + */ 1750 + quirk = find_quirk(priv->dev); 1751 + if (quirk->exit) 1752 + quirk->exit(priv->dev); 1753 + 1754 + kfree(priv); 1755 + } 1756 + EXPORT_SYMBOL_GPL(pciserial_remove_ports); 1757 + 1758 + void pciserial_suspend_ports(struct serial_private *priv) 1759 + { 1760 + int i; 1761 + 1762 + for (i = 0; i < priv->nr; i++) 1763 + if (priv->line[i] >= 0) 1764 + serial8250_suspend_port(priv->line[i]); 1765 + } 1766 + EXPORT_SYMBOL_GPL(pciserial_suspend_ports); 1767 + 1768 + void pciserial_resume_ports(struct serial_private *priv) 1769 + { 1770 + int i; 1771 + 1772 + /* 1773 + * Ensure that the board is correctly configured. 1774 + */ 1775 + if (priv->quirk->init) 1776 + priv->quirk->init(priv->dev); 1777 + 1778 + for (i = 0; i < priv->nr; i++) 1779 + if (priv->line[i] >= 0) 1780 + serial8250_resume_port(priv->line[i]); 1781 + } 1782 + EXPORT_SYMBOL_GPL(pciserial_resume_ports); 1783 + 1490 1784 /* 1491 1785 * Probe one serial board. Unfortunately, there is no rhyme nor reason 1492 1786 * to the arrangement of serial ports on a PCI card. ··· 1626 1658 pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent) 1627 1659 { 1628 1660 struct serial_private *priv; 1629 - struct pci_board *board, tmp; 1630 - struct pci_serial_quirk *quirk; 1631 - int rc, nr_ports, i; 1661 + struct pciserial_board *board, tmp; 1662 + int rc; 1632 1663 1633 1664 if (ent->driver_data >= ARRAY_SIZE(pci_boards)) { 1634 1665 printk(KERN_ERR "pci_init_one: invalid driver_data: %ld\n", ··· 1646 1679 * Use a copy of the pci_board entry for this; 1647 1680 * avoid changing entries in the table. 1648 1681 */ 1649 - memcpy(&tmp, board, sizeof(struct pci_board)); 1682 + memcpy(&tmp, board, sizeof(struct pciserial_board)); 1650 1683 board = &tmp; 1651 1684 1652 1685 /* ··· 1662 1695 * detect this boards settings with our heuristic, 1663 1696 * then we no longer need this entry. 1664 1697 */ 1665 - memcpy(&tmp, &pci_boards[pbn_default], sizeof(struct pci_board)); 1698 + memcpy(&tmp, &pci_boards[pbn_default], 1699 + sizeof(struct pciserial_board)); 1666 1700 rc = serial_pci_guess_board(dev, &tmp); 1667 1701 if (rc == 0 && serial_pci_matches(board, &tmp)) 1668 1702 moan_device("Redundant entry in serial pci_table.", 1669 1703 dev); 1670 1704 } 1671 1705 1672 - nr_ports = board->num_ports; 1673 - 1674 - /* 1675 - * Find an init and setup quirks. 1676 - */ 1677 - quirk = find_quirk(dev); 1678 - 1679 - /* 1680 - * Run the new-style initialization function. 1681 - * The initialization function returns: 1682 - * <0 - error 1683 - * 0 - use board->num_ports 1684 - * >0 - number of ports 1685 - */ 1686 - if (quirk->init) { 1687 - rc = quirk->init(dev); 1688 - if (rc < 0) 1689 - goto disable; 1690 - if (rc) 1691 - nr_ports = rc; 1706 + priv = pciserial_init_ports(dev, board); 1707 + if (!IS_ERR(priv)) { 1708 + pci_set_drvdata(dev, priv); 1709 + return 0; 1692 1710 } 1693 1711 1694 - priv = kmalloc(sizeof(struct serial_private) + 1695 - sizeof(unsigned int) * nr_ports, 1696 - GFP_KERNEL); 1697 - if (!priv) { 1698 - rc = -ENOMEM; 1699 - goto deinit; 1700 - } 1712 + rc = PTR_ERR(priv); 1701 1713 1702 - memset(priv, 0, sizeof(struct serial_private) + 1703 - sizeof(unsigned int) * nr_ports); 1704 - 1705 - priv->quirk = quirk; 1706 - pci_set_drvdata(dev, priv); 1707 - 1708 - for (i = 0; i < nr_ports; i++) { 1709 - struct uart_port serial_port; 1710 - memset(&serial_port, 0, sizeof(struct uart_port)); 1711 - 1712 - serial_port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | 1713 - UPF_SHARE_IRQ; 1714 - serial_port.uartclk = board->base_baud * 16; 1715 - serial_port.irq = get_pci_irq(dev, board, i); 1716 - serial_port.dev = &dev->dev; 1717 - if (quirk->setup(dev, board, &serial_port, i)) 1718 - break; 1719 - #ifdef SERIAL_DEBUG_PCI 1720 - printk("Setup PCI port: port %x, irq %d, type %d\n", 1721 - serial_port.iobase, serial_port.irq, serial_port.iotype); 1722 - #endif 1723 - 1724 - priv->line[i] = serial8250_register_port(&serial_port); 1725 - if (priv->line[i] < 0) { 1726 - printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), priv->line[i]); 1727 - break; 1728 - } 1729 - } 1730 - 1731 - priv->nr = i; 1732 - 1733 - return 0; 1734 - 1735 - deinit: 1736 - if (quirk->exit) 1737 - quirk->exit(dev); 1738 1714 disable: 1739 1715 pci_disable_device(dev); 1740 1716 return rc; ··· 1686 1776 static void __devexit pciserial_remove_one(struct pci_dev *dev) 1687 1777 { 1688 1778 struct serial_private *priv = pci_get_drvdata(dev); 1689 - struct pci_serial_quirk *quirk; 1690 - int i; 1691 1779 1692 1780 pci_set_drvdata(dev, NULL); 1693 1781 1694 - for (i = 0; i < priv->nr; i++) 1695 - serial8250_unregister_port(priv->line[i]); 1696 - 1697 - for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) { 1698 - if (priv->remapped_bar[i]) 1699 - iounmap(priv->remapped_bar[i]); 1700 - priv->remapped_bar[i] = NULL; 1701 - } 1702 - 1703 - /* 1704 - * Find the exit quirks. 1705 - */ 1706 - quirk = find_quirk(dev); 1707 - if (quirk->exit) 1708 - quirk->exit(dev); 1782 + pciserial_remove_ports(priv); 1709 1783 1710 1784 pci_disable_device(dev); 1711 - 1712 - kfree(priv); 1713 1785 } 1714 1786 1715 1787 static int pciserial_suspend_one(struct pci_dev *dev, pm_message_t state) 1716 1788 { 1717 1789 struct serial_private *priv = pci_get_drvdata(dev); 1718 1790 1719 - if (priv) { 1720 - int i; 1791 + if (priv) 1792 + pciserial_suspend_ports(priv); 1721 1793 1722 - for (i = 0; i < priv->nr; i++) 1723 - serial8250_suspend_port(priv->line[i]); 1724 - } 1725 1794 pci_save_state(dev); 1726 1795 pci_set_power_state(dev, pci_choose_state(dev, state)); 1727 1796 return 0; ··· 1714 1825 pci_restore_state(dev); 1715 1826 1716 1827 if (priv) { 1717 - int i; 1718 - 1719 1828 /* 1720 1829 * The device may have been disabled. Re-enable it. 1721 1830 */ 1722 1831 pci_enable_device(dev); 1723 1832 1724 - /* 1725 - * Ensure that the board is correctly configured. 1726 - */ 1727 - if (priv->quirk->init) 1728 - priv->quirk->init(dev); 1729 - 1730 - for (i = 0; i < priv->nr; i++) 1731 - serial8250_resume_port(priv->line[i]); 1833 + pciserial_resume_ports(priv); 1732 1834 } 1733 1835 return 0; 1734 1836 }
+37 -2
include/linux/8250_pci.h
··· 1 - int pci_siig10x_fn(struct pci_dev *dev, int enable); 2 - int pci_siig20x_fn(struct pci_dev *dev, int enable); 1 + /* 2 + * Definitions for PCI support. 3 + */ 4 + #define FL_BASE_MASK 0x0007 5 + #define FL_BASE0 0x0000 6 + #define FL_BASE1 0x0001 7 + #define FL_BASE2 0x0002 8 + #define FL_BASE3 0x0003 9 + #define FL_BASE4 0x0004 10 + #define FL_GET_BASE(x) (x & FL_BASE_MASK) 11 + 12 + /* Use successive BARs (PCI base address registers), 13 + else use offset into some specified BAR */ 14 + #define FL_BASE_BARS 0x0008 15 + 16 + /* do not assign an irq */ 17 + #define FL_NOIRQ 0x0080 18 + 19 + /* Use the Base address register size to cap number of ports */ 20 + #define FL_REGION_SZ_CAP 0x0100 21 + 22 + struct pciserial_board { 23 + unsigned int flags; 24 + unsigned int num_ports; 25 + unsigned int base_baud; 26 + unsigned int uart_offset; 27 + unsigned int reg_shift; 28 + unsigned int first_offset; 29 + }; 30 + 31 + struct serial_private; 32 + 33 + struct serial_private * 34 + pciserial_init_ports(struct pci_dev *dev, struct pciserial_board *board); 35 + void pciserial_remove_ports(struct serial_private *priv); 36 + void pciserial_suspend_ports(struct serial_private *priv); 37 + void pciserial_resume_ports(struct serial_private *priv);
-40
include/linux/serialP.h
··· 140 140 #define ALPHA_KLUDGE_MCR 0 141 141 #endif 142 142 143 - /* 144 - * Definitions for PCI support. 145 - */ 146 - #define SPCI_FL_BASE_MASK 0x0007 147 - #define SPCI_FL_BASE0 0x0000 148 - #define SPCI_FL_BASE1 0x0001 149 - #define SPCI_FL_BASE2 0x0002 150 - #define SPCI_FL_BASE3 0x0003 151 - #define SPCI_FL_BASE4 0x0004 152 - #define SPCI_FL_GET_BASE(x) (x & SPCI_FL_BASE_MASK) 153 - 154 - #define SPCI_FL_IRQ_MASK (0x0007 << 4) 155 - #define SPCI_FL_IRQBASE0 (0x0000 << 4) 156 - #define SPCI_FL_IRQBASE1 (0x0001 << 4) 157 - #define SPCI_FL_IRQBASE2 (0x0002 << 4) 158 - #define SPCI_FL_IRQBASE3 (0x0003 << 4) 159 - #define SPCI_FL_IRQBASE4 (0x0004 << 4) 160 - #define SPCI_FL_GET_IRQBASE(x) ((x & SPCI_FL_IRQ_MASK) >> 4) 161 - 162 - /* Use successive BARs (PCI base address registers), 163 - else use offset into some specified BAR */ 164 - #define SPCI_FL_BASE_TABLE 0x0100 165 - 166 - /* Use successive entries in the irq resource table */ 167 - #define SPCI_FL_IRQ_TABLE 0x0200 168 - 169 - /* Use the irq resource table instead of dev->irq */ 170 - #define SPCI_FL_IRQRESOURCE 0x0400 171 - 172 - /* Use the Base address register size to cap number of ports */ 173 - #define SPCI_FL_REGION_SZ_CAP 0x0800 174 - 175 - /* Do not use irq sharing for this device */ 176 - #define SPCI_FL_NO_SHIRQ 0x1000 177 - 178 - /* This is a PNP device */ 179 - #define SPCI_FL_ISPNP 0x2000 180 - 181 - #define SPCI_FL_PNPDEFAULT (SPCI_FL_IRQRESOURCE|SPCI_FL_ISPNP) 182 - 183 143 #endif /* _LINUX_SERIAL_H */