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kernel os linux

ARM: dts: imx7d: move ARM platform peripherals inside soc node

Since we have a SoC level node we should make use of it and have
all nodes which are within the SoC, inside that node. This also
saves an extra interrupt-parent properties. While at it, also
order the Coresight nodes according to register addresses.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Stefan Agner and committed by
Shawn Guo
974a3abc 2a8e583c

+209 -208
+17 -15
arch/arm/boot/dts/imx7d.dtsi
··· 52 52 }; 53 53 }; 54 54 55 - etm@3007d000 { 56 - compatible = "arm,coresight-etm3x", "arm,primecell"; 57 - reg = <0x3007d000 0x1000>; 55 + soc { 56 + etm@3007d000 { 57 + compatible = "arm,coresight-etm3x", "arm,primecell"; 58 + reg = <0x3007d000 0x1000>; 58 59 59 - /* 60 - * System will hang if added nosmp in kernel command line 61 - * without arm,primecell-periphid because amba bus try to 62 - * read id and core1 power off at this time. 63 - */ 64 - arm,primecell-periphid = <0xbb956>; 65 - cpu = <&cpu1>; 66 - clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 67 - clock-names = "apb_pclk"; 60 + /* 61 + * System will hang if added nosmp in kernel command line 62 + * without arm,primecell-periphid because amba bus try to 63 + * read id and core1 power off at this time. 64 + */ 65 + arm,primecell-periphid = <0xbb956>; 66 + cpu = <&cpu1>; 67 + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 68 + clock-names = "apb_pclk"; 68 69 69 - port { 70 - etm1_out_port: endpoint { 71 - remote-endpoint = <&ca_funnel_in_port1>; 70 + port { 71 + etm1_out_port: endpoint { 72 + remote-endpoint = <&ca_funnel_in_port1>; 73 + }; 72 74 }; 73 75 }; 74 76 };
+192 -193
arch/arm/boot/dts/imx7s.dtsi
··· 95 95 }; 96 96 }; 97 97 98 - intc: interrupt-controller@31001000 { 99 - compatible = "arm,cortex-a7-gic"; 100 - #interrupt-cells = <3>; 101 - interrupt-controller; 102 - reg = <0x31001000 0x1000>, 103 - <0x31002000 0x1000>, 104 - <0x31004000 0x2000>, 105 - <0x31006000 0x2000>; 106 - }; 107 - 108 98 ckil: clock-cki { 109 99 compatible = "fixed-clock"; 110 100 #clock-cells = <0>; ··· 109 119 clock-output-names = "osc"; 110 120 }; 111 121 112 - timer { 113 - compatible = "arm,armv7-timer"; 114 - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 115 - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 116 - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 117 - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 118 - interrupt-parent = <&intc>; 119 - }; 120 - 121 - etr@30086000 { 122 - compatible = "arm,coresight-tmc", "arm,primecell"; 123 - reg = <0x30086000 0x1000>; 124 - clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 125 - clock-names = "apb_pclk"; 126 - 127 - port { 128 - etr_in_port: endpoint { 129 - slave-mode; 130 - remote-endpoint = <&replicator_out_port1>; 131 - }; 132 - }; 133 - }; 134 - 135 - tpiu@30087000 { 136 - compatible = "arm,coresight-tpiu", "arm,primecell"; 137 - reg = <0x30087000 0x1000>; 138 - clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 139 - clock-names = "apb_pclk"; 140 - 141 - port { 142 - tpiu_in_port: endpoint { 143 - slave-mode; 144 - remote-endpoint = <&replicator_out_port1>; 145 - }; 146 - }; 147 - }; 148 - 149 - replicator { 150 - /* 151 - * non-configurable replicators don't show up on the 152 - * AMBA bus. As such no need to add "arm,primecell" 153 - */ 154 - compatible = "arm,coresight-replicator"; 155 - 156 - ports { 157 - #address-cells = <1>; 158 - #size-cells = <0>; 159 - 160 - /* replicator output ports */ 161 - port@0 { 162 - reg = <0>; 163 - replicator_out_port0: endpoint { 164 - remote-endpoint = <&tpiu_in_port>; 165 - }; 166 - }; 167 - 168 - port@1 { 169 - reg = <1>; 170 - replicator_out_port1: endpoint { 171 - remote-endpoint = <&etr_in_port>; 172 - }; 173 - }; 174 - 175 - /* replicator input port */ 176 - port@2 { 177 - reg = <0>; 178 - replicator_in_port0: endpoint { 179 - slave-mode; 180 - remote-endpoint = <&etf_out_port>; 181 - }; 182 - }; 183 - }; 184 - }; 185 - 186 - etf@30084000 { 187 - compatible = "arm,coresight-tmc", "arm,primecell"; 188 - reg = <0x30084000 0x1000>; 189 - clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 190 - clock-names = "apb_pclk"; 191 - 192 - ports { 193 - #address-cells = <1>; 194 - #size-cells = <0>; 195 - 196 - port@0 { 197 - reg = <0>; 198 - etf_in_port: endpoint { 199 - slave-mode; 200 - remote-endpoint = <&hugo_funnel_out_port0>; 201 - }; 202 - }; 203 - 204 - port@1 { 205 - reg = <0>; 206 - etf_out_port: endpoint { 207 - remote-endpoint = <&replicator_in_port0>; 208 - }; 209 - }; 210 - }; 211 - }; 212 - 213 - funnel@30083000 { 214 - compatible = "arm,coresight-funnel", "arm,primecell"; 215 - reg = <0x30083000 0x1000>; 216 - clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 217 - clock-names = "apb_pclk"; 218 - 219 - ports { 220 - #address-cells = <1>; 221 - #size-cells = <0>; 222 - 223 - /* funnel input ports */ 224 - port@0 { 225 - reg = <0>; 226 - hugo_funnel_in_port0: endpoint { 227 - slave-mode; 228 - remote-endpoint = <&ca_funnel_out_port0>; 229 - }; 230 - }; 231 - 232 - port@1 { 233 - reg = <1>; 234 - hugo_funnel_in_port1: endpoint { 235 - slave-mode; /* M4 input */ 236 - }; 237 - }; 238 - 239 - port@2 { 240 - reg = <0>; 241 - hugo_funnel_out_port0: endpoint { 242 - remote-endpoint = <&etf_in_port>; 243 - }; 244 - }; 245 - 246 - /* the other input ports are not connect to anything */ 247 - }; 248 - }; 249 - 250 - funnel@30041000 { 251 - compatible = "arm,coresight-funnel", "arm,primecell"; 252 - reg = <0x30041000 0x1000>; 253 - clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 254 - clock-names = "apb_pclk"; 255 - 256 - ca_funnel_ports: ports { 257 - #address-cells = <1>; 258 - #size-cells = <0>; 259 - 260 - /* funnel input ports */ 261 - port@0 { 262 - reg = <0>; 263 - ca_funnel_in_port0: endpoint { 264 - slave-mode; 265 - remote-endpoint = <&etm0_out_port>; 266 - }; 267 - }; 268 - 269 - /* funnel output port */ 270 - port@2 { 271 - reg = <0>; 272 - ca_funnel_out_port0: endpoint { 273 - remote-endpoint = <&hugo_funnel_in_port0>; 274 - }; 275 - }; 276 - 277 - /* the other input ports are not connect to anything */ 278 - }; 279 - }; 280 - 281 - etm@3007c000 { 282 - compatible = "arm,coresight-etm3x", "arm,primecell"; 283 - reg = <0x3007c000 0x1000>; 284 - cpu = <&cpu0>; 285 - clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 286 - clock-names = "apb_pclk"; 287 - 288 - port { 289 - etm0_out_port: endpoint { 290 - remote-endpoint = <&ca_funnel_in_port0>; 291 - }; 292 - }; 293 - }; 294 - 295 122 soc { 296 123 #address-cells = <1>; 297 124 #size-cells = <1>; 298 125 compatible = "simple-bus"; 299 126 interrupt-parent = <&intc>; 300 127 ranges; 128 + 129 + funnel@30041000 { 130 + compatible = "arm,coresight-funnel", "arm,primecell"; 131 + reg = <0x30041000 0x1000>; 132 + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 133 + clock-names = "apb_pclk"; 134 + 135 + ca_funnel_ports: ports { 136 + #address-cells = <1>; 137 + #size-cells = <0>; 138 + 139 + /* funnel input ports */ 140 + port@0 { 141 + reg = <0>; 142 + ca_funnel_in_port0: endpoint { 143 + slave-mode; 144 + remote-endpoint = <&etm0_out_port>; 145 + }; 146 + }; 147 + 148 + /* funnel output port */ 149 + port@2 { 150 + reg = <0>; 151 + ca_funnel_out_port0: endpoint { 152 + remote-endpoint = <&hugo_funnel_in_port0>; 153 + }; 154 + }; 155 + 156 + /* the other input ports are not connect to anything */ 157 + }; 158 + }; 159 + 160 + etm@3007c000 { 161 + compatible = "arm,coresight-etm3x", "arm,primecell"; 162 + reg = <0x3007c000 0x1000>; 163 + cpu = <&cpu0>; 164 + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 165 + clock-names = "apb_pclk"; 166 + 167 + port { 168 + etm0_out_port: endpoint { 169 + remote-endpoint = <&ca_funnel_in_port0>; 170 + }; 171 + }; 172 + }; 173 + 174 + funnel@30083000 { 175 + compatible = "arm,coresight-funnel", "arm,primecell"; 176 + reg = <0x30083000 0x1000>; 177 + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 178 + clock-names = "apb_pclk"; 179 + 180 + ports { 181 + #address-cells = <1>; 182 + #size-cells = <0>; 183 + 184 + /* funnel input ports */ 185 + port@0 { 186 + reg = <0>; 187 + hugo_funnel_in_port0: endpoint { 188 + slave-mode; 189 + remote-endpoint = <&ca_funnel_out_port0>; 190 + }; 191 + }; 192 + 193 + port@1 { 194 + reg = <1>; 195 + hugo_funnel_in_port1: endpoint { 196 + slave-mode; /* M4 input */ 197 + }; 198 + }; 199 + 200 + port@2 { 201 + reg = <0>; 202 + hugo_funnel_out_port0: endpoint { 203 + remote-endpoint = <&etf_in_port>; 204 + }; 205 + }; 206 + 207 + /* the other input ports are not connect to anything */ 208 + }; 209 + }; 210 + 211 + etf@30084000 { 212 + compatible = "arm,coresight-tmc", "arm,primecell"; 213 + reg = <0x30084000 0x1000>; 214 + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 215 + clock-names = "apb_pclk"; 216 + 217 + ports { 218 + #address-cells = <1>; 219 + #size-cells = <0>; 220 + 221 + port@0 { 222 + reg = <0>; 223 + etf_in_port: endpoint { 224 + slave-mode; 225 + remote-endpoint = <&hugo_funnel_out_port0>; 226 + }; 227 + }; 228 + 229 + port@1 { 230 + reg = <0>; 231 + etf_out_port: endpoint { 232 + remote-endpoint = <&replicator_in_port0>; 233 + }; 234 + }; 235 + }; 236 + }; 237 + 238 + etr@30086000 { 239 + compatible = "arm,coresight-tmc", "arm,primecell"; 240 + reg = <0x30086000 0x1000>; 241 + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 242 + clock-names = "apb_pclk"; 243 + 244 + port { 245 + etr_in_port: endpoint { 246 + slave-mode; 247 + remote-endpoint = <&replicator_out_port1>; 248 + }; 249 + }; 250 + }; 251 + 252 + tpiu@30087000 { 253 + compatible = "arm,coresight-tpiu", "arm,primecell"; 254 + reg = <0x30087000 0x1000>; 255 + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 256 + clock-names = "apb_pclk"; 257 + 258 + port { 259 + tpiu_in_port: endpoint { 260 + slave-mode; 261 + remote-endpoint = <&replicator_out_port1>; 262 + }; 263 + }; 264 + }; 265 + 266 + replicator { 267 + /* 268 + * non-configurable replicators don't show up on the 269 + * AMBA bus. As such no need to add "arm,primecell" 270 + */ 271 + compatible = "arm,coresight-replicator"; 272 + 273 + ports { 274 + #address-cells = <1>; 275 + #size-cells = <0>; 276 + 277 + /* replicator output ports */ 278 + port@0 { 279 + reg = <0>; 280 + replicator_out_port0: endpoint { 281 + remote-endpoint = <&tpiu_in_port>; 282 + }; 283 + }; 284 + 285 + port@1 { 286 + reg = <1>; 287 + replicator_out_port1: endpoint { 288 + remote-endpoint = <&etr_in_port>; 289 + }; 290 + }; 291 + 292 + /* replicator input port */ 293 + port@2 { 294 + reg = <0>; 295 + replicator_in_port0: endpoint { 296 + slave-mode; 297 + remote-endpoint = <&etf_out_port>; 298 + }; 299 + }; 300 + }; 301 + }; 302 + 303 + intc: interrupt-controller@31001000 { 304 + compatible = "arm,cortex-a7-gic"; 305 + #interrupt-cells = <3>; 306 + interrupt-controller; 307 + reg = <0x31001000 0x1000>, 308 + <0x31002000 0x1000>, 309 + <0x31004000 0x2000>, 310 + <0x31006000 0x2000>; 311 + }; 312 + 313 + timer { 314 + compatible = "arm,armv7-timer"; 315 + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 316 + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 317 + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 318 + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 319 + }; 301 320 302 321 aips1: aips-bus@30000000 { 303 322 compatible = "fsl,aips-bus", "simple-bus";