Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel

* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:
drm/i915: Disable FBC on Ironlake to save 1W
drm/i915: Take advantage of auto-polling CRT hotplug detection on PCH hardware
drm/i915/crt: Introduce struct intel_crt
drm/i915: Do not hold mutex when faulting in user addresses
drm: radeon: fix error value sign
drm/radeon/kms: fix and unify tiled buffer alignment checking for r6xx/7xx
drm/i915: Retire any pending operations on the old scanout when switching
drm/i915: Fix I2C adapter registration

+152 -102
+2 -1
drivers/gpu/drm/i915/i915_drv.c
··· 150 151 static const struct intel_device_info intel_ironlake_m_info = { 152 .gen = 5, .is_mobile = 1, 153 - .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, 154 .has_bsd_ring = 1, 155 }; 156
··· 150 151 static const struct intel_device_info intel_ironlake_m_info = { 152 .gen = 5, .is_mobile = 1, 153 + .need_gfx_hws = 1, .has_rc6 = 1, .has_hotplug = 1, 154 + .has_fbc = 0, /* disabled due to buggy hardware */ 155 .has_bsd_ring = 1, 156 }; 157
+2
drivers/gpu/drm/i915/i915_drv.h
··· 1045 int i915_gem_object_set_domain(struct drm_gem_object *obj, 1046 uint32_t read_domains, 1047 uint32_t write_domain); 1048 int i915_gem_init_ringbuffer(struct drm_device *dev); 1049 void i915_gem_cleanup_ringbuffer(struct drm_device *dev); 1050 int i915_gem_do_init(struct drm_device *dev, unsigned long start,
··· 1045 int i915_gem_object_set_domain(struct drm_gem_object *obj, 1046 uint32_t read_domains, 1047 uint32_t write_domain); 1048 + int i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj, 1049 + bool interruptible); 1050 int i915_gem_init_ringbuffer(struct drm_device *dev); 1051 void i915_gem_cleanup_ringbuffer(struct drm_device *dev); 1052 int i915_gem_do_init(struct drm_device *dev, unsigned long start,
+41 -36
drivers/gpu/drm/i915/i915_gem.c
··· 547 struct drm_i915_gem_object *obj_priv; 548 int ret = 0; 549 550 ret = i915_mutex_lock_interruptible(dev); 551 if (ret) 552 return ret; ··· 574 /* Bounds check source. */ 575 if (args->offset > obj->size || args->size > obj->size - args->offset) { 576 ret = -EINVAL; 577 - goto out; 578 - } 579 - 580 - if (args->size == 0) 581 - goto out; 582 - 583 - if (!access_ok(VERIFY_WRITE, 584 - (char __user *)(uintptr_t)args->data_ptr, 585 - args->size)) { 586 - ret = -EFAULT; 587 - goto out; 588 - } 589 - 590 - ret = fault_in_pages_writeable((char __user *)(uintptr_t)args->data_ptr, 591 - args->size); 592 - if (ret) { 593 - ret = -EFAULT; 594 goto out; 595 } 596 ··· 977 struct drm_i915_gem_pwrite *args = data; 978 struct drm_gem_object *obj; 979 struct drm_i915_gem_object *obj_priv; 980 - int ret = 0; 981 982 ret = i915_mutex_lock_interruptible(dev); 983 if (ret) ··· 1003 } 1004 obj_priv = to_intel_bo(obj); 1005 1006 - 1007 /* Bounds check destination. */ 1008 if (args->offset > obj->size || args->size > obj->size - args->offset) { 1009 ret = -EINVAL; 1010 - goto out; 1011 - } 1012 - 1013 - if (args->size == 0) 1014 - goto out; 1015 - 1016 - if (!access_ok(VERIFY_READ, 1017 - (char __user *)(uintptr_t)args->data_ptr, 1018 - args->size)) { 1019 - ret = -EFAULT; 1020 - goto out; 1021 - } 1022 - 1023 - ret = fault_in_pages_readable((char __user *)(uintptr_t)args->data_ptr, 1024 - args->size); 1025 - if (ret) { 1026 - ret = -EFAULT; 1027 goto out; 1028 } 1029 ··· 2896 obj->write_domain); 2897 2898 return 0; 2899 } 2900 2901 /**
··· 547 struct drm_i915_gem_object *obj_priv; 548 int ret = 0; 549 550 + if (args->size == 0) 551 + return 0; 552 + 553 + if (!access_ok(VERIFY_WRITE, 554 + (char __user *)(uintptr_t)args->data_ptr, 555 + args->size)) 556 + return -EFAULT; 557 + 558 + ret = fault_in_pages_writeable((char __user *)(uintptr_t)args->data_ptr, 559 + args->size); 560 + if (ret) 561 + return -EFAULT; 562 + 563 ret = i915_mutex_lock_interruptible(dev); 564 if (ret) 565 return ret; ··· 561 /* Bounds check source. */ 562 if (args->offset > obj->size || args->size > obj->size - args->offset) { 563 ret = -EINVAL; 564 goto out; 565 } 566 ··· 981 struct drm_i915_gem_pwrite *args = data; 982 struct drm_gem_object *obj; 983 struct drm_i915_gem_object *obj_priv; 984 + int ret; 985 + 986 + if (args->size == 0) 987 + return 0; 988 + 989 + if (!access_ok(VERIFY_READ, 990 + (char __user *)(uintptr_t)args->data_ptr, 991 + args->size)) 992 + return -EFAULT; 993 + 994 + ret = fault_in_pages_readable((char __user *)(uintptr_t)args->data_ptr, 995 + args->size); 996 + if (ret) 997 + return -EFAULT; 998 999 ret = i915_mutex_lock_interruptible(dev); 1000 if (ret) ··· 994 } 995 obj_priv = to_intel_bo(obj); 996 997 /* Bounds check destination. */ 998 if (args->offset > obj->size || args->size > obj->size - args->offset) { 999 ret = -EINVAL; 1000 goto out; 1001 } 1002 ··· 2905 obj->write_domain); 2906 2907 return 0; 2908 + } 2909 + 2910 + int 2911 + i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj, 2912 + bool interruptible) 2913 + { 2914 + if (!obj->active) 2915 + return 0; 2916 + 2917 + if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) 2918 + i915_gem_flush_ring(obj->base.dev, NULL, obj->ring, 2919 + 0, obj->base.write_domain); 2920 + 2921 + return i915_gem_object_wait_rendering(&obj->base, interruptible); 2922 } 2923 2924 /**
+89 -60
drivers/gpu/drm/i915/intel_crt.c
··· 34 #include "i915_drm.h" 35 #include "i915_drv.h" 36 37 static void intel_crt_dpms(struct drm_encoder *encoder, int mode) 38 { 39 struct drm_device *dev = encoder->dev; ··· 148 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); 149 } 150 151 - adpa = 0; 152 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 153 adpa |= ADPA_HSYNC_ACTIVE_HIGH; 154 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) ··· 176 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) 177 { 178 struct drm_device *dev = connector->dev; 179 struct drm_i915_private *dev_priv = dev->dev_private; 180 - u32 adpa, temp; 181 bool ret; 182 - bool turn_off_dac = false; 183 184 - temp = adpa = I915_READ(PCH_ADPA); 185 186 - if (HAS_PCH_SPLIT(dev)) 187 - turn_off_dac = true; 188 189 - adpa &= ~ADPA_CRT_HOTPLUG_MASK; 190 - if (turn_off_dac) 191 - adpa &= ~ADPA_DAC_ENABLE; 192 193 - /* disable HPD first */ 194 - I915_WRITE(PCH_ADPA, adpa); 195 - (void)I915_READ(PCH_ADPA); 196 197 - adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 | 198 - ADPA_CRT_HOTPLUG_WARMUP_10MS | 199 - ADPA_CRT_HOTPLUG_SAMPLE_4S | 200 - ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */ 201 - ADPA_CRT_HOTPLUG_VOLREF_325MV | 202 - ADPA_CRT_HOTPLUG_ENABLE | 203 - ADPA_CRT_HOTPLUG_FORCE_TRIGGER); 204 205 - DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa); 206 - I915_WRITE(PCH_ADPA, adpa); 207 208 - if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, 209 - 1000)) 210 - DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); 211 - 212 - if (turn_off_dac) { 213 - /* Make sure hotplug is enabled */ 214 - I915_WRITE(PCH_ADPA, temp | ADPA_CRT_HOTPLUG_ENABLE); 215 - (void)I915_READ(PCH_ADPA); 216 } 217 218 /* Check the status to see if both blue and green are on now */ 219 adpa = I915_READ(PCH_ADPA); 220 - adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK; 221 - if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) || 222 - (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO)) 223 ret = true; 224 else 225 ret = false; 226 227 return ret; 228 } ··· 287 return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1; 288 } 289 290 - static bool intel_crt_detect_ddc(struct drm_encoder *encoder) 291 { 292 - struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 293 - struct drm_i915_private *dev_priv = encoder->dev->dev_private; 294 295 /* CRT should always be at 0, but check anyway */ 296 - if (intel_encoder->type != INTEL_OUTPUT_ANALOG) 297 return false; 298 299 if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) { ··· 300 return true; 301 } 302 303 - if (intel_ddc_probe(intel_encoder, dev_priv->crt_ddc_pin)) { 304 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); 305 return true; 306 } ··· 309 } 310 311 static enum drm_connector_status 312 - intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder) 313 { 314 - struct drm_encoder *encoder = &intel_encoder->base; 315 struct drm_device *dev = encoder->dev; 316 struct drm_i915_private *dev_priv = dev->dev_private; 317 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); ··· 443 intel_crt_detect(struct drm_connector *connector, bool force) 444 { 445 struct drm_device *dev = connector->dev; 446 - struct intel_encoder *encoder = intel_attached_encoder(connector); 447 struct drm_crtc *crtc; 448 int dpms_mode; 449 enum drm_connector_status status; ··· 452 if (intel_crt_detect_hotplug(connector)) { 453 DRM_DEBUG_KMS("CRT detected via hotplug\n"); 454 return connector_status_connected; 455 - } else 456 return connector_status_disconnected; 457 } 458 459 - if (intel_crt_detect_ddc(&encoder->base)) 460 return connector_status_connected; 461 462 if (!force) 463 return connector->status; 464 465 /* for pre-945g platforms use load detect */ 466 - if (encoder->base.crtc && encoder->base.crtc->enabled) { 467 - status = intel_crt_load_detect(encoder->base.crtc, encoder); 468 } else { 469 - crtc = intel_get_load_detect_pipe(encoder, connector, 470 NULL, &dpms_mode); 471 if (crtc) { 472 - if (intel_crt_detect_ddc(&encoder->base)) 473 status = connector_status_connected; 474 else 475 - status = intel_crt_load_detect(crtc, encoder); 476 - intel_release_load_detect_pipe(encoder, 477 connector, dpms_mode); 478 } else 479 status = connector_status_unknown; ··· 548 void intel_crt_init(struct drm_device *dev) 549 { 550 struct drm_connector *connector; 551 - struct intel_encoder *intel_encoder; 552 struct intel_connector *intel_connector; 553 struct drm_i915_private *dev_priv = dev->dev_private; 554 555 - intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL); 556 - if (!intel_encoder) 557 return; 558 559 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); 560 if (!intel_connector) { 561 - kfree(intel_encoder); 562 return; 563 } 564 ··· 566 drm_connector_init(dev, &intel_connector->base, 567 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 568 569 - drm_encoder_init(dev, &intel_encoder->base, &intel_crt_enc_funcs, 570 DRM_MODE_ENCODER_DAC); 571 572 - intel_connector_attach_encoder(intel_connector, intel_encoder); 573 574 - intel_encoder->type = INTEL_OUTPUT_ANALOG; 575 - intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 576 - (1 << INTEL_ANALOG_CLONE_BIT) | 577 - (1 << INTEL_SDVO_LVDS_CLONE_BIT); 578 - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 579 connector->interlace_allowed = 1; 580 connector->doublescan_allowed = 0; 581 582 - drm_encoder_helper_add(&intel_encoder->base, &intel_crt_helper_funcs); 583 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); 584 585 drm_sysfs_connector_add(connector); ··· 588 connector->polled = DRM_CONNECTOR_POLL_HPD; 589 else 590 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 591 592 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; 593 }
··· 34 #include "i915_drm.h" 35 #include "i915_drv.h" 36 37 + /* Here's the desired hotplug mode */ 38 + #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ 39 + ADPA_CRT_HOTPLUG_WARMUP_10MS | \ 40 + ADPA_CRT_HOTPLUG_SAMPLE_4S | \ 41 + ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ 42 + ADPA_CRT_HOTPLUG_VOLREF_325MV | \ 43 + ADPA_CRT_HOTPLUG_ENABLE) 44 + 45 + struct intel_crt { 46 + struct intel_encoder base; 47 + bool force_hotplug_required; 48 + }; 49 + 50 + static struct intel_crt *intel_attached_crt(struct drm_connector *connector) 51 + { 52 + return container_of(intel_attached_encoder(connector), 53 + struct intel_crt, base); 54 + } 55 + 56 static void intel_crt_dpms(struct drm_encoder *encoder, int mode) 57 { 58 struct drm_device *dev = encoder->dev; ··· 129 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); 130 } 131 132 + adpa = ADPA_HOTPLUG_BITS; 133 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 134 adpa |= ADPA_HSYNC_ACTIVE_HIGH; 135 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) ··· 157 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) 158 { 159 struct drm_device *dev = connector->dev; 160 + struct intel_crt *crt = intel_attached_crt(connector); 161 struct drm_i915_private *dev_priv = dev->dev_private; 162 + u32 adpa; 163 bool ret; 164 165 + /* The first time through, trigger an explicit detection cycle */ 166 + if (crt->force_hotplug_required) { 167 + bool turn_off_dac = HAS_PCH_SPLIT(dev); 168 + u32 save_adpa; 169 170 + crt->force_hotplug_required = 0; 171 172 + save_adpa = adpa = I915_READ(PCH_ADPA); 173 + DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); 174 175 + adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; 176 + if (turn_off_dac) 177 + adpa &= ~ADPA_DAC_ENABLE; 178 179 + I915_WRITE(PCH_ADPA, adpa); 180 181 + if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, 182 + 1000)) 183 + DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); 184 185 + if (turn_off_dac) { 186 + I915_WRITE(PCH_ADPA, save_adpa); 187 + POSTING_READ(PCH_ADPA); 188 + } 189 } 190 191 /* Check the status to see if both blue and green are on now */ 192 adpa = I915_READ(PCH_ADPA); 193 + if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) 194 ret = true; 195 else 196 ret = false; 197 + DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); 198 199 return ret; 200 } ··· 277 return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1; 278 } 279 280 + static bool intel_crt_detect_ddc(struct intel_crt *crt) 281 { 282 + struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; 283 284 /* CRT should always be at 0, but check anyway */ 285 + if (crt->base.type != INTEL_OUTPUT_ANALOG) 286 return false; 287 288 if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) { ··· 291 return true; 292 } 293 294 + if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) { 295 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); 296 return true; 297 } ··· 300 } 301 302 static enum drm_connector_status 303 + intel_crt_load_detect(struct drm_crtc *crtc, struct intel_crt *crt) 304 { 305 + struct drm_encoder *encoder = &crt->base.base; 306 struct drm_device *dev = encoder->dev; 307 struct drm_i915_private *dev_priv = dev->dev_private; 308 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); ··· 434 intel_crt_detect(struct drm_connector *connector, bool force) 435 { 436 struct drm_device *dev = connector->dev; 437 + struct intel_crt *crt = intel_attached_crt(connector); 438 struct drm_crtc *crtc; 439 int dpms_mode; 440 enum drm_connector_status status; ··· 443 if (intel_crt_detect_hotplug(connector)) { 444 DRM_DEBUG_KMS("CRT detected via hotplug\n"); 445 return connector_status_connected; 446 + } else { 447 + DRM_DEBUG_KMS("CRT not detected via hotplug\n"); 448 return connector_status_disconnected; 449 + } 450 } 451 452 + if (intel_crt_detect_ddc(crt)) 453 return connector_status_connected; 454 455 if (!force) 456 return connector->status; 457 458 /* for pre-945g platforms use load detect */ 459 + crtc = crt->base.base.crtc; 460 + if (crtc && crtc->enabled) { 461 + status = intel_crt_load_detect(crtc, crt); 462 } else { 463 + crtc = intel_get_load_detect_pipe(&crt->base, connector, 464 NULL, &dpms_mode); 465 if (crtc) { 466 + if (intel_crt_detect_ddc(crt)) 467 status = connector_status_connected; 468 else 469 + status = intel_crt_load_detect(crtc, crt); 470 + intel_release_load_detect_pipe(&crt->base, 471 connector, dpms_mode); 472 } else 473 status = connector_status_unknown; ··· 536 void intel_crt_init(struct drm_device *dev) 537 { 538 struct drm_connector *connector; 539 + struct intel_crt *crt; 540 struct intel_connector *intel_connector; 541 struct drm_i915_private *dev_priv = dev->dev_private; 542 543 + crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL); 544 + if (!crt) 545 return; 546 547 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); 548 if (!intel_connector) { 549 + kfree(crt); 550 return; 551 } 552 ··· 554 drm_connector_init(dev, &intel_connector->base, 555 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 556 557 + drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, 558 DRM_MODE_ENCODER_DAC); 559 560 + intel_connector_attach_encoder(intel_connector, &crt->base); 561 562 + crt->base.type = INTEL_OUTPUT_ANALOG; 563 + crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT | 564 + 1 << INTEL_ANALOG_CLONE_BIT | 565 + 1 << INTEL_SDVO_LVDS_CLONE_BIT); 566 + crt->base.crtc_mask = (1 << 0) | (1 << 1); 567 connector->interlace_allowed = 1; 568 connector->doublescan_allowed = 0; 569 570 + drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs); 571 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); 572 573 drm_sysfs_connector_add(connector); ··· 576 connector->polled = DRM_CONNECTOR_POLL_HPD; 577 else 578 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 579 + 580 + /* 581 + * Configure the automatic hotplug detection stuff 582 + */ 583 + crt->force_hotplug_required = 0; 584 + if (HAS_PCH_SPLIT(dev)) { 585 + u32 adpa; 586 + 587 + adpa = I915_READ(PCH_ADPA); 588 + adpa &= ~ADPA_CRT_HOTPLUG_MASK; 589 + adpa |= ADPA_HOTPLUG_BITS; 590 + I915_WRITE(PCH_ADPA, adpa); 591 + POSTING_READ(PCH_ADPA); 592 + 593 + DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); 594 + crt->force_hotplug_required = 1; 595 + } 596 597 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; 598 }
+12
drivers/gpu/drm/i915/intel_display.c
··· 1611 1612 wait_event(dev_priv->pending_flip_queue, 1613 atomic_read(&obj_priv->pending_flip) == 0); 1614 } 1615 1616 ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y,
··· 1611 1612 wait_event(dev_priv->pending_flip_queue, 1613 atomic_read(&obj_priv->pending_flip) == 0); 1614 + 1615 + /* Big Hammer, we also need to ensure that any pending 1616 + * MI_WAIT_FOR_EVENT inside a user batch buffer on the 1617 + * current scanout is retired before unpinning the old 1618 + * framebuffer. 1619 + */ 1620 + ret = i915_gem_object_flush_gpu(obj_priv, false); 1621 + if (ret) { 1622 + i915_gem_object_unpin(to_intel_framebuffer(crtc->fb)->obj); 1623 + mutex_unlock(&dev->struct_mutex); 1624 + return ret; 1625 + } 1626 } 1627 1628 ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y,
+6 -5
drivers/gpu/drm/i915/intel_i2c.c
··· 160 }; 161 struct intel_gpio *gpio; 162 163 - if (pin < 1 || pin > 7) 164 return NULL; 165 166 gpio = kzalloc(sizeof(struct intel_gpio), GFP_KERNEL); ··· 172 gpio->reg += PCH_GPIOA - GPIOA; 173 gpio->dev_priv = dev_priv; 174 175 - snprintf(gpio->adapter.name, I2C_NAME_SIZE, "GPIO%c", "?BACDEF?"[pin]); 176 gpio->adapter.owner = THIS_MODULE; 177 gpio->adapter.algo_data = &gpio->algo; 178 gpio->adapter.dev.parent = &dev_priv->dev->pdev->dev; ··· 350 "panel", 351 "dpc", 352 "dpb", 353 - "reserved" 354 "dpd", 355 }; 356 struct drm_i915_private *dev_priv = dev->dev_private; ··· 367 bus->adapter.owner = THIS_MODULE; 368 bus->adapter.class = I2C_CLASS_DDC; 369 snprintf(bus->adapter.name, 370 - I2C_NAME_SIZE, 371 - "gmbus %s", 372 names[i]); 373 374 bus->adapter.dev.parent = &dev->pdev->dev;
··· 160 }; 161 struct intel_gpio *gpio; 162 163 + if (pin >= ARRAY_SIZE(map_pin_to_reg) || !map_pin_to_reg[pin]) 164 return NULL; 165 166 gpio = kzalloc(sizeof(struct intel_gpio), GFP_KERNEL); ··· 172 gpio->reg += PCH_GPIOA - GPIOA; 173 gpio->dev_priv = dev_priv; 174 175 + snprintf(gpio->adapter.name, sizeof(gpio->adapter.name), 176 + "i915 GPIO%c", "?BACDE?F"[pin]); 177 gpio->adapter.owner = THIS_MODULE; 178 gpio->adapter.algo_data = &gpio->algo; 179 gpio->adapter.dev.parent = &dev_priv->dev->pdev->dev; ··· 349 "panel", 350 "dpc", 351 "dpb", 352 + "reserved", 353 "dpd", 354 }; 355 struct drm_i915_private *dev_priv = dev->dev_private; ··· 366 bus->adapter.owner = THIS_MODULE; 367 bus->adapter.class = I2C_CLASS_DDC; 368 snprintf(bus->adapter.name, 369 + sizeof(bus->adapter.name), 370 + "i915 gmbus %s", 371 names[i]); 372 373 bus->adapter.dev.parent = &dev->pdev->dev;