tjh.dev / kernel
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net: dsa: microchip: add IPV information support

Most of Microchip KSZ switches use Internal Priority Value associated
with every frame. For example, it is possible to map any VLAN PCP or
DSCP value to IPV and at the end, map IPV to a queue.

Since amount of IPVs is not equal to amount of queues, add this
information and make use of it in some functions.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Oleksij Rempel and committed by
David S. Miller 97278f8f 96c6f337

+20 -3
+19 -2
drivers/net/dsa/microchip/ksz_common.c
··· 1225 1225 .port_cnt = 3, /* total port count */ 1226 1226 .port_nirqs = 3, 1227 1227 .num_tx_queues = 4, 1228 + .num_ipvs = 8, 1228 1229 .tc_cbs_supported = true, 1229 1230 .tc_ets_supported = true, 1230 1231 .ops = &ksz9477_dev_ops, ··· 1256 1255 .cpu_ports = 0x10, /* can be configured as cpu port */ 1257 1256 .port_cnt = 5, /* total cpu and user ports */ 1258 1257 .num_tx_queues = 4, 1258 + .num_ipvs = 4, 1259 1259 .ops = &ksz8_dev_ops, 1260 1260 .phylink_mac_ops = &ksz8_phylink_mac_ops, 1261 1261 .ksz87xx_eee_link_erratum = true, ··· 1297 1295 .cpu_ports = 0x10, /* can be configured as cpu port */ 1298 1296 .port_cnt = 5, /* total cpu and user ports */ 1299 1297 .num_tx_queues = 4, 1298 + .num_ipvs = 4, 1300 1299 .ops = &ksz8_dev_ops, 1301 1300 .phylink_mac_ops = &ksz8_phylink_mac_ops, 1302 1301 .ksz87xx_eee_link_erratum = true, ··· 1324 1321 .cpu_ports = 0x10, /* can be configured as cpu port */ 1325 1322 .port_cnt = 5, /* total cpu and user ports */ 1326 1323 .num_tx_queues = 4, 1324 + .num_ipvs = 4, 1327 1325 .ops = &ksz8_dev_ops, 1328 1326 .phylink_mac_ops = &ksz8_phylink_mac_ops, 1329 1327 .ksz87xx_eee_link_erratum = true, ··· 1351 1347 .cpu_ports = 0x4, /* can be configured as cpu port */ 1352 1348 .port_cnt = 3, 1353 1349 .num_tx_queues = 4, 1350 + .num_ipvs = 4, 1354 1351 .ops = &ksz8_dev_ops, 1355 1352 .phylink_mac_ops = &ksz8830_phylink_mac_ops, 1356 1353 .mib_names = ksz88xx_mib_names, ··· 1377 1372 .port_cnt = 7, /* total physical port count */ 1378 1373 .port_nirqs = 4, 1379 1374 .num_tx_queues = 4, 1375 + .num_ipvs = 8, 1380 1376 .tc_cbs_supported = true, 1381 1377 .tc_ets_supported = true, 1382 1378 .ops = &ksz9477_dev_ops, ··· 1413 1407 .port_cnt = 6, /* total physical port count */ 1414 1408 .port_nirqs = 2, 1415 1409 .num_tx_queues = 4, 1410 + .num_ipvs = 8, 1416 1411 .ops = &ksz9477_dev_ops, 1417 1412 .phylink_mac_ops = &ksz9477_phylink_mac_ops, 1418 1413 .mib_names = ksz9477_mib_names, ··· 1447 1440 .port_cnt = 7, /* total physical port count */ 1448 1441 .port_nirqs = 2, 1449 1442 .num_tx_queues = 4, 1443 + .num_ipvs = 8, 1450 1444 .ops = &ksz9477_dev_ops, 1451 1445 .phylink_mac_ops = &ksz9477_phylink_mac_ops, 1452 1446 .mib_names = ksz9477_mib_names, ··· 1479 1471 .port_cnt = 3, /* total port count */ 1480 1472 .port_nirqs = 2, 1481 1473 .num_tx_queues = 4, 1474 + .num_ipvs = 8, 1482 1475 .ops = &ksz9477_dev_ops, 1483 1476 .phylink_mac_ops = &ksz9477_phylink_mac_ops, 1484 1477 .mib_names = ksz9477_mib_names, ··· 1507 1498 .port_cnt = 3, /* total port count */ 1508 1499 .port_nirqs = 3, 1509 1500 .num_tx_queues = 4, 1501 + .num_ipvs = 8, 1510 1502 .tc_cbs_supported = true, 1511 1503 .tc_ets_supported = true, 1512 1504 .ops = &ksz9477_dev_ops, ··· 1537 1527 .port_cnt = 7, /* total port count */ 1538 1528 .port_nirqs = 3, 1539 1529 .num_tx_queues = 4, 1530 + .num_ipvs = 8, 1540 1531 .tc_cbs_supported = true, 1541 1532 .tc_ets_supported = true, 1542 1533 .ops = &ksz9477_dev_ops, ··· 1572 1561 .port_cnt = 7, /* total physical port count */ 1573 1562 .port_nirqs = 3, 1574 1563 .num_tx_queues = 4, 1564 + .num_ipvs = 8, 1575 1565 .tc_cbs_supported = true, 1576 1566 .tc_ets_supported = true, 1577 1567 .ops = &ksz9477_dev_ops, ··· 1605 1593 .port_cnt = 5, /* total physical port count */ 1606 1594 .port_nirqs = 6, 1607 1595 .num_tx_queues = 8, 1596 + .num_ipvs = 8, 1608 1597 .tc_cbs_supported = true, 1609 1598 .tc_ets_supported = true, 1610 1599 .ops = &lan937x_dev_ops, ··· 1634 1621 .port_cnt = 6, /* total physical port count */ 1635 1622 .port_nirqs = 6, 1636 1623 .num_tx_queues = 8, 1624 + .num_ipvs = 8, 1637 1625 .tc_cbs_supported = true, 1638 1626 .tc_ets_supported = true, 1639 1627 .ops = &lan937x_dev_ops, ··· 1663 1649 .port_cnt = 8, /* total physical port count */ 1664 1650 .port_nirqs = 6, 1665 1651 .num_tx_queues = 8, 1652 + .num_ipvs = 8, 1666 1653 .tc_cbs_supported = true, 1667 1654 .tc_ets_supported = true, 1668 1655 .ops = &lan937x_dev_ops, ··· 1696 1681 .port_cnt = 5, /* total physical port count */ 1697 1682 .port_nirqs = 6, 1698 1683 .num_tx_queues = 8, 1684 + .num_ipvs = 8, 1699 1685 .tc_cbs_supported = true, 1700 1686 .tc_ets_supported = true, 1701 1687 .ops = &lan937x_dev_ops, ··· 1729 1713 .port_cnt = 8, /* total physical port count */ 1730 1714 .port_nirqs = 6, 1731 1715 .num_tx_queues = 8, 1716 + .num_ipvs = 8, 1732 1717 .tc_cbs_supported = true, 1733 1718 .tc_ets_supported = true, 1734 1719 .ops = &lan937x_dev_ops, ··· 3582 3565 for (tc_prio = 0; tc_prio < ARRAY_SIZE(p->priomap); tc_prio++) { 3583 3566 int queue; 3584 3567 3585 - if (tc_prio > KSZ9477_MAX_TC_PRIO) 3568 + if (tc_prio >= dev->info->num_ipvs) 3586 3569 break; 3587 3570 3588 3571 queue = ksz_ets_band_to_queue(p, p->priomap[tc_prio]); ··· 3624 3607 /* Revert the queue mapping for TC-priority to its default setting on 3625 3608 * the chip. 3626 3609 */ 3627 - for (tc_prio = 0; tc_prio <= KSZ9477_MAX_TC_PRIO; tc_prio++) { 3610 + for (tc_prio = 0; tc_prio < dev->info->num_ipvs; tc_prio++) { 3628 3611 int queue; 3629 3612 3630 3613 queue = tc_prio >> s;
+1 -1
drivers/net/dsa/microchip/ksz_common.h
··· 59 59 int port_cnt; 60 60 u8 port_nirqs; 61 61 u8 num_tx_queues; 62 + u8 num_ipvs; /* number of Internal Priority Values */ 62 63 bool tc_cbs_supported; 63 64 bool tc_ets_supported; 64 65 const struct ksz_dev_ops *ops; ··· 722 721 #define KSZ9477_PORT_MRI_TC_MAP__4 0x0808 723 722 724 723 #define KSZ9477_PORT_TC_MAP_S 4 725 - #define KSZ9477_MAX_TC_PRIO 7 726 724 727 725 /* CBS related registers */ 728 726 #define REG_PORT_MTI_QUEUE_INDEX__4 0x0900