tjh.dev / kernel
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arm: dts: Fix dtc interrupt_provider warnings

The dtc interrupt_provider warning is off by default. Fix all the warnings
so it can be enabled.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Reviewed-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20240213-arm-dt-cleanups-v1-2-f2dee1292525@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

authored by

Rob Herring and committed by
Arnd Bergmann 96fd598e e08f6549

+18 -58
-1
arch/arm/boot/dts/amazon/alpine.dtsi
··· 167 167 msix: msix@fbe00000 { 168 168 compatible = "al,alpine-msix"; 169 169 reg = <0x0 0xfbe00000 0x0 0x100000>; 170 - interrupt-controller; 171 170 msi-controller; 172 171 al,msi-base-spi = <96>; 173 172 al,msi-num-spis = <64>;
-14
arch/arm/boot/dts/aspeed/aspeed-g4.dtsi
··· 466 466 i2c0: i2c-bus@40 { 467 467 #address-cells = <1>; 468 468 #size-cells = <0>; 469 - #interrupt-cells = <1>; 470 469 471 470 reg = <0x40 0x40>; 472 471 compatible = "aspeed,ast2400-i2c-bus"; ··· 481 482 i2c1: i2c-bus@80 { 482 483 #address-cells = <1>; 483 484 #size-cells = <0>; 484 - #interrupt-cells = <1>; 485 485 486 486 reg = <0x80 0x40>; 487 487 compatible = "aspeed,ast2400-i2c-bus"; ··· 496 498 i2c2: i2c-bus@c0 { 497 499 #address-cells = <1>; 498 500 #size-cells = <0>; 499 - #interrupt-cells = <1>; 500 501 501 502 reg = <0xc0 0x40>; 502 503 compatible = "aspeed,ast2400-i2c-bus"; ··· 512 515 i2c3: i2c-bus@100 { 513 516 #address-cells = <1>; 514 517 #size-cells = <0>; 515 - #interrupt-cells = <1>; 516 518 517 519 reg = <0x100 0x40>; 518 520 compatible = "aspeed,ast2400-i2c-bus"; ··· 528 532 i2c4: i2c-bus@140 { 529 533 #address-cells = <1>; 530 534 #size-cells = <0>; 531 - #interrupt-cells = <1>; 532 535 533 536 reg = <0x140 0x40>; 534 537 compatible = "aspeed,ast2400-i2c-bus"; ··· 544 549 i2c5: i2c-bus@180 { 545 550 #address-cells = <1>; 546 551 #size-cells = <0>; 547 - #interrupt-cells = <1>; 548 552 549 553 reg = <0x180 0x40>; 550 554 compatible = "aspeed,ast2400-i2c-bus"; ··· 560 566 i2c6: i2c-bus@1c0 { 561 567 #address-cells = <1>; 562 568 #size-cells = <0>; 563 - #interrupt-cells = <1>; 564 569 565 570 reg = <0x1c0 0x40>; 566 571 compatible = "aspeed,ast2400-i2c-bus"; ··· 576 583 i2c7: i2c-bus@300 { 577 584 #address-cells = <1>; 578 585 #size-cells = <0>; 579 - #interrupt-cells = <1>; 580 586 581 587 reg = <0x300 0x40>; 582 588 compatible = "aspeed,ast2400-i2c-bus"; ··· 592 600 i2c8: i2c-bus@340 { 593 601 #address-cells = <1>; 594 602 #size-cells = <0>; 595 - #interrupt-cells = <1>; 596 603 597 604 reg = <0x340 0x40>; 598 605 compatible = "aspeed,ast2400-i2c-bus"; ··· 608 617 i2c9: i2c-bus@380 { 609 618 #address-cells = <1>; 610 619 #size-cells = <0>; 611 - #interrupt-cells = <1>; 612 620 613 621 reg = <0x380 0x40>; 614 622 compatible = "aspeed,ast2400-i2c-bus"; ··· 624 634 i2c10: i2c-bus@3c0 { 625 635 #address-cells = <1>; 626 636 #size-cells = <0>; 627 - #interrupt-cells = <1>; 628 637 629 638 reg = <0x3c0 0x40>; 630 639 compatible = "aspeed,ast2400-i2c-bus"; ··· 640 651 i2c11: i2c-bus@400 { 641 652 #address-cells = <1>; 642 653 #size-cells = <0>; 643 - #interrupt-cells = <1>; 644 654 645 655 reg = <0x400 0x40>; 646 656 compatible = "aspeed,ast2400-i2c-bus"; ··· 656 668 i2c12: i2c-bus@440 { 657 669 #address-cells = <1>; 658 670 #size-cells = <0>; 659 - #interrupt-cells = <1>; 660 671 661 672 reg = <0x440 0x40>; 662 673 compatible = "aspeed,ast2400-i2c-bus"; ··· 672 685 i2c13: i2c-bus@480 { 673 686 #address-cells = <1>; 674 687 #size-cells = <0>; 675 - #interrupt-cells = <1>; 676 688 677 689 reg = <0x480 0x40>; 678 690 compatible = "aspeed,ast2400-i2c-bus";
+1 -14
arch/arm/boot/dts/aspeed/aspeed-g5.dtsi
··· 363 363 interrupts = <40>; 364 364 reg = <0x1e780200 0x0100>; 365 365 clocks = <&syscon ASPEED_CLK_APB>; 366 + #interrupt-cells = <2>; 366 367 interrupt-controller; 367 368 bus-frequency = <12000000>; 368 369 pinctrl-names = "default"; ··· 595 594 i2c0: i2c-bus@40 { 596 595 #address-cells = <1>; 597 596 #size-cells = <0>; 598 - #interrupt-cells = <1>; 599 597 600 598 reg = <0x40 0x40>; 601 599 compatible = "aspeed,ast2500-i2c-bus"; ··· 610 610 i2c1: i2c-bus@80 { 611 611 #address-cells = <1>; 612 612 #size-cells = <0>; 613 - #interrupt-cells = <1>; 614 613 615 614 reg = <0x80 0x40>; 616 615 compatible = "aspeed,ast2500-i2c-bus"; ··· 625 626 i2c2: i2c-bus@c0 { 626 627 #address-cells = <1>; 627 628 #size-cells = <0>; 628 - #interrupt-cells = <1>; 629 629 630 630 reg = <0xc0 0x40>; 631 631 compatible = "aspeed,ast2500-i2c-bus"; ··· 641 643 i2c3: i2c-bus@100 { 642 644 #address-cells = <1>; 643 645 #size-cells = <0>; 644 - #interrupt-cells = <1>; 645 646 646 647 reg = <0x100 0x40>; 647 648 compatible = "aspeed,ast2500-i2c-bus"; ··· 657 660 i2c4: i2c-bus@140 { 658 661 #address-cells = <1>; 659 662 #size-cells = <0>; 660 - #interrupt-cells = <1>; 661 663 662 664 reg = <0x140 0x40>; 663 665 compatible = "aspeed,ast2500-i2c-bus"; ··· 673 677 i2c5: i2c-bus@180 { 674 678 #address-cells = <1>; 675 679 #size-cells = <0>; 676 - #interrupt-cells = <1>; 677 680 678 681 reg = <0x180 0x40>; 679 682 compatible = "aspeed,ast2500-i2c-bus"; ··· 689 694 i2c6: i2c-bus@1c0 { 690 695 #address-cells = <1>; 691 696 #size-cells = <0>; 692 - #interrupt-cells = <1>; 693 697 694 698 reg = <0x1c0 0x40>; 695 699 compatible = "aspeed,ast2500-i2c-bus"; ··· 705 711 i2c7: i2c-bus@300 { 706 712 #address-cells = <1>; 707 713 #size-cells = <0>; 708 - #interrupt-cells = <1>; 709 714 710 715 reg = <0x300 0x40>; 711 716 compatible = "aspeed,ast2500-i2c-bus"; ··· 721 728 i2c8: i2c-bus@340 { 722 729 #address-cells = <1>; 723 730 #size-cells = <0>; 724 - #interrupt-cells = <1>; 725 731 726 732 reg = <0x340 0x40>; 727 733 compatible = "aspeed,ast2500-i2c-bus"; ··· 737 745 i2c9: i2c-bus@380 { 738 746 #address-cells = <1>; 739 747 #size-cells = <0>; 740 - #interrupt-cells = <1>; 741 748 742 749 reg = <0x380 0x40>; 743 750 compatible = "aspeed,ast2500-i2c-bus"; ··· 753 762 i2c10: i2c-bus@3c0 { 754 763 #address-cells = <1>; 755 764 #size-cells = <0>; 756 - #interrupt-cells = <1>; 757 765 758 766 reg = <0x3c0 0x40>; 759 767 compatible = "aspeed,ast2500-i2c-bus"; ··· 769 779 i2c11: i2c-bus@400 { 770 780 #address-cells = <1>; 771 781 #size-cells = <0>; 772 - #interrupt-cells = <1>; 773 782 774 783 reg = <0x400 0x40>; 775 784 compatible = "aspeed,ast2500-i2c-bus"; ··· 785 796 i2c12: i2c-bus@440 { 786 797 #address-cells = <1>; 787 798 #size-cells = <0>; 788 - #interrupt-cells = <1>; 789 799 790 800 reg = <0x440 0x40>; 791 801 compatible = "aspeed,ast2500-i2c-bus"; ··· 801 813 i2c13: i2c-bus@480 { 802 814 #address-cells = <1>; 803 815 #size-cells = <0>; 804 - #interrupt-cells = <1>; 805 816 806 817 reg = <0x480 0x40>; 807 818 compatible = "aspeed,ast2500-i2c-bus";
+2 -16
arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
··· 474 474 reg = <0x1e780500 0x100>; 475 475 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 476 476 clocks = <&syscon ASPEED_CLK_APB2>; 477 + #interrupt-cells = <2>; 477 478 interrupt-controller; 478 479 bus-frequency = <12000000>; 479 480 pinctrl-names = "default"; ··· 489 488 reg = <0x1e780600 0x100>; 490 489 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 491 490 clocks = <&syscon ASPEED_CLK_APB2>; 491 + #interrupt-cells = <2>; 492 492 interrupt-controller; 493 493 bus-frequency = <12000000>; 494 494 pinctrl-names = "default"; ··· 904 902 i2c0: i2c-bus@80 { 905 903 #address-cells = <1>; 906 904 #size-cells = <0>; 907 - #interrupt-cells = <1>; 908 905 reg = <0x80 0x80>; 909 906 compatible = "aspeed,ast2600-i2c-bus"; 910 907 clocks = <&syscon ASPEED_CLK_APB2>; ··· 918 917 i2c1: i2c-bus@100 { 919 918 #address-cells = <1>; 920 919 #size-cells = <0>; 921 - #interrupt-cells = <1>; 922 920 reg = <0x100 0x80>; 923 921 compatible = "aspeed,ast2600-i2c-bus"; 924 922 clocks = <&syscon ASPEED_CLK_APB2>; ··· 932 932 i2c2: i2c-bus@180 { 933 933 #address-cells = <1>; 934 934 #size-cells = <0>; 935 - #interrupt-cells = <1>; 936 935 reg = <0x180 0x80>; 937 936 compatible = "aspeed,ast2600-i2c-bus"; 938 937 clocks = <&syscon ASPEED_CLK_APB2>; ··· 946 947 i2c3: i2c-bus@200 { 947 948 #address-cells = <1>; 948 949 #size-cells = <0>; 949 - #interrupt-cells = <1>; 950 950 reg = <0x200 0x80>; 951 951 compatible = "aspeed,ast2600-i2c-bus"; 952 952 clocks = <&syscon ASPEED_CLK_APB2>; ··· 960 962 i2c4: i2c-bus@280 { 961 963 #address-cells = <1>; 962 964 #size-cells = <0>; 963 - #interrupt-cells = <1>; 964 965 reg = <0x280 0x80>; 965 966 compatible = "aspeed,ast2600-i2c-bus"; 966 967 clocks = <&syscon ASPEED_CLK_APB2>; ··· 974 977 i2c5: i2c-bus@300 { 975 978 #address-cells = <1>; 976 979 #size-cells = <0>; 977 - #interrupt-cells = <1>; 978 980 reg = <0x300 0x80>; 979 981 compatible = "aspeed,ast2600-i2c-bus"; 980 982 clocks = <&syscon ASPEED_CLK_APB2>; ··· 988 992 i2c6: i2c-bus@380 { 989 993 #address-cells = <1>; 990 994 #size-cells = <0>; 991 - #interrupt-cells = <1>; 992 995 reg = <0x380 0x80>; 993 996 compatible = "aspeed,ast2600-i2c-bus"; 994 997 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1002 1007 i2c7: i2c-bus@400 { 1003 1008 #address-cells = <1>; 1004 1009 #size-cells = <0>; 1005 - #interrupt-cells = <1>; 1006 1010 reg = <0x400 0x80>; 1007 1011 compatible = "aspeed,ast2600-i2c-bus"; 1008 1012 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1016 1022 i2c8: i2c-bus@480 { 1017 1023 #address-cells = <1>; 1018 1024 #size-cells = <0>; 1019 - #interrupt-cells = <1>; 1020 1025 reg = <0x480 0x80>; 1021 1026 compatible = "aspeed,ast2600-i2c-bus"; 1022 1027 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1030 1037 i2c9: i2c-bus@500 { 1031 1038 #address-cells = <1>; 1032 1039 #size-cells = <0>; 1033 - #interrupt-cells = <1>; 1034 1040 reg = <0x500 0x80>; 1035 1041 compatible = "aspeed,ast2600-i2c-bus"; 1036 1042 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1044 1052 i2c10: i2c-bus@580 { 1045 1053 #address-cells = <1>; 1046 1054 #size-cells = <0>; 1047 - #interrupt-cells = <1>; 1048 1055 reg = <0x580 0x80>; 1049 1056 compatible = "aspeed,ast2600-i2c-bus"; 1050 1057 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1058 1067 i2c11: i2c-bus@600 { 1059 1068 #address-cells = <1>; 1060 1069 #size-cells = <0>; 1061 - #interrupt-cells = <1>; 1062 1070 reg = <0x600 0x80>; 1063 1071 compatible = "aspeed,ast2600-i2c-bus"; 1064 1072 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1072 1082 i2c12: i2c-bus@680 { 1073 1083 #address-cells = <1>; 1074 1084 #size-cells = <0>; 1075 - #interrupt-cells = <1>; 1076 1085 reg = <0x680 0x80>; 1077 1086 compatible = "aspeed,ast2600-i2c-bus"; 1078 1087 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1086 1097 i2c13: i2c-bus@700 { 1087 1098 #address-cells = <1>; 1088 1099 #size-cells = <0>; 1089 - #interrupt-cells = <1>; 1090 1100 reg = <0x700 0x80>; 1091 1101 compatible = "aspeed,ast2600-i2c-bus"; 1092 1102 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1100 1112 i2c14: i2c-bus@780 { 1101 1113 #address-cells = <1>; 1102 1114 #size-cells = <0>; 1103 - #interrupt-cells = <1>; 1104 1115 reg = <0x780 0x80>; 1105 1116 compatible = "aspeed,ast2600-i2c-bus"; 1106 1117 clocks = <&syscon ASPEED_CLK_APB2>; ··· 1114 1127 i2c15: i2c-bus@800 { 1115 1128 #address-cells = <1>; 1116 1129 #size-cells = <0>; 1117 - #interrupt-cells = <1>; 1118 1130 reg = <0x800 0x80>; 1119 1131 compatible = "aspeed,ast2600-i2c-bus"; 1120 1132 clocks = <&syscon ASPEED_CLK_APB2>;
+3
arch/arm/boot/dts/broadcom/bcm-cygnus.dtsi
··· 167 167 #gpio-cells = <2>; 168 168 gpio-controller; 169 169 interrupt-controller; 170 + #interrupt-cells = <2>; 170 171 interrupt-parent = <&mailbox>; 171 172 interrupts = <0>; 172 173 }; ··· 248 247 gpio-controller; 249 248 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 250 249 interrupt-controller; 250 + #interrupt-cells = <2>; 251 251 }; 252 252 253 253 i2c1: i2c@1800b000 { ··· 520 518 gpio-controller; 521 519 522 520 interrupt-controller; 521 + #interrupt-cells = <2>; 523 522 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 524 523 gpio-ranges = <&pinctrl 0 42 1>, 525 524 <&pinctrl 1 44 3>,
+1
arch/arm/boot/dts/broadcom/bcm-hr2.dtsi
··· 200 200 gpio-controller; 201 201 ngpios = <4>; 202 202 interrupt-controller; 203 + #interrupt-cells = <2>; 203 204 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 204 205 }; 205 206
+2
arch/arm/boot/dts/broadcom/bcm-nsp.dtsi
··· 180 180 gpio-controller; 181 181 ngpios = <32>; 182 182 interrupt-controller; 183 + #interrupt-cells = <2>; 183 184 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 184 185 gpio-ranges = <&pinctrl 0 0 32>; 185 186 }; ··· 353 352 gpio-controller; 354 353 ngpios = <4>; 355 354 interrupt-controller; 355 + #interrupt-cells = <2>; 356 356 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 357 357 }; 358 358
+2
arch/arm/boot/dts/marvell/kirkwood-l-50.dts
··· 65 65 gpio2: gpio-expander@20 { 66 66 #gpio-cells = <2>; 67 67 #interrupt-cells = <2>; 68 + interrupt-controller; 68 69 compatible = "semtech,sx1505q"; 69 70 reg = <0x20>; 70 71 ··· 80 79 gpio3: gpio-expander@21 { 81 80 #gpio-cells = <2>; 82 81 #interrupt-cells = <2>; 82 + interrupt-controller; 83 83 compatible = "semtech,sx1505q"; 84 84 reg = <0x21>; 85 85
+2
arch/arm/boot/dts/nuvoton/nuvoton-wpcm450.dtsi
··· 120 120 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>, 121 121 <3 IRQ_TYPE_LEVEL_HIGH>, 122 122 <4 IRQ_TYPE_LEVEL_HIGH>; 123 + #interrupt-cells = <2>; 123 124 interrupt-controller; 124 125 }; 125 126 ··· 129 128 gpio-controller; 130 129 #gpio-cells = <2>; 131 130 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 131 + #interrupt-cells = <2>; 132 132 interrupt-controller; 133 133 }; 134 134
-1
arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1.dtsi
··· 997 997 compatible = "st,stmpe811"; 998 998 reg = <0x41>; 999 999 irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; 1000 - interrupt-controller; 1001 1000 id = <0>; 1002 1001 blocks = <0x5>; 1003 1002 irq-trigger = <0x1>;
-1
arch/arm/boot/dts/nvidia/tegra30-apalis.dtsi
··· 980 980 compatible = "st,stmpe811"; 981 981 reg = <0x41>; 982 982 irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; 983 - interrupt-controller; 984 983 id = <0>; 985 984 blocks = <0x5>; 986 985 irq-trigger = <0x1>;
-1
arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi
··· 861 861 compatible = "st,stmpe811"; 862 862 reg = <0x41>; 863 863 irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; 864 - interrupt-controller; 865 864 id = <0>; 866 865 blocks = <0x5>; 867 866 irq-trigger = <0x1>;
-3
arch/arm/boot/dts/nxp/imx/imx6q-b850v3.dts
··· 227 227 228 228 #address-cells = <3>; 229 229 #size-cells = <2>; 230 - #interrupt-cells = <1>; 231 230 232 231 bridge@2,1 { 233 232 compatible = "pci10b5,8605"; ··· 234 235 235 236 #address-cells = <3>; 236 237 #size-cells = <2>; 237 - #interrupt-cells = <1>; 238 238 239 239 /* Intel Corporation I210 Gigabit Network Connection */ 240 240 ethernet@3,0 { ··· 248 250 249 251 #address-cells = <3>; 250 252 #size-cells = <2>; 251 - #interrupt-cells = <1>; 252 253 253 254 /* Intel Corporation I210 Gigabit Network Connection */ 254 255 switch_nic: ethernet@4,0 {
+1 -1
arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi
··· 245 245 reg = <0x74>; 246 246 gpio-controller; 247 247 #gpio-cells = <2>; 248 + #interrupt-cells = <2>; 248 249 interrupt-controller; 249 250 interrupt-parent = <&gpio2>; 250 251 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ··· 391 390 392 391 #address-cells = <3>; 393 392 #size-cells = <2>; 394 - #interrupt-cells = <1>; 395 393 }; 396 394 }; 397 395
-1
arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi
··· 626 626 blocks = <0x5>; 627 627 id = <0>; 628 628 interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 629 - interrupt-controller; 630 629 interrupt-parent = <&gpio4>; 631 630 irq-trigger = <0x1>; 632 631 pinctrl-names = "default";
-1
arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi
··· 550 550 blocks = <0x5>; 551 551 interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 552 552 interrupt-parent = <&gpio6>; 553 - interrupt-controller; 554 553 id = <0>; 555 554 irq-trigger = <0x1>; 556 555 pinctrl-names = "default";
-1
arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi
··· 225 225 pinctrl-0 = <&pinctrl_pmic>; 226 226 interrupt-parent = <&gpio2>; 227 227 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 228 - interrupt-controller; 229 228 230 229 onkey { 231 230 compatible = "dlg,da9063-onkey";
+1
arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi
··· 124 124 reg = <0x58>; 125 125 interrupt-parent = <&gpio2>; 126 126 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; /* active-low GPIO2_9 */ 127 + #interrupt-cells = <2>; 127 128 interrupt-controller; 128 129 129 130 regulators {
+1
arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
··· 100 100 interrupt-parent = <&gpio1>; 101 101 interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 102 102 interrupt-controller; 103 + #interrupt-cells = <2>; 103 104 gpio-controller; 104 105 #gpio-cells = <2>; 105 106
+1
arch/arm/boot/dts/nxp/imx/imx7d-pico-dwarf.dts
··· 63 63 gpio-controller; 64 64 #gpio-cells = <2>; 65 65 #interrupt-cells = <2>; 66 + interrupt-controller; 66 67 reg = <0x25>; 67 68 }; 68 69
+1
arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts
··· 338 338 reg = <0x22>; 339 339 gpio-controller; 340 340 #gpio-cells = <2>; 341 + #interrupt-cells = <2>; 341 342 interrupt-controller; 342 343 interrupt-parent = <&gpio3>; 343 344 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-1
arch/arm/boot/dts/st/stm32429i-eval.dts
··· 222 222 reg = <0x42>; 223 223 interrupts = <8 3>; 224 224 interrupt-parent = <&gpioi>; 225 - interrupt-controller; 226 225 wakeup-source; 227 226 228 227 stmpegpio: stmpe_gpio {
-1
arch/arm/boot/dts/st/stm32mp157c-dk2.dts
··· 64 64 reg = <0x38>; 65 65 interrupts = <2 2>; 66 66 interrupt-parent = <&gpiof>; 67 - interrupt-controller; 68 67 touchscreen-size-x = <480>; 69 68 touchscreen-size-y = <800>; 70 69 status = "okay";
-1
arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts
··· 415 415 reg = <0x41>; 416 416 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 417 417 interrupt-parent = <&gpio2>; 418 - interrupt-controller; 419 418 id = <0>; 420 419 blocks = <0x5>; 421 420 irq-trigger = <0x1>;