tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

clk: at91: cleanup PMC header file for PCR register fields

Add _MASK and _OFFSET values and cleanup register fields layout.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

authored by

Nicolas Ferre and committed by
Stephen Boyd 96ef36e9 a3ff2337

+10 -12
+4 -4
drivers/clk/at91/clk-peripheral.c
··· 165 165 if (periph->id < PERIPHERAL_ID_MIN) 166 166 return 0; 167 167 168 - pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID) | 168 + pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID_MASK) | 169 169 AT91_PMC_PCR_CMD | 170 170 AT91_PMC_PCR_DIV(periph->div) | 171 171 AT91_PMC_PCR_EN); ··· 180 180 if (periph->id < PERIPHERAL_ID_MIN) 181 181 return; 182 182 183 - pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID) | 183 + pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID_MASK) | 184 184 AT91_PMC_PCR_CMD); 185 185 } 186 186 ··· 194 194 return 1; 195 195 196 196 pmc_lock(pmc); 197 - pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID)); 197 + pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID_MASK)); 198 198 ret = !!(pmc_read(pmc, AT91_PMC_PCR) & AT91_PMC_PCR_EN); 199 199 pmc_unlock(pmc); 200 200 ··· 213 213 return parent_rate; 214 214 215 215 pmc_lock(pmc); 216 - pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID)); 216 + pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID_MASK)); 217 217 tmp = pmc_read(pmc, AT91_PMC_PCR); 218 218 pmc_unlock(pmc); 219 219
+6 -8
include/linux/clk/at91_pmc.h
··· 182 182 #define AT91_PMC_PCSR1 0x108 /* Peripheral Clock Enable Register 1 */ 183 183 184 184 #define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9 and SAMA5] */ 185 - #define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */ 186 - #define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */ 187 - #define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */ 188 - #define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */ 189 - #define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */ 190 - #define AT91_PMC_PCR_DIV4 0x2 /* Peripheral clock is MCK/4 */ 191 - #define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */ 192 - #define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ 185 + #define AT91_PMC_PCR_PID_MASK 0x3f 186 + #define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */ 187 + #define AT91_PMC_PCR_DIV_OFFSET 16 188 + #define AT91_PMC_PCR_DIV_MASK (0x3 << AT91_PMC_PCR_DIV_OFFSET) 189 + #define AT91_PMC_PCR_DIV(n) ((n) << AT91_PMC_PCR_DIV_OFFSET) /* Divisor Value */ 190 + #define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ 193 191 194 192 #endif